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Forum Topic - 6.5.0 M8A - apic boot issues: (14 Items)
   
6.5.0 M8A - apic boot issues  
Hi,

A customer of mine has some high-end (8-way) machines and wants to use MSI interrupts to reduce latencies (specifically 
by not sharing interrupts any more). He has a bunch of GigE NICs to service at high packet rates.

He has M8A and is using startup-apic and pci-bios-v2 (and an experimental version of pci-bios-v2).

He had limited success, but provided feedback that is hopefully of value to us. He is available to test more code...

To make anything that booted at all, he mixed some 6.4.1 and 6.5.0 components...

Here's what he says: plus I attached his results
"
After a bunch of experiments I have mixed (some positive and some
negative results).

I manage to create operational APCI IFS, which consisted of
combination of 6.4.1 and 6.5.0A components. Specifically, I "borrow"
from 6.5.0: startup-apic, pci-bios-v2, libc.so, and libc.so.3.

Unfortunately, this IFS works only on one out of 5 types of machines
we have. Other four -- they crash during startup. I attached the
snapshots of several outputs from different PCs. Hopefully, it
contains useful information to QNX BSP and kernel developers. Again,
it is not clean setup (mixture of 6.4.1 and 6.5.0). Thought, it works
on one of the System. I didn't conduct any experiments with this
runtime environment, but, at least, two boxes can communicate over the
network.

Yesterday, I mentioned to you that pci-bios-v2 hangs the System. When
I took this components from 6.5.0 and tried to run the IFS, ldd
complained about lack of "__slog_once" symbol in pci-bios-v2. So, I
have to take libc.so.3 from 6.5.0 as well.
"

Is this any help ?

Any suggestions ? I've asked him to see if reducing the cores to 8 helps...

Regards

Dave

ave
Attachment: Text apic-startup.out.txt 46.94 KB
Re: 6.5.0 M8A - apic boot issues  
I tried 6.5.0 M8A on a dual Xeon server with SMP, startup-acpi and pci-bios-v2. It didn't go anywhere other than 
outputing something like "found three IOAPIC, but can only configure one of them" first, then AHCI couldn't find the 
hard disk, IDE couldn't find the optical drive...
Re: 6.5.0 M8A - apic boot issues  
i've got the same problem here. did you get any further? any hints from anybody?
Re: 6.5.0 M8A - apic boot issues  
Hi!

Did you get any progress concerning this issue? I'm still stuck...

How looks your buildfile? Do you start both startup-apic and startup-bios or only startup-apic in this case? 

Regards
Phil
Re: 6.5.0 M8A - apic boot issues  
Now I got it running, when I'm only using "pci-bios-v2" instead of "pci-bios=pci-bios-v2" in my buildfile, which has 
been proposed by the release notes.
However I still see shared interrupts e.g. graphic and network adapter on IRQ 11.
Is this how the APIC mode is supposed to work in QNX or is still something wrong? Can I somehow influence the IRQ 
assignments with starup-apic?

When I have a null modem serial cable I'll post the startup-apic debug output.
Re: 6.5.0 M8A - apic boot issues  
Here is what i get from"startup-apic -vv"

Base CPU interrupt for APIC is 48
lapic_configure(cpu=0)
ACPI header found for IO-APIC 8 @ fec00000 [base=0]
Added IO-APIC 8 @ fec00000 (vaddr: fed21000)
ACPI header found for IO-APIC 9 @ fec80000 [base=24]
Added IO-APIC 9 @ fec80000 (vaddr: fed22000)
Added 2 IOAPIC's from ACPI tables
Found 2 IOAPIC's however only 1 will be configured
No access functions found for IOAPIC id 8, using ICH defaults
Autofill: Only 16 of requested 24 entries available for profile 6
ACPI header found for Interrupt source override: bus:0, SrcIRQ:0, GSI:2, Flags:00000000
** NEED A RESOLVER for ACPI INTSRC FLAGS **
checking GPIO pin 2 .. no
checking GPIO pin 4 .. no
checking GPIO pin 5 .. no

Clearing 24 IOAPIC entries

Configuring 24 IOAPIC entries
[0] vec: 54,   cpumask:00000001, ID: 8, busid:0, busintr:0, dest intin:0, type:3, flags:00000005
[1] vec: 55,   cpumask:00000001, ID: 8, busid:0, busintr:1, dest intin:1, type:0, flags:00000005
[2] vec: 56,   cpumask:00000001, ID: 8, busid:0, busintr:0, dest intin:2, type:0, flags:00000000
[3] vec: 57,   cpumask:00000001, ID: 8, busid:0, busintr:3, dest intin:3, type:0, flags:00000005
[4] vec: 58,   cpumask:00000001, ID: 8, busid:0, busintr:4, dest intin:4, type:0, flags:00000005
[5] vec: 59,   cpumask:00000001, ID: 8, busid:0, busintr:5, dest intin:5, type:0, flags:00000005
[6] vec: 60,   cpumask:00000001, ID: 8, busid:0, busintr:6, dest intin:6, type:0, flags:00000005
[7] vec: 61,   cpumask:00000001, ID: 8, busid:0, busintr:7, dest intin:7, type:0, flags:00000005
[8] vec: 62,   cpumask:00000001, ID: 8, busid:0, busintr:8, dest intin:8, type:0, flags:00000005
[9] vec: 63,   cpumask:00000001, ID: 8, busid:0, busintr:9, dest intin:9, type:0, flags:00000005
[10] vec: 64,   cpumask:00000001, ID: 8, busid:0, busintr:10, dest intin:10, type:0, flags:00000005
[11] vec: 65,   cpumask:00000001, ID: 8, busid:0, busintr:11, dest intin:11, type:0, flags:00000005
[12] vec: 66,   cpumask:00000001, ID: 8, busid:0, busintr:12, dest intin:12, type:0, flags:00000005
[13] vec: 67,   cpumask:00000001, ID: 8, busid:0, busintr:13, dest intin:13, type:0, flags:00000005
[14] vec: 68,   cpumask:00000001, ID: 8, busid:0, busintr:14, dest intin:14, type:0, flags:00000005
[15] vec: 69,   cpumask:00000001, ID: 8, busid:0, busintr:15, dest intin:15, type:0, flags:00000005
[16] vec: 70,   cpumask:00000001, ID: 8, busid:0, busintr:0, dest intin:16, type:0, flags:0000000f
[17] vec: 71,   cpumask:00000001, ID: 8, busid:0, busintr:0, dest intin:17, type:0, flags:0000000f
[18] vec: 72,   cpumask:00000001, ID: 8, busid:0, busintr:0, dest intin:18, type:0, flags:0000000f
[19] vec: 73,   cpumask:00000001, ID: 8, busid:0, busintr:0, dest intin:19, type:0, flags:0000000f
[20] vec: 74,   cpumask:00000001, ID: 8, busid:0, busintr:0, dest intin:20, type:0, flags:0000000f
[21] vec: 75,   cpumask:00000001, ID: 8, busid:0, busintr:0, dest intin:21, type:0, flags:0000000f
[22] vec: 76,   cpumask:00000001, ID: 8, busid:0, busintr:0, dest intin:22, type:0, flags:0000000f
[23] vec: 77,   cpumask:00000001, ID: 8, busid:0, busintr:0, dest intin:23, type:0, flags:0000000f
IOAPIC 8: successfully configured 24 vectors from 0 to 23
MSI interrupt = 0x00000100
MSI vector no = 78 0x0000004e
MSI vec count = 177
lapic_configure(cpu=1)
lapic_configure(cpu=2)
lapic_configure(cpu=3)
Header size=0x0000009c, Total Size=0x000009d8, #Cpu=4, Type=0
Section:system_private offset:0x00000270 size:0x00000068
Section:qtime offset:0x00000190 size:0x00000060
Section:callout offset:0x000000a0 size:0x00000048
Section:cpuinfo offset:0x000001f0 size:0x00000080
Section:cacheattr offset:0x000009d8 size:0x00000000
Section:meminfo offset:0x000009d8 size:0x00000000
Section:asinfo offset:0x000005b8 size:0x000002e0
Section:hwinfo offset:0x000003b8 size:0x00000200
Section:typed_strings offset:0x000002d8 size:0x00000020
Section:strings offset:0x000002f8 size:0x000000c0
Section:intrinfo...
View Full Message
Re: 6.5.0 M8A - apic boot issues  
All,

There have been some recent updates to startup-apic/pci-bios-v2 in order to enable operation on a wider variety of 
machines (originally we were asked to target/test a very limited set of Intel based boards). While there is no guarantee
 that any of these recent changes will solve your specific issues, the updates (which will be released in 6.5.0) are 
still the best starting point for any modifications that may be required for your specific platforms. Remember that 
startups are board specific by design.

Please also note that, we DO NOT currently support more than 1 IOAPIC (PR75534 was created to track this issue). The 
reason relates back to the previously limited set of boards which we originally planned to support, none of which had 
multiple IOAPIC's. The work for this is currently in progress.

We will work to continuously improve this code base and welcome all feedback.

In the future, please post any BSP/startup related issues to the BSP and drivers forum (http://community.qnx.com/sf/
discussion/do/listTopics/projects.bsp/discussion.bsp/) as there is a better chance that the developers involved are 
monitoring it.

Regards,
Mike
Re: 6.5.0 M8A - apic boot issues  
Hi Mike,

do I have to wait for the official release of QNX 6.5.0 for updated versions of startup-apic / pci-bios-v2 or can I get 
them somewhere within the QNX community area? Would be awesome to immediately start testing it.

Cheers
Phil
Re: 6.5.0 M8A - apic boot issues  
Hello Phil,

The bad news is that you'll need to wait for updated versions. The good news
is that we'll be releasing 6.5.0 very soon - we're going through the final
test cycle.

Thanks!
Mike Lemke 
Engineering Operations

On 15/06/10 12:39 PM, "Philipp Lutz" <community-noreply@qnx.com> wrote:

> Hi Mike,
> 
> do I have to wait for the official release of QNX 6.5.0 for updated versions
> of startup-apic / pci-bios-v2 or can I get them somewhere within the QNX
> community area? Would be awesome to immediately start testing it.
> 
> Cheers
> Phil
> 
> 
> 
> _______________________________________________
> 
> QNX Software Development Platform Pre-Releases
> http://community.qnx.com/sf/go/post56870
> 
Re: 6.5.0 M8A - apic boot issues  
Hi Mike,

thank you for the information!

I've got still one important question: is startup-apic and pci-bios-v2 trying to avoid IRQ sharing at all? Because if I 
have a look with "pci -v" after booting, I still see shared IRQs.
At the moment we have big troubles with shared interrupts hence it would be very interesting to know how these new 
programs are handling it. 

Attached is the output of "pci -vvv" on a DELL Precision T3500 PC with the following hardware:
- Chipset: Intel X58-Chipset (ICH10R/D0 Southbridge)
- CPU: Intel Xeon W3520 (Quadcore)
- Graphic Adapter : 512 MB Quadro NVIDIA FX580 (PCI-E)
- NICs: 2 x 82572EI Gigabit Ethernet (PCI-E)

You'll see the graphic and network adapter sharing the same IRQ #11.

Thanks for you help in advance!

Best Regards
Phil
Attachment: Text pci-output.txt 42.55 KB
Re: 6.5.0 M8A - apic boot issues  
startup-apic/pci-bios-v2 are designed for BIOS based systems. We do not override whatever BIOS decisions are made wrt 
interrupt assignments and hence sharing. There is one exception. Most (if not all) BIOS's for Intel based systems will 
route the PIRQ pins (usually 8 or them, as is the case for the ICH10) back to interrupt vectors 0 - 15. On these Intel 
based systems we will undo this routing (if possible) so that interrupts 16 thru 23 are used instead. This may or may 
not eliminate sharing of a 0-15 interrupt but it will not eliminate the sharing (established by the BIOS) of PIRQ pins.

Which PIRQ a device is configured to use would (normally) be established by a startup configured specifically for the 
board based on targeted application and consideration of all of the devices to be used.

Regards,
(the other) Mike

[Please move any further technical discussions to the aforementioned forum ... thanks]
Re: 6.5.0 M8A - apic boot issues  
> - Graphic Adapter : 512 MB Quadro NVIDIA FX580 (PCI-E)

Are you running the VESA graphics driver? I think this one is only to enable self hosted development on machines without
 a native graphics driver. Not sure but I think the VESA graphics was not designed for real time systems (or can't be, 
because of the nature of VESA).

- Malte
Re: 6.5.0 M8A - apic boot issues  
> > - Graphic Adapter : 512 MB Quadro NVIDIA FX580 (PCI-E)
> 
> Are you running the VESA graphics driver? I think this one is only to enable 
> self hosted development on machines without a native graphics driver. Not sure
>  but I think the VESA graphics was not designed for real time systems (or 
> can't be, because of the nature of VESA).
> 
> - Malte

Yep, I'm running the default VESA driver. I've never heard that the VESA driver is not designed for real time operation.
 But I would be glad if you can provide me with further information about this issue.

However I'm not sure if there is even the possibility to use another graphics driver for the NVIDIA FX580. Some days ago
 I though about using the GPU for dedicated time consuming calculations where you also would need an appropriate 
graphics driver....

By the way, I moved the present IOAPIC / IRQ sharing discussion to the drivers / BSP forum as suggested by Mike
see: http://community.qnx.com/sf/discussion/do/listPosts/projects.bsp/discussion.bsp.topc14273

Best Regards
Phil
Re: 6.5.0 M8A - apic boot issues  
> Yep, I'm running the default VESA driver. I've never heard that the VESA 
> driver is not designed for real time operation. But I would be glad if you can
>  provide me with further information about this issue.

I do not have further information, however my understanding of VESA is that the VESA driver is making calls into the 
VESA BIOS, which is in ROM on the graphics card. During such calls it might be forced to disable interrupts, which can 
disturb some realtime requirements. But if this happens only when mode switching or during actual graphics operations 
I'm not sure. If this is a concern for you, it may be worth a separate thread in the Drivers forum. 

Cheers,

- Malte