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Forum Topic - InterruptAttach question: (5 Items)

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Robert Murrell

01/25/2012 9:10 AM

post91127

I'm trying to share an interrupt between two devices on an x86 system with a vanilla PC architecture.  There are 
political reasons that I have to either get it working or prove it won't work other than "Its a bad idea".  Each device 
has its own interrupt handler and process thread.

On initialization each thread calls InterruptAttach on the same IRQ line.  Both calls to InterruptAttach return the same
 value.  Is this normal behavior?

Also, I have been assuming that QNX configures the 8259 PIC with level-sensitive interrupts like DOS and Windows.  Is 
this a correct assumption?

Thomas Haupt

01/25/2012 9:32 AM

post91128

RE: InterruptAttach question

Hi Robert,

level-sensitive should be correct. Identical interrupt ids would not be expected; are you sure they aren't -1, or your 
threads terminated right after attaching their interrupt handlers ?

Perhaps you'd care to post your test-case and sample output?

Cheers,
Thomas


-----Original Message-----
From: Robert Murrell [mailto:community-noreply@qnx.com] 
Sent: Mittwoch, 25. Januar 2012 15:11
To: ostech-core_os
Subject: InterruptAttach question

I'm trying to share an interrupt between two devices on an x86 system with a vanilla PC architecture.  There are 
political reasons that I have to either get it working or prove it won't work other than "Its a bad idea".  Each device 
has its own interrupt handler and process thread.

On initialization each thread calls InterruptAttach on the same IRQ line.  Both calls to InterruptAttach return the same
 value.  Is this normal behavior?

Also, I have been assuming that QNX configures the 8259 PIC with level-sensitive interrupts like DOS and Windows.  Is 
this a correct assumption?




_______________________________________________

OSTech
http://community.qnx.com/sf/go/post91127

Robert Murrell

01/25/2012 10:28 AM

post91133

Re: RE: InterruptAttach question

Well, now on testing, InterruptAttach is returning a unique ID.  So for now, I'm going to assume what I had seen 
yesterday was the result of a short between the headsets.  However, thank you for confirming that the ISA IRQs are level
-sensitive under QNX so the next guy doesn't have to guess.  I am seeing some oddities with this interrupt scheme, but I
 will make separate posts if I have more questions.

Armin Steinhoff

01/25/2012 11:19 AM

post91138

Re: InterruptAttach question

Robert Murrell wrote:
> Well, now on testing, InterruptAttach is returning a unique ID.  So for now, I'm going to assume what I had seen 
yesterday was the result of a short between the headsets.  However, thank you for confirming that the ISA IRQs are level
-sensitive under QNX

No ... the ISA interrupt is edge sensitive and this behavior has been 
defined by ISA archttecture. Level sensitive is the PCI interrupt as 
defined by the PCI standard.

--Armin



> so the next guy doesn't have to guess.  I am seeing some oddities with this interrupt scheme, but I will make separate
 posts if I have more questions.
>
>
>
>
> _______________________________________________
>
> OSTech
> http://community.qnx.com/sf/go/post91133
>
>

Robert Murrell

01/25/2012 12:42 PM

post91141

Re: InterruptAttach question

OK.  So the definitive statement is for QNX running under the ISA architecture, the PCI interrupts are level-sensitive 
and the ISA interrupts are edge-sensitive.

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