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wiki6131: XilinxZc702 (Version 18)

Xilinx Zynq7000 ZC702 EVM Board Support Package#

This BSP supports the Xilinx Zync7000 All Programmable SoC, on the Xilinx ZC702 Evaluation Kit.


QNX Neutrino 6.5.0 Service Pack 1 BSP#

Date Version Prerequisites User Guide License(s) Support Provider BSP
2013-06-14 6.5.0 SP1 QNX Momentics 6.5.0 SP1 here Apache II Experimental QNX /Adeneo here


Feature Planned Availability Format Notes
IPL Completed SRC
Startup Completed SRC
Serial Completed SRC
I2C Completed SRC
SPI Completed SRC
CAN Completed SRC
QSPI NOR flash Completed SRC
USB EHCI Host Completed BIN
Ethernet Completed SRC
RTC Completed SRC
SD/MMC Completed SRC
FPGA utility Completed SRC
XADC utility Completed SRC
OCM utility Completed SRC
GPIO library Completed SRC
DMA library Completed SRC

QNX Neutrino 6.5.0 SP1 Change History#

August 18, 2014#

  • updated GIC interrupt callout included in BSP, to reduce potential interrupt latency

January 24, 2014#

  • include prebult boot.bif and fsbl.elf in BSP
  • documentation updates to clarify process for building IPL binary with different versions of Xilinx tools
  • minor fix for an incorrect #define in the startup code

June 14, 2013#

  • add QSPI NOR flash driver source and DMA Library source
  • fix for ClockPeriod() issue (use global timer)
  • fix for ClockCycles() issue
  • update to enable FPGA access after FPGA is programmed

May 15, 2013#

  • update to address minor issues:
    • don't start watchdog timer by default in build file
    • include pre-built DMA library
    • remove duplicate wdtkick utility

May 14, 2013#

Release 1.00#

  • Initial post

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