No. Time Interface Label LSU Port Protocol Info 1 09:39:07.187386 QNET_KIF MsgSend _IO_WRITE Frame 1 (117 bytes on wire, 117 bytes captured) Arrival Time: Dec 7, 2009 09:39:07.187386000 [Time delta from previous captured frame: 0.000000000 seconds] [Time delta from previous displayed frame: 0.000000000 seconds] [Time since reference or first frame: 0.000000000 seconds] Frame Number: 1 Frame Length: 117 bytes Capture Length: 117 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0), Dst: Intel_b8:48:51 (00:0e:0c:b8:48:51) Destination: Intel_b8:48:51 (00:0e:0c:b8:48:51) Address: Intel_b8:48:51 (00:0e:0c:b8:48:51) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: L4 Data packet (0x08) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Kernel Interface (0) qos information Src_nd_for_dst: 3 Dst_nd_for_src: 7 Sconn: 0x00000001 Dconn: 0x00000003 Seq: 103852 Sos_type: Load balance (0) Src_qos_idx: 0 Offset: 0 Length: 65 crc32:0x0 [incorrect, should be 0x40adc3a4] QNX6 QNET KIF protocol .... .... .000 0101 = Type: MsgSend (0x0005) LITTLE_ENDIAN Size: 0x0030 Server_id: 1073742439 Client_handle: 278 Vinfo: virtual thread information Vtid: 1 Coid: 2 Priority: 10 Srcmsglen: 17 Keydata: 17 Srcnd: 3 Dstmsglen: 0 Zero: 0 Nbytes: 17 (0x00000011) Message: upper layer message(QNX6 message passing) Type: _IO_WRITE (0x0102) 0000 00 0e 0c b8 48 51 00 d0 c9 95 7d b0 82 04 00 00 ....HQ....}..... 0010 2a 08 03 00 03 00 07 00 01 00 00 00 03 00 00 00 *............... 0020 ac 95 01 00 00 00 00 00 00 00 00 00 41 00 00 00 ............A... 0030 00 00 00 00 05 00 30 00 67 02 00 40 16 01 00 00 ......0.g..@.... 0040 01 00 00 00 02 00 00 00 0a 00 00 00 11 00 00 00 ................ 0050 11 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 ................ 0060 11 00 00 00 02 01 10 00 01 00 00 00 00 00 00 00 ................ 0070 00 00 00 00 0a ..... No. Time Interface Label LSU Port Protocol Info 2 09:39:07.187490 QNET_LWL4 Ack Frame 2 (62 bytes on wire, 62 bytes captured) Arrival Time: Dec 7, 2009 09:39:07.187490000 [Time delta from previous captured frame: 0.000104000 seconds] [Time delta from previous displayed frame: 0.000104000 seconds] [Time since reference or first frame: 0.000104000 seconds] Frame Number: 2 Frame Length: 62 bytes Capture Length: 62 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Intel_b8:48:51 (00:0e:0c:b8:48:51), Dst: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Destination: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Intel_b8:48:51 (00:0e:0c:b8:48:51) Address: Intel_b8:48:51 (00:0e:0c:b8:48:51) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: L4 Ack packet (0x09) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Kernel Interface (0) qos information Src_nd_for_dst: 7 Dst_nd_for_src: 3 Sconn: 0x00000003 Dconn: 0x00000001 Seq: 103852 Sos_type: Load balance (0) Src_qos_idx: 53248 Offset: 0 Length: 0 crc32:0x9166210 [incorrect, should be 0x9f106fda] 0000 00 d0 c9 95 7d b0 00 0e 0c b8 48 51 82 04 00 00 ....}.....HQ.... 0010 2a 09 03 00 07 00 03 00 03 00 00 00 01 00 00 00 *............... 0020 ac 95 01 00 00 00 00 d0 00 00 00 00 00 00 00 00 ................ 0030 10 62 16 09 09 00 14 00 01 00 00 00 8a 00 .b............ No. Time Interface Label LSU Port Protocol Info 3 09:39:07.191203 QNET_KIF MsgRead Frame 3 (72 bytes on wire, 72 bytes captured) Arrival Time: Dec 7, 2009 09:39:07.191203000 [Time delta from previous captured frame: 0.003713000 seconds] [Time delta from previous displayed frame: 0.003713000 seconds] [Time since reference or first frame: 0.003817000 seconds] Frame Number: 3 Frame Length: 72 bytes Capture Length: 72 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Intel_b8:48:51 (00:0e:0c:b8:48:51), Dst: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Destination: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Intel_b8:48:51 (00:0e:0c:b8:48:51) Address: Intel_b8:48:51 (00:0e:0c:b8:48:51) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: L4 Data packet (0x08) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Kernel Interface (0) qos information Src_nd_for_dst: 7 Dst_nd_for_src: 3 Sconn: 0x00000007 Dconn: 0x00000001 Seq: 104381 Sos_type: Load balance (0) Src_qos_idx: 0 Offset: 0 Length: 20 crc32:0x8047f92 [incorrect, should be 0xbddfcb9e] QNX6 QNET KIF protocol .... .... .000 0110 = Type: MsgRead (0x0006) LITTLE_ENDIAN Size: 0x0014 Msgread_handle: 439 Client_handle: 278 Offset: 16 (0x00000010) Nbytes: 4294967295 (0xffffffff) 0000 00 d0 c9 95 7d b0 00 0e 0c b8 48 51 82 04 00 00 ....}.....HQ.... 0010 2a 08 03 00 07 00 03 00 07 00 00 00 01 00 00 00 *............... 0020 bd 97 01 00 00 00 00 00 00 00 00 00 14 00 00 00 ................ 0030 92 7f 04 08 06 00 14 00 b7 01 00 00 16 01 00 00 ................ 0040 10 00 00 00 ff ff ff ff ........ No. Time Interface Label LSU Port Protocol Info 4 09:39:07.191205 QNET_KIF MsgError Frame 4 (72 bytes on wire, 72 bytes captured) Arrival Time: Dec 7, 2009 09:39:07.191205000 [Time delta from previous captured frame: 0.000002000 seconds] [Time delta from previous displayed frame: 0.000002000 seconds] [Time since reference or first frame: 0.003819000 seconds] Frame Number: 4 Frame Length: 72 bytes Capture Length: 72 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Intel_b8:48:51 (00:0e:0c:b8:48:51), Dst: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Destination: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Intel_b8:48:51 (00:0e:0c:b8:48:51) Address: Intel_b8:48:51 (00:0e:0c:b8:48:51) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: L4 Data packet (0x08) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Kernel Interface (0) qos information Src_nd_for_dst: 7 Dst_nd_for_src: 3 Sconn: 0x00000007 Dconn: 0x00000001 Seq: 104382 Sos_type: Load balance (0) Src_qos_idx: 0 Offset: 0 Length: 20 crc32:0x8047f92 [incorrect, should be 0xc3fa443b] QNX6 QNET KIF protocol .... .... .000 1010 = Type: MsgError (0x000a) LITTLE_ENDIAN Size: 0x0014 Status: 14 Handle: 278 Offset: 0 (0x00000000) Nbytes: 0 (0x00000000) 0000 00 d0 c9 95 7d b0 00 0e 0c b8 48 51 82 04 00 00 ....}.....HQ.... 0010 2a 08 03 00 07 00 03 00 07 00 00 00 01 00 00 00 *............... 0020 be 97 01 00 00 00 00 00 00 00 00 00 14 00 00 00 ................ 0030 92 7f 04 08 0a 00 14 00 0e 00 00 00 16 01 00 00 ................ 0040 00 00 00 00 00 00 00 00 ........ No. Time Interface Label LSU Port Protocol Info 5 09:39:07.191359 QNET_LWL4 Ack Frame 5 (62 bytes on wire, 62 bytes captured) Arrival Time: Dec 7, 2009 09:39:07.191359000 [Time delta from previous captured frame: 0.000154000 seconds] [Time delta from previous displayed frame: 0.000154000 seconds] [Time since reference or first frame: 0.003973000 seconds] Frame Number: 5 Frame Length: 62 bytes Capture Length: 62 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0), Dst: Intel_b8:48:51 (00:0e:0c:b8:48:51) Destination: Intel_b8:48:51 (00:0e:0c:b8:48:51) Address: Intel_b8:48:51 (00:0e:0c:b8:48:51) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: L4 Ack packet (0x09) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Kernel Interface (0) qos information Src_nd_for_dst: 3 Dst_nd_for_src: 7 Sconn: 0x00000001 Dconn: 0x00000007 Seq: 104381 Sos_type: Load balance (0) Src_qos_idx: 3584 Offset: 0 Length: 0 crc32:0x805c408 [incorrect, should be 0x8cea6fcb] 0000 00 0e 0c b8 48 51 00 d0 c9 95 7d b0 82 04 00 00 ....HQ....}..... 0010 2a 09 03 00 03 00 07 00 01 00 00 00 07 00 00 00 *............... 0020 bd 97 01 00 00 00 00 0e 00 00 00 00 00 00 00 00 ................ 0030 08 c4 05 08 05 00 30 00 67 02 00 40 16 01 ......0.g..@.. No. Time Interface Label LSU Port Protocol Info 6 09:39:07.191361 QNET_LWL4 Ack Frame 6 (62 bytes on wire, 62 bytes captured) Arrival Time: Dec 7, 2009 09:39:07.191361000 [Time delta from previous captured frame: 0.000002000 seconds] [Time delta from previous displayed frame: 0.000002000 seconds] [Time since reference or first frame: 0.003975000 seconds] Frame Number: 6 Frame Length: 62 bytes Capture Length: 62 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0), Dst: Intel_b8:48:51 (00:0e:0c:b8:48:51) Destination: Intel_b8:48:51 (00:0e:0c:b8:48:51) Address: Intel_b8:48:51 (00:0e:0c:b8:48:51) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: L4 Ack packet (0x09) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Kernel Interface (0) qos information Src_nd_for_dst: 3 Dst_nd_for_src: 7 Sconn: 0x00000001 Dconn: 0x00000007 Seq: 104382 Sos_type: Load balance (0) Src_qos_idx: 3584 Offset: 0 Length: 0 crc32:0x805c408 [incorrect, should be 0xd0edffb1] 0000 00 0e 0c b8 48 51 00 d0 c9 95 7d b0 82 04 00 00 ....HQ....}..... 0010 2a 09 03 00 03 00 07 00 01 00 00 00 07 00 00 00 *............... 0020 be 97 01 00 00 00 00 0e 00 00 00 00 00 00 00 00 ................ 0030 08 c4 05 08 05 00 30 00 67 02 00 40 16 01 ......0.g..@.. No. Time Interface Label LSU Port Protocol Info 7 09:39:07.201758 QNET_KIF Pulse[Dissector bug, protocol LWL4: proto.c:3031: failed assertion "(guint)hfindex < gpa_hfinfo.len"] Frame 7 (160 bytes on wire, 160 bytes captured) Arrival Time: Dec 7, 2009 09:39:07.201758000 [Time delta from previous captured frame: 0.010397000 seconds] [Time delta from previous displayed frame: 0.010397000 seconds] [Time since reference or first frame: 0.014372000 seconds] Frame Number: 7 Frame Length: 160 bytes Capture Length: 160 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Intel_b8:48:51 (00:0e:0c:b8:48:51), Dst: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Destination: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Intel_b8:48:51 (00:0e:0c:b8:48:51) Address: Intel_b8:48:51 (00:0e:0c:b8:48:51) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: L4 Data packet (0x08) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Kernel Interface (0) qos information Src_nd_for_dst: 7 Dst_nd_for_src: 3 Sconn: 0x00000007 Dconn: 0x00000001 Seq: 104383 Sos_type: Load balance (0) Src_qos_idx: 0 Offset: 0 Length: 108 crc32:0x7f1fccc [incorrect, should be 0x21a06cc7] QNX6 QNET KIF protocol .... .... .000 1100 = Type: Pulse (0x000c) CRED LITTLE_ENDIAN Size: 0x006c Server_id: 1073741916 Client_handle: 275 Vinfo: virtual thread information Vtid: 1 Coid: 1073741833 Priority: 15 Srcmsglen: 20 Keydata: 0 Srcnd: 7 Dstmsglen: 0 Zero: 0 Pulse: pulse information Type: 0x0000 (0) Subtype: 0x0000 (0) Code: 0 Reserved: 0 Value: 0x00000000 (0) Scoid: 275 [Dissector bug, protocol LWL4: proto.c:3031: failed assertion "(guint)hfindex < gpa_hfinfo.len"] 0000 00 d0 c9 95 7d b0 00 0e 0c b8 48 51 82 04 00 00 ....}.....HQ.... 0010 2a 08 03 00 07 00 03 00 07 00 00 00 01 00 00 00 *............... 0020 bf 97 01 00 00 00 00 00 00 00 00 00 6c 00 00 00 ............l... 0030 cc fc f1 07 0c 01 6c 00 5c 00 00 40 13 01 00 00 ......l.\..@.... 0040 01 00 00 00 09 00 00 40 0f 00 00 00 14 00 00 00 .......@........ 0050 00 00 00 00 07 00 00 00 00 00 00 00 00 00 00 00 ................ 0060 00 00 00 00 00 00 00 00 00 00 00 00 13 01 00 00 ................ 0070 0f 00 00 00 00 00 00 00 2e 70 16 01 1b f0 0b 00 .........p...... 0080 04 00 00 00 64 00 00 00 00 00 00 00 00 00 00 00 ....d........... 0090 64 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d............... No. Time Interface Label LSU Port Protocol Info 8 09:39:07.201856 QNET_LWL4 Ack Frame 8 (62 bytes on wire, 62 bytes captured) Arrival Time: Dec 7, 2009 09:39:07.201856000 [Time delta from previous captured frame: 0.000098000 seconds] [Time delta from previous displayed frame: 0.000098000 seconds] [Time since reference or first frame: 0.014470000 seconds] Frame Number: 8 Frame Length: 62 bytes Capture Length: 62 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0), Dst: Intel_b8:48:51 (00:0e:0c:b8:48:51) Destination: Intel_b8:48:51 (00:0e:0c:b8:48:51) Address: Intel_b8:48:51 (00:0e:0c:b8:48:51) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: L4 Ack packet (0x09) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Kernel Interface (0) qos information Src_nd_for_dst: 3 Dst_nd_for_src: 7 Sconn: 0x00000001 Dconn: 0x00000007 Seq: 104383 Sos_type: Load balance (0) Src_qos_idx: 3584 Offset: 0 Length: 0 crc32:0x805c408 [incorrect, should be 0xe4ef7067] 0000 00 0e 0c b8 48 51 00 d0 c9 95 7d b0 82 04 00 00 ....HQ....}..... 0010 2a 09 03 00 03 00 07 00 01 00 00 00 07 00 00 00 *............... 0020 bf 97 01 00 00 00 00 0e 00 00 00 00 00 00 00 00 ................ 0030 08 c4 05 08 05 00 30 00 67 02 00 40 16 01 ......0.g..@.. No. Time Interface Label LSU Port Protocol Info 9 09:39:07.201965 QNET_QOS Qos TCS_REM_DOWN Message Frame 9 (62 bytes on wire, 62 bytes captured) Arrival Time: Dec 7, 2009 09:39:07.201965000 [Time delta from previous captured frame: 0.000109000 seconds] [Time delta from previous displayed frame: 0.000109000 seconds] [Time since reference or first frame: 0.014579000 seconds] Frame Number: 9 Frame Length: 62 bytes Capture Length: 62 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0), Dst: Intel_b8:48:51 (00:0e:0c:b8:48:51) Destination: Intel_b8:48:51 (00:0e:0c:b8:48:51) Address: Intel_b8:48:51 (00:0e:0c:b8:48:51) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: LWL4 RX tears connection down (0x05) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Kernel Interface (0) qos information Src_nd_for_dst: 3 Dst_nd_for_src: 7 Sconn: 0x00000001 Dconn: 0x00000007 Seq: 0 Sos_type: Load balance (0) Src_qos_idx: 0 Offset: 0 Length: 0 crc32:0x7f93a98 [incorrect, should be 0xefc6c4f8] 0000 00 0e 0c b8 48 51 00 d0 c9 95 7d b0 82 04 00 00 ....HQ....}..... 0010 2a 05 03 00 03 00 07 00 01 00 00 00 07 00 00 00 *............... 0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0030 98 3a f9 07 05 00 30 00 67 02 00 40 16 01 .:....0.g..@.. No. Time Interface Label LSU Port Protocol Info 10 09:39:07.202132 QNET_QOS Qos TCS_REM_DOWN Message Frame 10 (62 bytes on wire, 62 bytes captured) Arrival Time: Dec 7, 2009 09:39:07.202132000 [Time delta from previous captured frame: 0.000167000 seconds] [Time delta from previous displayed frame: 0.000167000 seconds] [Time since reference or first frame: 0.014746000 seconds] Frame Number: 10 Frame Length: 62 bytes Capture Length: 62 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Intel_b8:48:51 (00:0e:0c:b8:48:51), Dst: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Destination: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Intel_b8:48:51 (00:0e:0c:b8:48:51) Address: Intel_b8:48:51 (00:0e:0c:b8:48:51) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: LWL4 RX tears connection down (0x05) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Kernel Interface (0) qos information Src_nd_for_dst: 7 Dst_nd_for_src: 3 Sconn: 0x00000003 Dconn: 0x00000001 Seq: 0 Sos_type: Load balance (0) Src_qos_idx: 0 Offset: 0 Length: 0 crc32:0x0 [incorrect, should be 0x75a13c8e] 0000 00 d0 c9 95 7d b0 00 0e 0c b8 48 51 82 04 00 00 ....}.....HQ.... 0010 2a 05 03 00 07 00 03 00 03 00 00 00 01 00 00 00 *............... 0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0030 00 00 00 00 0a 00 14 00 0e 00 00 00 8c 00 .............. No. Time Interface Label LSU Port Protocol Info 11 09:39:07.202134 QNET_QOS Qos TCS_DOWN Message Frame 11 (62 bytes on wire, 62 bytes captured) Arrival Time: Dec 7, 2009 09:39:07.202134000 [Time delta from previous captured frame: 0.000002000 seconds] [Time delta from previous displayed frame: 0.000002000 seconds] [Time since reference or first frame: 0.014748000 seconds] Frame Number: 11 Frame Length: 62 bytes Capture Length: 62 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Intel_b8:48:51 (00:0e:0c:b8:48:51), Dst: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Destination: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Intel_b8:48:51 (00:0e:0c:b8:48:51) Address: Intel_b8:48:51 (00:0e:0c:b8:48:51) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: LWL4 RX tears connection down (0x04) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Kernel Interface (0) qos information Src_nd_for_dst: 7 Dst_nd_for_src: 3 Sconn: 0x00000007 Dconn: 0x00000001 Seq: 0 Sos_type: Load balance (0) Src_qos_idx: 0 Offset: 0 Length: 0 crc32:0x0 [incorrect, should be 0xa97043aa] 0000 00 d0 c9 95 7d b0 00 0e 0c b8 48 51 82 04 00 00 ....}.....HQ.... 0010 2a 04 03 00 07 00 03 00 07 00 00 00 01 00 00 00 *............... 0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0030 00 00 00 00 06 00 14 00 f0 00 00 00 9c 00 .............. No. Time Interface Label LSU Port Protocol Info 12 09:39:07.232078 QNET_LR Who is "ppu4.Mx10A"? Tell "ppu4.Mx10A"@00:d0:c9:9c:52:ce Frame 12 (150 bytes on wire, 150 bytes captured) Arrival Time: Dec 7, 2009 09:39:07.232078000 [Time delta from previous captured frame: 0.029944000 seconds] [Time delta from previous displayed frame: 0.029944000 seconds] [Time since reference or first frame: 0.044692000 seconds] Frame Number: 12 Frame Length: 150 bytes Capture Length: 150 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] [Coloring Rule Name: Broadcast] [Coloring Rule String: eth[0] & 1] Ethernet II, Src: Advantec_9c:52:ce (00:d0:c9:9c:52:ce), Dst: Broadcast (ff:ff:ff:ff:ff:ff) Destination: Broadcast (ff:ff:ff:ff:ff:ff) Address: Broadcast (ff:ff:ff:ff:ff:ff) .... ...1 .... .... .... .... = IG bit: Group address (multicast/broadcast) .... ..1. .... .... .... .... = LG bit: Locally administered address (this is NOT the factory default) Source: Advantec_9c:52:ce (00:d0:c9:9c:52:ce) Address: Advantec_9c:52:ce (00:d0:c9:9c:52:ce) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: L4 Lan Resolver packets (0x0b) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Lan Resolver (2) qos information Src_nd_for_dst: 0 Dst_nd_for_src: 0 Sconn: 0x00000000 Dconn: 0x00000000 Seq: 0 Sos_type: Load balance (0) Src_qos_idx: 0 Offset: 0 Length: 98 crc32:0x1057801c [incorrect, should be 0xf74ad589] QNX6 QNET LR protocol Version: 1 (1) Type: Request (0x01) Length: 98 Source: source node information name Offset: 4 Length: 5 [Name: ppu4] domain Offset: 9 Length: 6 [Domain: Mx10A] address Offset: 15 Length: 16 [Address: 0x0110 (00:d0:c9:9c:52:ce)] Destination: destination node information name Offset: 31 Length: 5 [Name: ppu4] domain Offset: 36 Length: 6 [domain: Mx10A] address Offset: 0 Length: 0 0000 ff ff ff ff ff ff 00 d0 c9 9c 52 ce 82 04 00 00 ..........R..... 0010 2a 0b 03 02 00 00 00 00 00 00 00 00 00 00 00 00 *............... 0020 00 00 00 00 00 00 00 00 00 00 00 00 62 00 00 00 ............b... 0030 1c 80 57 10 01 00 01 00 62 00 00 00 04 00 00 00 ..W.....b....... 0040 05 00 00 00 09 00 00 00 06 00 00 00 0f 00 00 00 ................ 0050 10 00 00 00 1f 00 00 00 05 00 00 00 24 00 00 00 ............$... 0060 06 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0070 70 70 75 34 00 4d 78 31 30 41 00 10 01 00 d0 c9 ppu4.Mx10A...... 0080 9c 52 ce 00 00 00 00 00 00 00 00 70 70 75 34 00 .R.........ppu4. 0090 4d 78 31 30 41 00 Mx10A. No. Time Interface Label LSU Port Protocol Info 13 09:39:07.232225 QNET_LR To "ppu4.Mx10A", "ppu2.Mx10A" is at 00:d0:c9:95:7d:b0 Frame 13 (166 bytes on wire, 166 bytes captured) Arrival Time: Dec 7, 2009 09:39:07.232225000 [Time delta from previous captured frame: 0.000147000 seconds] [Time delta from previous displayed frame: 0.000147000 seconds] [Time since reference or first frame: 0.044839000 seconds] Frame Number: 13 Frame Length: 166 bytes Capture Length: 166 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0), Dst: Advantec_9c:52:ce (00:d0:c9:9c:52:ce) Destination: Advantec_9c:52:ce (00:d0:c9:9c:52:ce) Address: Advantec_9c:52:ce (00:d0:c9:9c:52:ce) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: L4 Lan Resolver packets (0x0b) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Lan Resolver (2) qos information Src_nd_for_dst: 0 Dst_nd_for_src: 0 Sconn: 0x00000000 Dconn: 0x00000000 Seq: 0 Sos_type: Load balance (0) Src_qos_idx: 0 Offset: 0 Length: 114 crc32:0xcb [incorrect, should be 0x3f473f0e] QNX6 QNET LR protocol Version: 1 (1) Type: Reply (0x02) Length: 114 Source: source node information name Offset: 4 Length: 5 [Name: ppu2] domain Offset: 9 Length: 6 [Domain: Mx10A] address Offset: 15 Length: 16 [Address: 0x0110 (00:d0:c9:95:7d:b0)] Destination: destination node information name Offset: 31 Length: 5 [Name: ppu4] domain Offset: 36 Length: 6 [domain: Mx10A] address Offset: 42 Length: 16 [Address: 0x0110 (00:d0:c9:9c:52:ce)] 0000 00 d0 c9 9c 52 ce 00 d0 c9 95 7d b0 82 04 00 00 ....R.....}..... 0010 2a 0b 03 02 00 00 00 00 00 00 00 00 00 00 00 00 *............... 0020 00 00 00 00 00 00 00 00 00 00 00 00 72 00 00 00 ............r... 0030 cb 00 00 00 01 00 02 00 72 00 00 00 04 00 00 00 ........r....... 0040 05 00 00 00 09 00 00 00 06 00 00 00 0f 00 00 00 ................ 0050 10 00 00 00 1f 00 00 00 05 00 00 00 24 00 00 00 ............$... 0060 06 00 00 00 2a 00 00 00 10 00 00 00 00 00 00 00 ....*........... 0070 70 70 75 32 00 4d 78 31 30 41 00 10 01 00 d0 c9 ppu2.Mx10A...... 0080 95 7d b0 00 00 00 00 00 00 00 00 70 70 75 34 00 .}.........ppu4. 0090 4d 78 31 30 41 00 10 01 00 d0 c9 9c 52 ce 00 00 Mx10A.......R... 00a0 00 00 00 00 00 00 ...... No. Time Interface Label LSU Port Protocol Info 14 09:39:13.218034 QNET_LR Who is "ppu2.Mx10A"? Tell "ppu2.Mx10A"@00:d0:c9:95:7d:b0 Frame 14 (150 bytes on wire, 150 bytes captured) Arrival Time: Dec 7, 2009 09:39:13.218034000 [Time delta from previous captured frame: 5.985809000 seconds] [Time delta from previous displayed frame: 5.985809000 seconds] [Time since reference or first frame: 6.030648000 seconds] Frame Number: 14 Frame Length: 150 bytes Capture Length: 150 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] [Coloring Rule Name: Broadcast] [Coloring Rule String: eth[0] & 1] Ethernet II, Src: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0), Dst: Broadcast (ff:ff:ff:ff:ff:ff) Destination: Broadcast (ff:ff:ff:ff:ff:ff) Address: Broadcast (ff:ff:ff:ff:ff:ff) .... ...1 .... .... .... .... = IG bit: Group address (multicast/broadcast) .... ..1. .... .... .... .... = LG bit: Locally administered address (this is NOT the factory default) Source: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: L4 Lan Resolver packets (0x0b) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Lan Resolver (2) qos information Src_nd_for_dst: 0 Dst_nd_for_src: 0 Sconn: 0x00000000 Dconn: 0x00000000 Seq: 0 Sos_type: Load balance (0) Src_qos_idx: 0 Offset: 0 Length: 98 crc32:0x7efed20 [incorrect, should be 0xc5a9d140] QNX6 QNET LR protocol Version: 1 (1) Type: Request (0x01) Length: 98 Source: source node information name Offset: 4 Length: 5 [Name: ppu2] domain Offset: 9 Length: 6 [Domain: Mx10A] address Offset: 15 Length: 16 [Address: 0x0110 (00:d0:c9:95:7d:b0)] Destination: destination node information name Offset: 31 Length: 5 [Name: ppu2] domain Offset: 36 Length: 6 [domain: Mx10A] address Offset: 0 Length: 0 0000 ff ff ff ff ff ff 00 d0 c9 95 7d b0 82 04 00 00 ..........}..... 0010 2a 0b 03 02 00 00 00 00 00 00 00 00 00 00 00 00 *............... 0020 00 00 00 00 00 00 00 00 00 00 00 00 62 00 00 00 ............b... 0030 20 ed ef 07 01 00 01 00 62 00 00 00 04 00 00 00 .......b....... 0040 05 00 00 00 09 00 00 00 06 00 00 00 0f 00 00 00 ................ 0050 10 00 00 00 1f 00 00 00 05 00 00 00 24 00 00 00 ............$... 0060 06 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0070 70 70 75 32 00 4d 78 31 30 41 00 10 01 00 d0 c9 ppu2.Mx10A...... 0080 95 7d b0 00 00 00 00 00 00 00 00 70 70 75 32 00 .}.........ppu2. 0090 4d 78 31 30 41 00 Mx10A. No. Time Interface Label LSU Port Protocol Info 15 09:39:13.218182 QNET_LR To "ppu2.Mx10A", "ppu4.Mx10A" is at 00:d0:c9:9c:52:ce Frame 15 (166 bytes on wire, 166 bytes captured) Arrival Time: Dec 7, 2009 09:39:13.218182000 [Time delta from previous captured frame: 0.000148000 seconds] [Time delta from previous displayed frame: 0.000148000 seconds] [Time since reference or first frame: 6.030796000 seconds] Frame Number: 15 Frame Length: 166 bytes Capture Length: 166 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Advantec_9c:52:ce (00:d0:c9:9c:52:ce), Dst: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Destination: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Advantec_9c:52:ce (00:d0:c9:9c:52:ce) Address: Advantec_9c:52:ce (00:d0:c9:9c:52:ce) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: L4 Lan Resolver packets (0x0b) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Lan Resolver (2) qos information Src_nd_for_dst: 0 Dst_nd_for_src: 0 Sconn: 0x00000000 Dconn: 0x00000000 Seq: 0 Sos_type: Load balance (0) Src_qos_idx: 0 Offset: 0 Length: 114 crc32:0x14 [incorrect, should be 0x9c88f35e] QNX6 QNET LR protocol Version: 1 (1) Type: Reply (0x02) Length: 114 Source: source node information name Offset: 4 Length: 5 [Name: ppu4] domain Offset: 9 Length: 6 [Domain: Mx10A] address Offset: 15 Length: 16 [Address: 0x0110 (00:d0:c9:9c:52:ce)] Destination: destination node information name Offset: 31 Length: 5 [Name: ppu2] domain Offset: 36 Length: 6 [domain: Mx10A] address Offset: 42 Length: 16 [Address: 0x0110 (00:d0:c9:95:7d:b0)] 0000 00 d0 c9 95 7d b0 00 d0 c9 9c 52 ce 82 04 00 00 ....}.....R..... 0010 2a 0b 03 02 00 00 00 00 00 00 00 00 00 00 00 00 *............... 0020 00 00 00 00 00 00 00 00 00 00 00 00 72 00 00 00 ............r... 0030 14 00 00 00 01 00 02 00 72 00 00 00 04 00 00 00 ........r....... 0040 05 00 00 00 09 00 00 00 06 00 00 00 0f 00 00 00 ................ 0050 10 00 00 00 1f 00 00 00 05 00 00 00 24 00 00 00 ............$... 0060 06 00 00 00 2a 00 00 00 10 00 00 00 00 00 00 00 ....*........... 0070 70 70 75 34 00 4d 78 31 30 41 00 10 01 00 d0 c9 ppu4.Mx10A...... 0080 9c 52 ce 00 00 00 00 00 00 00 00 70 70 75 32 00 .R.........ppu2. 0090 4d 78 31 30 41 00 10 01 00 d0 c9 95 7d b0 00 00 Mx10A.......}... 00a0 00 00 00 00 00 00 ...... No. Time Interface Label LSU Port Protocol Info 16 09:39:13.218390 QNET_LR To "ppu2.Mx10A", "Mx10A.Mx10A" is at 00:0e:0c:b8:48:51 Frame 16 (167 bytes on wire, 167 bytes captured) Arrival Time: Dec 7, 2009 09:39:13.218390000 [Time delta from previous captured frame: 0.000208000 seconds] [Time delta from previous displayed frame: 0.000208000 seconds] [Time since reference or first frame: 6.031004000 seconds] Frame Number: 16 Frame Length: 167 bytes Capture Length: 167 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Intel_b8:48:51 (00:0e:0c:b8:48:51), Dst: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Destination: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Intel_b8:48:51 (00:0e:0c:b8:48:51) Address: Intel_b8:48:51 (00:0e:0c:b8:48:51) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: L4 Lan Resolver packets (0x0b) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Lan Resolver (2) qos information Src_nd_for_dst: 0 Dst_nd_for_src: 0 Sconn: 0x00000000 Dconn: 0x00000000 Seq: 0 Sos_type: Load balance (0) Src_qos_idx: 0 Offset: 0 Length: 115 crc32:0x920201c [incorrect, should be 0x23c14ece] QNX6 QNET LR protocol Version: 1 (1) Type: Reply (0x02) Length: 115 Source: source node information name Offset: 4 Length: 6 [Name: Mx10A] domain Offset: 10 Length: 6 [Domain: Mx10A] address Offset: 16 Length: 16 [Address: 0x0110 (00:0e:0c:b8:48:51)] Destination: destination node information name Offset: 32 Length: 5 [Name: ppu2] domain Offset: 37 Length: 6 [domain: Mx10A] address Offset: 43 Length: 16 [Address: 0x0110 (00:d0:c9:95:7d:b0)] 0000 00 d0 c9 95 7d b0 00 0e 0c b8 48 51 82 04 00 00 ....}.....HQ.... 0010 2a 0b 03 02 00 00 00 00 00 00 00 00 00 00 00 00 *............... 0020 00 00 00 00 00 00 00 00 00 00 00 00 73 00 00 00 ............s... 0030 1c 20 20 09 01 00 02 00 73 00 00 00 04 00 00 00 . .....s....... 0040 06 00 00 00 0a 00 00 00 06 00 00 00 10 00 00 00 ................ 0050 10 00 00 00 20 00 00 00 05 00 00 00 25 00 00 00 .... .......%... 0060 06 00 00 00 2b 00 00 00 10 00 00 00 00 00 00 00 ....+........... 0070 4d 78 31 30 41 00 4d 78 31 30 41 00 10 01 00 0e Mx10A.Mx10A..... 0080 0c b8 48 51 00 00 00 00 00 00 00 00 70 70 75 32 ..HQ........ppu2 0090 00 4d 78 31 30 41 00 10 01 00 d0 c9 95 7d b0 00 .Mx10A.......}.. 00a0 00 00 00 00 00 00 00 ....... No. Time Interface Label LSU Port Protocol Info 17 09:39:13.218533 QNET_LR To "ppu2.Mx10A", "ppu1.Mx10A" is at 00:d0:c9:95:f2:6c Frame 17 (166 bytes on wire, 166 bytes captured) Arrival Time: Dec 7, 2009 09:39:13.218533000 [Time delta from previous captured frame: 0.000143000 seconds] [Time delta from previous displayed frame: 0.000143000 seconds] [Time since reference or first frame: 6.031147000 seconds] Frame Number: 17 Frame Length: 166 bytes Capture Length: 166 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Advantec_95:f2:6c (00:d0:c9:95:f2:6c), Dst: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Destination: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Advantec_95:f2:6c (00:d0:c9:95:f2:6c) Address: Advantec_95:f2:6c (00:d0:c9:95:f2:6c) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: L4 Lan Resolver packets (0x0b) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Lan Resolver (2) qos information Src_nd_for_dst: 0 Dst_nd_for_src: 0 Sconn: 0x00000000 Dconn: 0x00000000 Seq: 0 Sos_type: Load balance (0) Src_qos_idx: 0 Offset: 0 Length: 114 crc32:0xcb [incorrect, should be 0xa1748969] QNX6 QNET LR protocol Version: 1 (1) Type: Reply (0x02) Length: 114 Source: source node information name Offset: 4 Length: 5 [Name: ppu1] domain Offset: 9 Length: 6 [Domain: Mx10A] address Offset: 15 Length: 16 [Address: 0x0110 (00:d0:c9:95:f2:6c)] Destination: destination node information name Offset: 31 Length: 5 [Name: ppu2] domain Offset: 36 Length: 6 [domain: Mx10A] address Offset: 42 Length: 16 [Address: 0x0110 (00:d0:c9:95:7d:b0)] 0000 00 d0 c9 95 7d b0 00 d0 c9 95 f2 6c 82 04 00 00 ....}......l.... 0010 2a 0b 03 02 00 00 00 00 00 00 00 00 00 00 00 00 *............... 0020 00 00 00 00 00 00 00 00 00 00 00 00 72 00 00 00 ............r... 0030 cb 00 00 00 01 00 02 00 72 00 00 00 04 00 00 00 ........r....... 0040 05 00 00 00 09 00 00 00 06 00 00 00 0f 00 00 00 ................ 0050 10 00 00 00 1f 00 00 00 05 00 00 00 24 00 00 00 ............$... 0060 06 00 00 00 2a 00 00 00 10 00 00 00 00 00 00 00 ....*........... 0070 70 70 75 31 00 4d 78 31 30 41 00 10 01 00 d0 c9 ppu1.Mx10A...... 0080 95 f2 6c 00 00 00 00 00 00 00 00 70 70 75 32 00 ..l........ppu2. 0090 4d 78 31 30 41 00 10 01 00 d0 c9 95 7d b0 00 00 Mx10A.......}... 00a0 00 00 00 00 00 00 ...... No. Time Interface Label LSU Port Protocol Info 18 09:39:13.880265 0x9000 Loopback Frame 18 (60 bytes on wire, 60 bytes captured) Arrival Time: Dec 7, 2009 09:39:13.880265000 [Time delta from previous captured frame: 0.661732000 seconds] [Time delta from previous displayed frame: 0.661732000 seconds] [Time since reference or first frame: 6.692879000 seconds] Frame Number: 18 Frame Length: 60 bytes Capture Length: 60 bytes [Frame is marked: False] [Protocols in frame: eth:data] Ethernet II, Src: Cisco_a0:82:94 (00:13:19:a0:82:94), Dst: Cisco_a0:82:94 (00:13:19:a0:82:94) Destination: Cisco_a0:82:94 (00:13:19:a0:82:94) Address: Cisco_a0:82:94 (00:13:19:a0:82:94) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Cisco_a0:82:94 (00:13:19:a0:82:94) Address: Cisco_a0:82:94 (00:13:19:a0:82:94) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Loopback (0x9000) Data (46 bytes) Data: 000001000000000000000000000000000000000000000000... 0000 00 13 19 a0 82 94 00 13 19 a0 82 94 90 00 00 00 ................ 0010 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0030 00 00 00 00 00 00 00 00 00 00 00 00 ............ No. Time Interface Label LSU Port Protocol Info 19 09:39:22.486265 Ethernet IEEE 802.3 Ethernet Frame 19 (60 bytes on wire, 60 bytes captured) Arrival Time: Dec 7, 2009 09:39:22.486265000 [Time delta from previous captured frame: 8.606000000 seconds] [Time delta from previous displayed frame: 8.606000000 seconds] [Time since reference or first frame: 15.298879000 seconds] Frame Number: 19 Frame Length: 60 bytes Capture Length: 60 bytes [Frame is marked: False] [Protocols in frame: eth:data] [Coloring Rule Name: Broadcast] [Coloring Rule String: eth[0] & 1] IEEE 802.3 Ethernet Destination: CDP/VTP/DTP/PAgP/UDLD (01:00:0c:cc:cc:cc) Address: CDP/VTP/DTP/PAgP/UDLD (01:00:0c:cc:cc:cc) .... ...1 .... .... .... .... = IG bit: Group address (multicast/broadcast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Cisco_a0:82:94 (00:13:19:a0:82:94) Address: Cisco_a0:82:94 (00:13:19:a0:82:94) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Length: 34 Trailer: 000000000000000000000000 Data (34 bytes) Data: AAAA0300000C200401000100050000020005040003000540... 0000 01 00 0c cc cc cc 00 13 19 a0 82 94 00 22 aa aa .............".. 0010 03 00 00 0c 20 04 01 00 01 00 05 00 00 02 00 05 .... ........... 0020 04 00 03 00 05 40 00 04 00 0a 00 13 19 a0 82 94 .....@.......... 0030 00 00 00 00 00 00 00 00 00 00 00 00 ............ No. Time Interface Label LSU Port Protocol Info 20 09:39:22.486267 Ethernet IEEE 802.3 Ethernet Frame 20 (90 bytes on wire, 90 bytes captured) Arrival Time: Dec 7, 2009 09:39:22.486267000 [Time delta from previous captured frame: 0.000002000 seconds] [Time delta from previous displayed frame: 0.000002000 seconds] [Time since reference or first frame: 15.298881000 seconds] Frame Number: 20 Frame Length: 90 bytes Capture Length: 90 bytes [Frame is marked: False] [Protocols in frame: eth:eth:data] [Coloring Rule Name: Broadcast] [Coloring Rule String: eth[0] & 1] ISL Destination: 01000C0000 0000 .... = Type: Ethernet (0) .... 0000 = User: Best effort (default priority) (0) Source: Cisco_a0:82:94 (00:13:19:a0:82:94) Length: 76 DSAP: 0xAA SSAP: 0xAA Control: 0x3 HSA: 0x00000c 0000 0000 0000 001. = VLAN ID: 0x0001 .... .... .... ...1 = BPDU: Yes Index: 0 IEEE 802.3 Ethernet Destination: CDP/VTP/DTP/PAgP/UDLD (01:00:0c:cc:cc:cc) Address: CDP/VTP/DTP/PAgP/UDLD (01:00:0c:cc:cc:cc) .... ...1 .... .... .... .... = IG bit: Group address (multicast/broadcast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Cisco_a0:82:94 (00:13:19:a0:82:94) Address: Cisco_a0:82:94 (00:13:19:a0:82:94) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Length: 34 Trailer: 000000000000000000000000 Frame check sequence: 0xf4f4f262 [correct] Data (34 bytes) Data: AAAA0300000C200401000100050000020005040003000540... 0000 01 00 0c 00 00 00 00 13 19 a0 82 94 00 4c aa aa .............L.. 0010 03 00 00 0c 00 03 00 00 00 00 01 00 0c cc cc cc ................ 0020 00 13 19 a0 82 94 00 22 aa aa 03 00 00 0c 20 04 ......."...... . 0030 01 00 01 00 05 00 00 02 00 05 04 00 03 00 05 40 ...............@ 0040 00 04 00 0a 00 13 19 a0 82 94 00 00 00 00 00 00 ................ 0050 00 00 00 00 00 00 f4 f4 f2 62 .........b No. Time Interface Label LSU Port Protocol Info 21 09:39:22.550038 QNET_LR Who is "Mx10A.Mx10A"? Tell "Mx10A.Mx10A"@00:0e:0c:b8:48:51 Frame 21 (152 bytes on wire, 152 bytes captured) Arrival Time: Dec 7, 2009 09:39:22.550038000 [Time delta from previous captured frame: 0.063771000 seconds] [Time delta from previous displayed frame: 0.063771000 seconds] [Time since reference or first frame: 15.362652000 seconds] Frame Number: 21 Frame Length: 152 bytes Capture Length: 152 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] [Coloring Rule Name: Broadcast] [Coloring Rule String: eth[0] & 1] Ethernet II, Src: Intel_b8:48:51 (00:0e:0c:b8:48:51), Dst: Broadcast (ff:ff:ff:ff:ff:ff) Destination: Broadcast (ff:ff:ff:ff:ff:ff) Address: Broadcast (ff:ff:ff:ff:ff:ff) .... ...1 .... .... .... .... = IG bit: Group address (multicast/broadcast) .... ..1. .... .... .... .... = LG bit: Locally administered address (this is NOT the factory default) Source: Intel_b8:48:51 (00:0e:0c:b8:48:51) Address: Intel_b8:48:51 (00:0e:0c:b8:48:51) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: L4 Lan Resolver packets (0x0b) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Lan Resolver (2) qos information Src_nd_for_dst: 0 Dst_nd_for_src: 0 Sconn: 0x00000000 Dconn: 0x00000000 Seq: 0 Sos_type: Load balance (0) Src_qos_idx: 0 Offset: 0 Length: 100 crc32:0x0 [incorrect, should be 0x42d55677] QNX6 QNET LR protocol Version: 1 (1) Type: Request (0x01) Length: 100 Source: source node information name Offset: 4 Length: 6 [Name: Mx10A] domain Offset: 10 Length: 6 [Domain: Mx10A] address Offset: 16 Length: 16 [Address: 0x0110 (00:0e:0c:b8:48:51)] Destination: destination node information name Offset: 32 Length: 6 [Name: Mx10A] domain Offset: 38 Length: 6 [domain: Mx10A] address Offset: 0 Length: 0 0000 ff ff ff ff ff ff 00 0e 0c b8 48 51 82 04 00 00 ..........HQ.... 0010 2a 0b 03 02 00 00 00 00 00 00 00 00 00 00 00 00 *............... 0020 00 00 00 00 00 00 00 00 00 00 00 00 64 00 00 00 ............d... 0030 00 00 00 00 01 00 01 00 64 00 00 00 04 00 00 00 ........d....... 0040 06 00 00 00 0a 00 00 00 06 00 00 00 10 00 00 00 ................ 0050 10 00 00 00 20 00 00 00 06 00 00 00 26 00 00 00 .... .......&... 0060 06 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0070 4d 78 31 30 41 00 4d 78 31 30 41 00 10 01 00 0e Mx10A.Mx10A..... 0080 0c b8 48 51 00 00 00 00 00 00 00 00 4d 78 31 30 ..HQ........Mx10 0090 41 00 4d 78 31 30 41 00 A.Mx10A. No. Time Interface Label LSU Port Protocol Info 22 09:39:22.550183 QNET_LR To "Mx10A.Mx10A", "ppu2.Mx10A" is at 00:d0:c9:95:7d:b0 Frame 22 (167 bytes on wire, 167 bytes captured) Arrival Time: Dec 7, 2009 09:39:22.550183000 [Time delta from previous captured frame: 0.000145000 seconds] [Time delta from previous displayed frame: 0.000145000 seconds] [Time since reference or first frame: 15.362797000 seconds] Frame Number: 22 Frame Length: 167 bytes Capture Length: 167 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0), Dst: Intel_b8:48:51 (00:0e:0c:b8:48:51) Destination: Intel_b8:48:51 (00:0e:0c:b8:48:51) Address: Intel_b8:48:51 (00:0e:0c:b8:48:51) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: L4 Lan Resolver packets (0x0b) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Lan Resolver (2) qos information Src_nd_for_dst: 0 Dst_nd_for_src: 0 Sconn: 0x00000000 Dconn: 0x00000000 Seq: 0 Sos_type: Load balance (0) Src_qos_idx: 0 Offset: 0 Length: 115 crc32:0x40 [incorrect, should be 0x7288a85e] QNX6 QNET LR protocol Version: 1 (1) Type: Reply (0x02) Length: 115 Source: source node information name Offset: 4 Length: 5 [Name: ppu2] domain Offset: 9 Length: 6 [Domain: Mx10A] address Offset: 15 Length: 16 [Address: 0x0110 (00:d0:c9:95:7d:b0)] Destination: destination node information name Offset: 31 Length: 6 [Name: Mx10A] domain Offset: 37 Length: 6 [domain: Mx10A] address Offset: 43 Length: 16 [Address: 0x0110 (00:0e:0c:b8:48:51)] 0000 00 0e 0c b8 48 51 00 d0 c9 95 7d b0 82 04 00 00 ....HQ....}..... 0010 2a 0b 03 02 00 00 00 00 00 00 00 00 00 00 00 00 *............... 0020 00 00 00 00 00 00 00 00 00 00 00 00 73 00 00 00 ............s... 0030 40 00 00 00 01 00 02 00 73 00 00 00 04 00 00 00 @.......s....... 0040 05 00 00 00 09 00 00 00 06 00 00 00 0f 00 00 00 ................ 0050 10 00 00 00 1f 00 00 00 06 00 00 00 25 00 00 00 ............%... 0060 06 00 00 00 2b 00 00 00 10 00 00 00 00 00 00 00 ....+........... 0070 70 70 75 32 00 4d 78 31 30 41 00 10 01 00 d0 c9 ppu2.Mx10A...... 0080 95 7d b0 00 00 00 00 00 00 00 00 4d 78 31 30 41 .}.........Mx10A 0090 00 4d 78 31 30 41 00 10 01 00 0e 0c b8 48 51 00 .Mx10A.......HQ. 00a0 00 00 00 00 00 00 00 ....... No. Time Interface Label LSU Port Protocol Info 23 09:39:23.887091 0x9000 Loopback Frame 23 (60 bytes on wire, 60 bytes captured) Arrival Time: Dec 7, 2009 09:39:23.887091000 [Time delta from previous captured frame: 1.336908000 seconds] [Time delta from previous displayed frame: 1.336908000 seconds] [Time since reference or first frame: 16.699705000 seconds] Frame Number: 23 Frame Length: 60 bytes Capture Length: 60 bytes [Frame is marked: False] [Protocols in frame: eth:data] Ethernet II, Src: Cisco_a0:82:94 (00:13:19:a0:82:94), Dst: Cisco_a0:82:94 (00:13:19:a0:82:94) Destination: Cisco_a0:82:94 (00:13:19:a0:82:94) Address: Cisco_a0:82:94 (00:13:19:a0:82:94) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Cisco_a0:82:94 (00:13:19:a0:82:94) Address: Cisco_a0:82:94 (00:13:19:a0:82:94) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Loopback (0x9000) Data (46 bytes) Data: 000001000000000000000000000000000000000000000000... 0000 00 13 19 a0 82 94 00 13 19 a0 82 94 90 00 00 00 ................ 0010 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0030 00 00 00 00 00 00 00 00 00 00 00 00 ............ No. Time Interface Label LSU Port Protocol Info 24 09:39:30.088740 QNET_QOS Qos TCS_INIT Message Frame 24 (83 bytes on wire, 83 bytes captured) Arrival Time: Dec 7, 2009 09:39:30.088740000 [Time delta from previous captured frame: 6.201649000 seconds] [Time delta from previous displayed frame: 6.201649000 seconds] [Time since reference or first frame: 22.901354000 seconds] Frame Number: 24 Frame Length: 83 bytes Capture Length: 83 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Intel_b8:48:51 (00:0e:0c:b8:48:51), Dst: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Destination: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Intel_b8:48:51 (00:0e:0c:b8:48:51) Address: Intel_b8:48:51 (00:0e:0c:b8:48:51) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: LWL4 TX establishing connection (0x01) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Kernel Interface (0) qos information Src_nd_for_dst: 9 Dst_nd_for_src: 0 Sconn: 0x00000009 Dconn: 0x00000000 Seq: 0 Sos_type: Load balance (0) Src_qos_idx: 0 Offset: 0 Length: 31 crc32:0xb82f7ce0 [incorrect, should be 0x1bac56a9] QNX6 QNET QOS protocol Src_name_off: 0 [Src_name: Mx10A] Src_domain_off: 6 [Src_domain: Mx10A] Dst_name_off: 12 [Dst_name: ppu2] Dst_domain_off: 17 [Dst_domain: Mx10A] 0000 00 d0 c9 95 7d b0 00 0e 0c b8 48 51 82 04 00 00 ....}.....HQ.... 0010 2a 01 03 00 09 00 00 00 09 00 00 00 00 00 00 00 *............... 0020 00 00 00 00 00 00 00 00 00 00 00 00 1f 00 00 00 ................ 0030 e0 7c 2f b8 00 00 06 00 0c 00 11 00 4d 78 31 30 .|/.........Mx10 0040 41 00 4d 78 31 30 41 00 70 70 75 32 00 4d 78 31 A.Mx10A.ppu2.Mx1 0050 30 41 00 0A. No. Time Interface Label LSU Port Protocol Info 25 09:39:30.088742 QNET_QOS Qos TCS_REM_UP Message Frame 25 (62 bytes on wire, 62 bytes captured) Arrival Time: Dec 7, 2009 09:39:30.088742000 [Time delta from previous captured frame: 0.000002000 seconds] [Time delta from previous displayed frame: 0.000002000 seconds] [Time since reference or first frame: 22.901356000 seconds] Frame Number: 25 Frame Length: 62 bytes Capture Length: 62 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0), Dst: Intel_b8:48:51 (00:0e:0c:b8:48:51) Destination: Intel_b8:48:51 (00:0e:0c:b8:48:51) Address: Intel_b8:48:51 (00:0e:0c:b8:48:51) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: LWL4 RX node UP (0x02) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Kernel Interface (0) qos information Src_nd_for_dst: 5 Dst_nd_for_src: 9 Sconn: 0x00000002 Dconn: 0x00000009 Seq: 0 Sos_type: Load balance (0) Src_qos_idx: 0 Offset: 0 Length: 0 crc32:0x0 [incorrect, should be 0x394d3305] 0000 00 0e 0c b8 48 51 00 d0 c9 95 7d b0 82 04 00 00 ....HQ....}..... 0010 2a 02 03 00 05 00 09 00 02 00 00 00 09 00 00 00 *............... 0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 0030 00 00 00 00 01 00 02 00 73 00 00 00 04 00 ........s..... No. Time Interface Label LSU Port Protocol Info 26 09:39:30.089101 QNET_KIF _IO_CONNECT_OPEN Frame 26 (213 bytes on wire, 213 bytes captured) Arrival Time: Dec 7, 2009 09:39:30.089101000 [Time delta from previous captured frame: 0.000359000 seconds] [Time delta from previous displayed frame: 0.000359000 seconds] [Time since reference or first frame: 22.901715000 seconds] Frame Number: 26 Frame Length: 213 bytes Capture Length: 213 bytes [Frame is marked: False] [Protocols in frame: eth:lwl4] Ethernet II, Src: Intel_b8:48:51 (00:0e:0c:b8:48:51), Dst: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Destination: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) Address: Advantec_95:7d:b0 (00:d0:c9:95:7d:b0) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Source: Intel_b8:48:51 (00:0e:0c:b8:48:51) Address: Intel_b8:48:51 (00:0e:0c:b8:48:51) .... ...0 .... .... .... .... = IG bit: Individual address (unicast) .... ..0. .... .... .... .... = LG bit: Globally unique address (factory default) Type: Unknown (0x8204) QNX6 QNET LWL4 protocol Version: LWL4 little endian (42) Type: L4 Data packet (0x08) Flag: 0x03 (First Fragment) (Last Fragment) .... ...1 = First: Yes .... ..1. = Last: Yes .... .0.. = Crc: False Layer: Kernel Interface (0) qos information Src_nd_for_dst: 9 Dst_nd_for_src: 5 Sconn: 0x00000009 Dconn: 0x00000002 Seq: 1 Sos_type: Load balance (0) Src_qos_idx: 0 Offset: 0 Length: 161 crc32:0x0 [incorrect, should be 0xb5f090f7] QNX6 QNET KIF protocol Connect: qnet connect message .... .... .000 0001 = Type: Connect MsgSend (0x0001) CRED LITTLE_ENDIAN Size: 0x0074 Version: 0x00000100 Server_pid: 1 Server_chid: 0x00000001 (1) Client_id: 0x4000002f (1073741871) Client_pid: 18964518 Client_info: client information Nd: 0 (0x00000000) Pid: 18964518 Sid: 18669655 Flags: 0x00000000 Cred: client information Ruid: 100 Euid: 100 Suid: 100 Rgid: 100 Egid: 100 Sgid: 100 Ngroups: 0 (0x00000000) Msgsend: qnet msgsend message .... .... .000 0101 = Type: MsgSend (0x0005) LITTLE_ENDIAN Size: 0x0004 Server_id: -1 Client_handle: 47 Vinfo: virtual thread information Vtid: 1 Coid: 5 Priority: 10 Srcmsglen: 45 Keydata: 45 Srcnd: 9 Dstmsglen: 0 Zero: 0 Nbytes: 45 (0x0000002d) Message: upper layer message(QNX6 message passing) Type: _IO_CONNECT (0x0100) Subtype: _IO_CONNECT_OPEN (0x0002) File_type: _FTYPE_ANY (0x00000000) Reply_max: 0x09b8 (2488) Entry_max: 0x000e (14) Key: 0x00000000 Handle: 0x00000001 (1) Ioflag: 100001, writeonly, largefile