Time Sev Major Minor Args Feb 15 14:21:21 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:21 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:21 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:21 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:21 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:21 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:21 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:21 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:21 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:21 6 10 0 Unable to establish link!!! Feb 15 14:21:21 6 10 0 Setting page 0x6020 Feb 15 14:21:21 6 10 0 writing PHY page 769 (or 0x6020 shifted) reg 0x1b Feb 15 14:21:21 6 10 0 Setting page 0x6140 Feb 15 14:21:21 6 10 0 SW has already locked the resource. Feb 15 14:21:21 6 10 0 SW has already locked the resource. Feb 15 14:21:22 6 10 0 SW has already locked the resource. Feb 15 14:21:22 6 10 0 SW has already locked the resource. Feb 15 14:21:22 6 10 0 SW has already locked the resource. Feb 15 14:21:22 6 10 0 hw->fc.current_mode = 3 Feb 15 14:21:22 6 10 0 Flow Control = FULL. Feb 15 14:21:22 6 10 0 100 Mbs, Feb 15 14:21:22 6 10 0 Full Duplex Feb 15 14:21:22 6 10 0 hw->fc.current_mode = 3 Feb 15 14:21:22 6 10 0 100 Mbs, Feb 15 14:21:22 6 10 0 Full Duplex Feb 15 14:21:22 5 10 0 TSO disabled for link speed < 1G Feb 15 14:21:22 5 10 0 update_link_status CTRL 18100248 Feb 15 14:21:22 5 10 0 Link up speed 100 Mbps - duplex Full Feb 15 14:21:23 6 10 0 SW has already locked the resource. Feb 15 14:21:23 6 10 0 SW has already locked the resource. Feb 15 14:21:23 6 10 0 SW has already locked the resource. Feb 15 14:21:23 6 10 0 SW has already locked the resource. Feb 15 14:21:24 6 10 0 SW has already locked the resource. Feb 15 14:21:24 6 10 0 SW has already locked the resource. Feb 15 14:21:24 6 10 0 SW has already locked the resource. Feb 15 14:21:25 6 10 0 SW has already locked the resource. Feb 15 14:21:25 6 10 0 SW has already locked the resource. Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1a Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1a Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1a Feb 15 14:21:25 6 10 0 Setting page 0x6080 Feb 15 14:21:25 6 10 0 reading PHY page 772 (or 0x6080 shifted) reg 0x14 Feb 15 14:21:25 6 10 0 Setting page 0x6080 Feb 15 14:21:25 6 10 0 writing PHY page 772 (or 0x6080 shifted) reg 0x14 Feb 15 14:21:25 6 10 0 Setting page 0x6040 Feb 15 14:21:25 6 10 0 reading PHY page 770 (or 0x6040 shifted) reg 0x10 Feb 15 14:21:25 6 10 0 Setting page 0x6040 Feb 15 14:21:25 6 10 0 writing PHY page 770 (or 0x6040 shifted) reg 0x10 Feb 15 14:21:25 6 10 0 Setting page 0x6080 Feb 15 14:21:25 6 10 0 reading PHY page 772 (or 0x6080 shifted) reg 0x14 Feb 15 14:21:25 6 10 0 Setting page 0x6080 Feb 15 14:21:25 6 10 0 writing PHY page 772 (or 0x6080 shifted) reg 0x14 Feb 15 14:21:25 6 10 0 hw->fc.current_mode = 3 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x4 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x5 Feb 15 14:21:25 6 10 0 Flow Control = FULL. Feb 15 14:21:25 6 10 0 100 Mbs, Feb 15 14:21:25 6 10 0 Full Duplex Feb 15 14:21:25 6 10 0 hw->fc.current_mode = 3 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1a Feb 15 14:21:25 6 10 0 Setting page 0x6080 Feb 15 14:21:25 6 10 0 reading PHY page 772 (or 0x6080 shifted) reg 0x14 Feb 15 14:21:25 6 10 0 Setting page 0x6080 Feb 15 14:21:25 6 10 0 writing PHY page 772 (or 0x6080 shifted) reg 0x14 Feb 15 14:21:25 6 10 0 Setting page 0x6040 Feb 15 14:21:25 6 10 0 reading PHY page 770 (or 0x6040 shifted) reg 0x10 Feb 15 14:21:25 6 10 0 Setting page 0x6040 Feb 15 14:21:25 6 10 0 writing PHY page 770 (or 0x6040 shifted) reg 0x10 Feb 15 14:21:25 6 10 0 Setting page 0x6080 Feb 15 14:21:25 6 10 0 reading PHY page 772 (or 0x6080 shifted) reg 0x14 Feb 15 14:21:25 6 10 0 Setting page 0x6080 Feb 15 14:21:25 6 10 0 writing PHY page 772 (or 0x6080 shifted) reg 0x14 Feb 15 14:21:25 6 10 0 hw->fc.current_mode = 3 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x4 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x5 Feb 15 14:21:25 6 10 0 Flow Control = FULL. Feb 15 14:21:25 6 10 0 100 Mbs, Feb 15 14:21:25 6 10 0 Full Duplex Feb 15 14:21:25 6 10 0 hw->fc.current_mode = 3 Feb 15 14:21:25 6 10 0 100 Mbs, Feb 15 14:21:25 6 10 0 Full Duplex Feb 15 14:21:25 5 10 0 TSO disabled for link speed < 1G Feb 15 14:21:25 5 10 0 update_link_status CTRL 18100240 Feb 15 14:21:25 5 10 0 Link up speed 100 Mbps - duplex Full Feb 15 14:21:25 5 14 0 INTEL PRO/1000 Gigabit (Copper) Feb 15 14:21:25 5 14 0 Vendor .............. 0x8086 Feb 15 14:21:25 5 14 0 Device .............. 0x1502 Feb 15 14:21:25 5 14 0 Revision ............ 0x0 Feb 15 14:21:25 5 14 0 Memory base ......... 0xfe600000 Feb 15 14:21:25 5 14 0 Interrupt ........... 0xa Feb 15 14:21:25 5 14 0 MAC address ......... 001999 b39b2b Feb 15 14:21:25 5 10 0 devnp-e1000: i82544_stop() called, disable = 0 Feb 15 14:21:25 6 10 0 Masking off all interrupts Feb 15 14:21:25 6 10 0 Issuing a global reset to ich8lan Feb 15 14:21:25 6 10 0 Semaphore unexpectedly released by sw/fw/hw Feb 15 14:21:25 6 10 0 Setting page 0x6020 Feb 15 14:21:25 6 10 0 reading PHY page 769 (or 0x6020 shifted) reg 0x10 Feb 15 14:21:25 6 10 0 Setting page 0x6020 Feb 15 14:21:25 6 10 0 writing PHY page 769 (or 0x6020 shifted) reg 0x10 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x10 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x11 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x10 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x11 Feb 15 14:21:25 6 10 0 Setting page 0x6020 Feb 15 14:21:25 6 10 0 reading PHY page 769 (or 0x6020 shifted) reg 0x11 Feb 15 14:21:25 6 10 0 Setting page 0x6020 Feb 15 14:21:25 6 10 0 writing PHY page 769 (or 0x6020 shifted) reg 0x11 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1a Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x1a Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x1e Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x10 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x11 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x10 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x11 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x10 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x11 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x10 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x11 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x10 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x11 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x10 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x11 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x10 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x11 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x10 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x11 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x12 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x1a Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x12 Feb 15 14:21:25 6 10 0 Setting page 0x6040 Feb 15 14:21:25 6 10 0 writing PHY page 770 (or 0x6040 shifted) reg 0x11 Feb 15 14:21:25 6 10 0 Setting page 0x6080 Feb 15 14:21:25 6 10 0 writing PHY page 772 (or 0x6080 shifted) reg 0x10 Feb 15 14:21:25 6 10 0 Setting page 0x6080 Feb 15 14:21:25 6 10 0 writing PHY page 772 (or 0x6080 shifted) reg 0x15 Feb 15 14:21:25 6 10 0 Setting page 0x6080 Feb 15 14:21:25 6 10 0 writing PHY page 772 (or 0x6080 shifted) reg 0x13 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x19 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x19 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x10 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x11 Feb 15 14:21:25 6 10 0 Programming MAC Address into RAR[0] Feb 15 14:21:25 6 10 0 Clearing RAR[1-4] Feb 15 14:21:25 6 10 0 Zeroing the MTA Feb 15 14:21:25 6 10 0 After fix-ups FlowControl is now = 3 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x16 Feb 15 14:21:25 6 10 0 Setting page 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x16 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x9 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x9 Feb 15 14:21:25 6 10 0 Reconfiguring auto-neg advertisement params Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x4 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x9 Feb 15 14:21:25 6 10 0 autoneg_advertised 2f Feb 15 14:21:25 6 10 0 Advertise 10mb Half duplex Feb 15 14:21:25 6 10 0 Advertise 10mb Full duplex Feb 15 14:21:25 6 10 0 Advertise 100mb Half duplex Feb 15 14:21:25 6 10 0 Advertise 100mb Full duplex Feb 15 14:21:25 6 10 0 Advertise 1000mb Full duplex Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x4 Feb 15 14:21:25 6 10 0 Auto-Neg Advertising de1 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x9 Feb 15 14:21:25 6 10 0 Restarting Auto-Neg Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x0 Feb 15 14:21:25 6 10 0 writing PHY page 0 (or 0x0 shifted) reg 0x0 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:25 6 10 0 Unable to establish link!!! Feb 15 14:21:25 6 10 0 Setting page 0x6020 Feb 15 14:21:25 6 10 0 writing PHY page 769 (or 0x6020 shifted) reg 0x1b Feb 15 14:21:25 6 10 0 Setting page 0x6140 Feb 15 14:21:25 6 10 0 SW has already locked the resource. Feb 15 14:21:26 6 10 0 SW has already locked the resource. Feb 15 14:21:26 6 10 0 SW has already locked the resource. Feb 15 14:21:26 6 10 0 SW has already locked the resource. Feb 15 14:21:27 6 10 0 SW has already locked the resource. Feb 15 14:21:27 6 10 0 SW has already locked the resource. Feb 15 14:21:27 6 10 0 SW has already locked the resource. Feb 15 14:21:27 6 10 0 SW has already locked the resource. Feb 15 14:21:28 6 10 0 SW has already locked the resource. Feb 15 14:21:28 6 10 0 SW has already locked the resource. Feb 15 14:21:28 6 10 0 SW has already locked the resource. Feb 15 14:21:29 6 10 0 SW has already locked the resource. Feb 15 14:21:29 6 10 0 SW has already locked the resource. Feb 15 14:21:29 6 10 0 SW has already locked the resource. Feb 15 14:21:29 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:29 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:29 6 10 0 Setting page 0x0 Feb 15 14:21:29 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1a Feb 15 14:21:29 6 10 0 Setting page 0x0 Feb 15 14:21:29 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1a Feb 15 14:21:29 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:29 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:29 6 10 0 Setting page 0x0 Feb 15 14:21:29 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1a Feb 15 14:21:29 6 10 0 Setting page 0x6080 Feb 15 14:21:29 6 10 0 reading PHY page 772 (or 0x6080 shifted) reg 0x14 Feb 15 14:21:29 6 10 0 Setting page 0x6080 Feb 15 14:21:29 6 10 0 writing PHY page 772 (or 0x6080 shifted) reg 0x14 Feb 15 14:21:29 6 10 0 Setting page 0x6040 Feb 15 14:21:29 6 10 0 reading PHY page 770 (or 0x6040 shifted) reg 0x10 Feb 15 14:21:29 6 10 0 Setting page 0x6040 Feb 15 14:21:29 6 10 0 writing PHY page 770 (or 0x6040 shifted) reg 0x10 Feb 15 14:21:29 6 10 0 Setting page 0x6080 Feb 15 14:21:29 6 10 0 reading PHY page 772 (or 0x6080 shifted) reg 0x14 Feb 15 14:21:29 6 10 0 Setting page 0x6080 Feb 15 14:21:29 6 10 0 writing PHY page 772 (or 0x6080 shifted) reg 0x14 Feb 15 14:21:29 6 10 0 hw->fc.current_mode = 3 Feb 15 14:21:29 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:29 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:29 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x4 Feb 15 14:21:29 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x5 Feb 15 14:21:29 6 10 0 Flow Control = FULL. Feb 15 14:21:29 6 10 0 100 Mbs, Feb 15 14:21:29 6 10 0 Full Duplex Feb 15 14:21:29 6 10 0 hw->fc.current_mode = 3 Feb 15 14:21:29 5 10 0 Link up speed 16400 Mbps - duplex Half Feb 15 14:21:29 6 10 0 Setting page 0x6020 Feb 15 14:21:29 6 10 0 reading PHY page 769 (or 0x6020 shifted) reg 0x14 Feb 15 14:21:29 6 10 0 Setting page 0x6020 Feb 15 14:21:29 6 10 0 writing PHY page 769 (or 0x6020 shifted) reg 0x14 Feb 15 14:21:29 6 10 0 Setting page 0x6020 Feb 15 14:21:29 6 10 0 reading PHY page 769 (or 0x6020 shifted) reg 0x17 Feb 15 14:21:29 6 10 0 Setting page 0x6020 Feb 15 14:21:29 6 10 0 writing PHY page 769 (or 0x6020 shifted) reg 0x17 Feb 15 14:21:29 6 10 0 Setting page 0x6020 Feb 15 14:21:29 6 10 0 reading PHY page 769 (or 0x6020 shifted) reg 0x10 Feb 15 14:21:29 6 10 0 Setting page 0x6020 Feb 15 14:21:29 6 10 0 writing PHY page 769 (or 0x6020 shifted) reg 0x10 Feb 15 14:21:29 6 10 0 Setting page 0x6100 Feb 15 14:21:29 6 10 0 reading PHY page 776 (or 0x6100 shifted) reg 0x14 Feb 15 14:21:29 6 10 0 Setting page 0x6100 Feb 15 14:21:29 6 10 0 writing PHY page 776 (or 0x6100 shifted) reg 0x14 Feb 15 14:21:29 6 10 0 Setting page 0x6100 Feb 15 14:21:29 6 10 0 writing PHY page 776 (or 0x6100 shifted) reg 0x17 Feb 15 14:21:29 6 10 0 Setting page 0x6040 Feb 15 14:21:29 6 10 0 reading PHY page 770 (or 0x6040 shifted) reg 0x11 Feb 15 14:21:29 6 10 0 Setting page 0x6040 Feb 15 14:21:29 6 10 0 writing PHY page 770 (or 0x6040 shifted) reg 0x11 Feb 15 14:21:29 6 10 0 Setting page 0x6020 Feb 15 14:21:29 6 10 0 writing PHY page 769 (or 0x6020 shifted) reg 0x14 Feb 15 14:21:29 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:29 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:29 6 10 0 Setting page 0x0 Feb 15 14:21:29 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1a Feb 15 14:21:29 6 10 0 Setting page 0x6080 Feb 15 14:21:29 6 10 0 reading PHY page 772 (or 0x6080 shifted) reg 0x14 Feb 15 14:21:29 6 10 0 Setting page 0x6080 Feb 15 14:21:29 6 10 0 writing PHY page 772 (or 0x6080 shifted) reg 0x14 Feb 15 14:21:29 6 10 0 Setting page 0x6040 Feb 15 14:21:29 6 10 0 reading PHY page 770 (or 0x6040 shifted) reg 0x10 Feb 15 14:21:29 6 10 0 Setting page 0x6040 Feb 15 14:21:29 6 10 0 writing PHY page 770 (or 0x6040 shifted) reg 0x10 Feb 15 14:21:29 6 10 0 Setting page 0x6080 Feb 15 14:21:29 6 10 0 reading PHY page 772 (or 0x6080 shifted) reg 0x14 Feb 15 14:21:29 6 10 0 Setting page 0x6080 Feb 15 14:21:29 6 10 0 writing PHY page 772 (or 0x6080 shifted) reg 0x14 Feb 15 14:21:29 6 10 0 hw->fc.current_mode = 3 Feb 15 14:21:29 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:29 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x1 Feb 15 14:21:29 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x4 Feb 15 14:21:29 6 10 0 reading PHY page 0 (or 0x0 shifted) reg 0x5 Feb 15 14:21:29 6 10 0 Flow Control = FULL. Feb 15 14:21:29 6 10 0 100 Mbs, Feb 15 14:21:29 6 10 0 Full Duplex Feb 15 14:21:29 6 10 0 hw->fc.current_mode = 3 Feb 15 14:21:29 5 10 0 Link up speed 2057 Mbps - duplex Half