Mar 29 16:04:07.773 pci_server.4..0 pci_dbg 0 DEBUG,1,1,3 [4:3]: itss_intpin_to_irq(B1:D0:F0, A) Mar 29 16:04:07.773 pci_server.4 pci_log* 0 WARN ,1,1,3 [4:3]: find_fixed_irq_info(): No chipset support found for 0xa149 Mar 29 16:04:07.773 pci_server.4..0 pci_dbg 0 DEBUG,1,2,3 [4:3]: B1:D0:F0 fixed IRQ not found Mar 29 16:04:07.773 pci_server.4..0 pci_dbg 0 DEBUG,1,2,3 [4:3]: Skylake detected Mar 29 16:04:07.773 pci_server.4..0 pci_dbg 0 DEBUG,1,2,3 [4:3]: intpin_to_pirq(): B1:D0:F0 has parent bridge B0:D1:F0 ... Mar 29 16:04:07.773 pci_server.4..0 pci_dbg 0 DEBUG,1,2,3 [4:3]: intpin_to_pirq(): Found RP B0:D1:F0 for EP B1:D0:F0 ... Mar 29 16:04:07.773 pci_server.4 pci_log 0 INFO ,1,1,3 [4:3]: B0:D1:F0 - Check for /lib/dll/pci/pci_cap-0x10-80861901.so ... not found Mar 29 16:04:07.773 pci_server.4 pci_log 0 INFO ,1,1,3 [4:3]: B0:D1:F0 - Found /lib/dll/pci/pci_cap-0x10.so Mar 29 16:04:07.773 pci_server.4 pci_log 0 INFO ,1,2,3 [4:3]: EP INTA swizzled to RP port 2 INTB Mar 29 16:04:07.773 pci_server.4 pci_log 0 INFO ,1,1,3 [4:3]: Found P2SB device at B0:D31:F1 Mar 29 16:04:07.773 pci_server.4 pci_log 0 INFO ,1,2,3 [4:3]: map_itss_base() ITSS base address at 0xfdc40000 (180081000) Mar 29 16:04:07.773 pci_server.4..0 pci_dbg 0 DEBUG,1,1,3 [4:3]: B0:D1:F0 INTB --> PIRQ? Mar 29 16:04:07.773 pci_server.4..0 pci_dbg 0 DEBUG,1,2,3 [4:3]: intpin_to_pirq(): B1:D0:F0 on PIRQ ? Mar 29 16:04:07.773 pci_server.4..0 pci_dbg 0 DEBUG,1,1,3 [4:3]: B1:D0:F0 INTA --> PIRQ? Mar 29 16:04:07.773 pci_server.4..0 pci_dbg 0 DEBUG,1,1,3 [4:3]: PIRQ? --> IRQ -1 Mar 29 16:04:07.773 pci_server.4 pci_log 0 INFO ,1,2,3 [4:3]: hw_alloc_irq(B1:D0:F0, 1, 0x0, 10, 8080ed0) The Requested Number And Type Of Interrupts Are Unavailable Or Could Not Be Reserved With Current Request Type [PCI_ERR_IRQ_NOT_AVAIL] ... Mar 29 16:04:07.923 pci_server.4..0 pci_dbg 0 DEBUG,1,1,3 [4:3]: itss_intpin_to_irq(B4:D0:F0, A) Mar 29 16:04:07.923 pci_server.4 pci_log 0 WARN ,1,1,3 [4:3]: find_fixed_irq_info(): No chipset support found for 0xa149 Mar 29 16:04:07.923 pci_server.4..0 pci_dbg 0 DEBUG,1,2,3 [4:3]: B4:D0:F0 fixed IRQ not found Mar 29 16:04:07.923 pci_server.4..0 pci_dbg 0 DEBUG,1,2,3 [4:3]: Skylake detected Mar 29 16:04:07.923 pci_server.4..0 pci_dbg 0 DEBUG,1,2,3 [4:3]: intpin_to_pirq(): B4:D0:F0 has parent bridge B0:D29:F0 ... Mar 29 16:04:07.923 pci_server.4..0 pci_dbg 0 DEBUG,1,2,3 [4:3]: intpin_to_pirq(): Found RP B0:D29:F0 for EP B4:D0:F0 ... Mar 29 16:04:07.923 pci_server.4 pci_log 0 INFO ,1,1,3 [4:3]: B0:D29:F0 - Check for /lib/dll/pci/pci_cap-0x10-8086a118.so ... not found Mar 29 16:04:07.923 pci_server.4 pci_log 0 INFO ,1,1,3 [4:3]: B0:D29:F0 - Found /lib/dll/pci/pci_cap-0x10.so Mar 29 16:04:07.923 pci_server.4 pci_log 0 INFO ,1,2,3 [4:3]: EP INTA swizzled to RP port 9 INTA Mar 29 16:04:07.923 pci_server.4..0 pci_dbg 0 DEBUG,1,2,3 [4:3]: IRR offset 0x3144 = 0x3210, shift = 0, irr = 0x0, pirq_c = A Mar 29 16:04:07.923 pci_server.4..0 pci_dbg 0 DEBUG,1,1,3 [4:3]: B0:D29:F0 INTA --> PIRQA Mar 29 16:04:07.923 pci_server.4..0 pci_dbg 0 DEBUG,1,2,3 [4:3]: intpin_to_pirq(): B4:D0:F0 on PIRQ A Mar 29 16:04:07.923 pci_server.4..0 pci_dbg 0 DEBUG,1,1,3 [4:3]: B4:D0:F0 INTA --> PIRQA Mar 29 16:04:07.923 pci_server.4..0 pci_dbg 0 DEBUG,1,1,3 [4:3]: PIRQA --> IRQ 16 Mar 29 16:04:07.923 pci_server.4 pci_log 0 INFO ,1,2,3 [4:3]: hw_alloc_irq(B4:D0:F0, 1, 0x0, 1, 8080ed0) OK [PCI_ERR_OK] Mar 29 16:04:07.923 io_pkt_v6_hc.446487..1 slog 0 PCI device 00000400 got 1 IRQs