5–4
EMODE
Endian Mode:
The uSDHC supports all four endian modes in data transfer. Refer to
Data Buffer
" for more details.
00 Big Endian Mode
01 Half Word Big Endian Mode
10 Little Endian Mode
11 Reserved
From: kaushik choudhury [mailto:community-noreply@qnx.com]
Sent: April-02-14 1:31 PM
To: ostech-core_os@community.qnx.com
Subject: Re: DMA on imx6 platform giving wrong values
Lichun Zhu
Is this some thing related to configuring big endian and little endian on PROT_CTRL register if so can you please let me known the specification which talk about bit 4 and 5
of PROT_CTRL. register.
Regards
Kaushik
On Wed, Apr 2, 2014 at 7:16 PM, Lichun Zhu <community-noreply@qnx.com> wrote:
Did you set bit 4-5 of the PROT_CTRL register properly? Does PIO mode work? Do you need to do cache operation if the buffer is cacheable?
-----Original Message-----
From: Kaushik Choudhury [mailto:community-noreply@qnx.com]
Sent: Wednesday, April 02, 2014 9:03 AM
To: ostech-core_os
Subject: DMA on imx6 platform giving wrong values
Hi
Iam working on porting linux sdio driver on to QNX. For sending CMD53 i have created a virtual memory using MMAP and got the physical address of this mmap return virtual memory using function mem_offset.
The problem is when i have to do DMA read of 4 byte value using the physical address that i got above i get value in form of BIG ENDIAN.
Example in place of 1 i get 0x1000000.
The imx6 processor when executing CMD53 for read and write is expecting and giving me value in BIGENDIAN were as it is little ENDIAN in case of linux.
Please let me known is there anything wrong that iam doing or is this the right way it works.
Regards
Kaushik
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