Feed for discussion General in project Community. http://community.qnx.com/sf/discussion/do/listTopics/projects.community/discussion.community Posts for General post121412: Re: syslog() function cannot log the message over 200 bytes??? http://community.qnx.com/sf/go/post121412 Picking this up a few years later -- I just hit this today, was building up a logging framework on syslog then nearly fainted when I saw that the message length was 200 bytes and apparently not configurable (stupid me for thinking that messages could surely be at least 1024 bytes long). Is there any way to get either a) source to this, or b) someone to update so that we can have a usable logging system? 200 bytes is barely enough to say "hello" in some of our domain work. Or, alternatively, has anyone used any other alternative daemon? Wed, 12 May 2021 19:15:41 GMT http://community.qnx.com/sf/go/post121412 Brian Schuth 2021-05-12T19:15:41Z post121408: Re: How to use Eigen in QNX 6.4.1 http://community.qnx.com/sf/go/post121408 just compile this program using command line interface like this go to the QNX installtion folder and run source qnxsdp-env.sh q++ -Vgcc_ntox86_64 -std=c++14 -I /home/madhav/eigen-3.3.9/ eigentest.cpp -o eigenexe1 thanks Fri, 07 May 2021 04:52:36 GMT http://community.qnx.com/sf/go/post121408 Madhav Cham 2021-05-07T04:52:36Z post121267: Re: Block Device Level Encryption http://community.qnx.com/sf/go/post121267 Is there a link to download fsf-merkle.so? Thanks. Wed, 17 Feb 2021 14:59:22 GMT http://community.qnx.com/sf/go/post121267 Yi Li 2021-02-17T14:59:22Z post121265: Re: Specification or documentation related to QNX6 file system http://community.qnx.com/sf/go/post121265 > I'd start with the Filesystems chapter of the System Architecture guide. Note > that the documentation never refers to the QNX 6 filesystem; we use the > official name, which is the Power-Safe filesystem. Thank you sir, I am going to take a look at the System Architecture guide Jean Tue, 16 Feb 2021 13:32:42 GMT http://community.qnx.com/sf/go/post121265 Jean de Bonfils Lavernelle 2021-02-16T13:32:42Z post121264: Re: Specification or documentation related to QNX6 file system http://community.qnx.com/sf/go/post121264 > I'd start with the Filesystems chapter of the System Architecture guide. Note > that the documentation never refers to the QNX 6 filesystem; we use the > official name, which is the Power-Safe filesystem. Tue, 16 Feb 2021 13:30:24 GMT http://community.qnx.com/sf/go/post121264 Jean de Bonfils Lavernelle 2021-02-16T13:30:24Z post121255: Re: Specification or documentation related to QNX6 file system http://community.qnx.com/sf/go/post121255 I'd start with the Filesystems chapter of the System Architecture guide. Note that the documentation never refers to the QNX 6 filesystem; we use the official name, which is the Power-Safe filesystem. Wed, 10 Feb 2021 18:29:06 GMT http://community.qnx.com/sf/go/post121255 Steve Reid 2021-02-10T18:29:06Z post121254: Specification or documentation related to QNX6 file system http://community.qnx.com/sf/go/post121254 Hello. For a project, I have to study how the QNX6 file system works. I don't really know where to start. I have identified fs-qnx6.so which I should analyze by reverse-engineering. Does anyone have any documentation, code or specification related to QNX6 file system? Or any information which could help me... This would be very useful to me. Thanks. Have a nice day. Jean Wed, 10 Feb 2021 18:22:24 GMT http://community.qnx.com/sf/go/post121254 Jean de Bonfils Lavernelle 2021-02-10T18:22:24Z post121181: 2012 Fisker Karma EV Infotainment QNX http://community.qnx.com/sf/go/post121181 Does anyone know what QNX version was in the Fisker Karma in 2010? Thu, 28 Jan 2021 01:46:18 GMT http://community.qnx.com/sf/go/post121181 shawn shawn 2021-01-28T01:46:18Z post121154: fsencrypt now works http://community.qnx.com/sf/go/post121154 Hello QNX experts, I'm experimenting with fsencrypt on my board. The storage medium is sdcard. I start the sdcard driver with"devb-sdmmc-mx8x cam pnp,cache,quiet blk ra=64k:2048k,memory="sysram&below4G:sysram",maxio=256,cache=4m disk name=sd sdio idx=1,bs=cd=0x5D0C0000^22^694,verbose=1 qnx6 crypto=enable" On the board: # mkqnx6fs -E /dev/sd0t131.1 All files on /dev/sd0t131.1 will be lost! Confirm filesystem re-format (y) or (n): y Format fs-qnx6: 131068 blocks, 16384 inodes, 4 groups # mount -t qnx6 /dev/sd0t131.1 /mnt mount: Can't mount /mnt (type qnx6) mount: Possible reason: Not supported What's wrong? Thanks. Best regards. LiWeiHua Thu, 17 Dec 2020 05:14:24 GMT http://community.qnx.com/sf/go/post121154 li weihua 2020-12-17T05:14:24Z post121148: Re: display configuration issue with QNX 6.5.0 SP1 x86 BIOS/APIC BSP rel3653 http://community.qnx.com/sf/go/post121148 Thanks for the confirmation. Wed, 09 Dec 2020 18:33:53 GMT http://community.qnx.com/sf/go/post121148 Stuart Little 2020-12-09T18:33:53Z post121147: Re: display configuration issue with QNX 6.5.0 SP1 x86 BIOS/APIC BSP rel3653 http://community.qnx.com/sf/go/post121147 Just noticed a typo/error:- "but then does come back to show the Accept/ Revert popup." should be "doesn't come back" i.e. remains blanked Wed, 09 Dec 2020 18:33:29 GMT http://community.qnx.com/sf/go/post121147 Stuart Little 2020-12-09T18:33:29Z post121145: Re: display configuration issue with QNX 6.5.0 SP1 x86 BIOS/APIC BSP rel3653 http://community.qnx.com/sf/go/post121145 I also experienced that changing the resolution does not work on newer boards. I configure the resolution explicitly in display.conf and leave it at that. -Al Tue, 08 Dec 2020 09:33:48 GMT http://community.qnx.com/sf/go/post121145 Albrecht Uhlmann 2020-12-08T09:33:48Z post121144: display configuration issue with QNX 6.5.0 SP1 x86 BIOS/APIC BSP rel3653 http://community.qnx.com/sf/go/post121144 Have an unexpected display configuration problem while checking the BSP on new hardware. When the display resolution is changed the screen blanks as per normal, but then does come back to show the Accept/Revert popup. The new display resolution can be blindly accepted as works OK after a forced reboot. Basic 650 installation is OK. 650SP1 is OK An ifs created with the BSP is OK, with no patches. With full patches the fault is witnessed and the following errors logged:- pci_init: found PCI device 8086:f31 io-display: aperture shm_ctl failed! (0x00000000) /usr/photon/bin/io-graphics: gf_dev_attach('/dev/io-display/8086,0f31,0'): gf errno 7 phgrafx: restart.status = 0, restart.n_devices = 1 phgrafx: 0: vid=0x8086,did=0xf31,deviceindex=0 = [0: No error] VGA primary : bus 0x0 dev/func 0x10 Found 1 PCI/AGP display devices pci_init: found PCI device 8086:f31 io-display: aperture shm_ctl failed! (0x00000000) Given the patches do not include any graphics drivers with the libc* libraries only applied the resolution change still works as expected, but with procnto included in the ifs the problem occurs. Is this a known issue with a workaround? Mon, 07 Dec 2020 14:05:26 GMT http://community.qnx.com/sf/go/post121144 Stuart Little 2020-12-07T14:05:26Z post121048: Re: RTL8168 Network Card Driver http://community.qnx.com/sf/go/post121048 Thanks for that , I am not that familiar with qnx. Any Suggestions where I might find the correct driver. John Fri, 23 Oct 2020 08:16:46 GMT http://community.qnx.com/sf/go/post121048 John Fortune(deleted) 2020-10-23T08:16:46Z post121047: Re: RTL8168 Network Card Driver http://community.qnx.com/sf/go/post121047 This driver is for QNX 4. Fri, 23 Oct 2020 07:54:15 GMT http://community.qnx.com/sf/go/post121047 Albrecht Uhlmann 2020-10-23T07:54:15Z post121046: Re: RTL8168 Network Card Driver http://community.qnx.com/sf/go/post121046 Here is the attachment from the post Fri, 23 Oct 2020 07:46:58 GMT http://community.qnx.com/sf/go/post121046 John Fortune(deleted) 2020-10-23T07:46:58Z post121045: Re: RTL8168 Network Card Driver http://community.qnx.com/sf/go/post121045 The driver on the link is not a .so file. so cant try it. https://community.qnx.com/sf/discussion/do/listPosts/projects.community/discussion.qnx4_community_support.topc8226?pageSize=-1#post_post32091 Fri, 23 Oct 2020 07:44:52 GMT http://community.qnx.com/sf/go/post121045 John Fortune(deleted) 2020-10-23T07:44:52Z post121044: Re: RTL8168 Network Card Driver http://community.qnx.com/sf/go/post121044 Can you send a link to that post please. If it is that old, there is a considerable risk that the driver won't work properly with current hardware. Just as a hint. -Al Fri, 23 Oct 2020 07:38:52 GMT http://community.qnx.com/sf/go/post121044 Albrecht Uhlmann 2020-10-23T07:38:52Z post121043: Re: RTL8168 Network Card Driver http://community.qnx.com/sf/go/post121043 Hi Al, I have RTOS Runtime 6.3.2. The Archive was Post 31718 from Hugh Brown in 2009 with a attachment. Fri, 23 Oct 2020 07:16:46 GMT http://community.qnx.com/sf/go/post121043 John Fortune(deleted) 2020-10-23T07:16:46Z post121042: Re: RTL8168 Network Card Driver http://community.qnx.com/sf/go/post121042 Which QNX version are you looking at? Which archive are you referring to? -Al Fri, 23 Oct 2020 06:48:06 GMT http://community.qnx.com/sf/go/post121042 Albrecht Uhlmann 2020-10-23T06:48:06Z post121041: RTL8168 Network Card Driver http://community.qnx.com/sf/go/post121041 I am looking for the RTL8168.so Network Driver file. There is one in the archive but it is not a .so file. Fri, 23 Oct 2020 05:33:07 GMT http://community.qnx.com/sf/go/post121041 John Fortune(deleted) 2020-10-23T05:33:07Z post121033: Ping delays on network re-coonect http://community.qnx.com/sf/go/post121033 Hi, We have QNX 6.5 on a Freescale P1013 based board (A21B from Duagon, formerly MEN). When we disconnect a LAN connection and then reconnect while for example we have a ping test, we have huge delays: 64 bytes from 192.168.101.130: icmp_seq=18 ttl=255 time=0 ms 64 bytes from 192.168.101.130: icmp_seq=19 ttl=255 time=0 ms 64 bytes from 192.168.101.130: icmp_seq=24 ttl=255 time=7547 ms 64 bytes from 192.168.101.130: icmp_seq=25 ttl=255 time=6548 ms 64 bytes from 192.168.101.130: icmp_seq=26 ttl=255 time=5548 ms 64 bytes from 192.168.101.130: icmp_seq=27 ttl=255 time=4548 ms 64 bytes from 192.168.101.130: icmp_seq=28 ttl=255 time=3548 ms 64 bytes from 192.168.101.130: icmp_seq=29 ttl=255 time=2549 ms 64 bytes from 192.168.101.130: icmp_seq=30 ttl=255 time=1549 ms 64 bytes from 192.168.101.130: icmp_seq=31 ttl=255 time=549 ms 64 bytes from 192.168.101.130: icmp_seq=32 ttl=255 time=0 ms 64 bytes from 192.168.101.130: icmp_seq=33 ttl=255 time=0 ms Also when we have pings with large size messages, when we re-connect we get the following message: ping: sendto: No buffer space available ping: sendto: No buffer space available ping: sendto: No buffer space available . . And it never reconnects. The BSP is used is similar to "Freescale P1010RDB", Any hint on how we can solve this problem? Wed, 14 Oct 2020 11:37:46 GMT http://community.qnx.com/sf/go/post121033 hamed davaneh(deleted) 2020-10-14T11:37:46Z post121006: QNX SDP 7.0 x86_64 vmware image - root passwords http://community.qnx.com/sf/go/post121006 Hello What is the passwords for root user in the above QNX vmware image ? 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Additional terms of NNG's email policy can be found here: https://urldefense.proofpoint.com/v2/url?u=https-3A__www.nng.com_email-2Dpolicy_&d=DwIFAg&c=yzoHOc_ZK-sxl-kfGNSEvlJYanssXN3q-lhj0sp26wE&r=YtmGHBrMV2UwJGa3fbjrG8vlLowY6D6-nYw70ZGhL7lPYiK5mgwrfx5h2ziZzct9&m=kKRMsHatdJOlx30dzdsAwSj2r14GZtQUiaYc4F8lN-s&s=PNi26FFwQuQf1kQDx2tIYNmWjF4ZpWHJ4RKfWe_ALos&e= By responding to this email you accept the email policy. Ez az ?zenet - a mell?kleteit is ide?rtve - bizalmas ?s szakmai jelleg?, ?s az e-mail-c?m az NNG Kft.-hez tartozik. Amennyiben v?laszol az ?zenetre, kifejezett hozz?j?rul?s?t adja ahhoz, hogy a levelez?shez ?s annak tartalm?hoz a c?mzetten k?v?l az NNG Kft. b?rmely m?s alkalmazottja is hozz?f?rjen. Az NNG e-mail-szab?lyzat?val kapcsolatos egy?b rendelkez?seket itt tal?lja: https://urldefense.proofpoint.com/v2/url?u=https-3A__www.nng.com_email-2Dpolicy_&d=DwIFAg&c=yzoHOc_ZK-sxl-kfGNSEvlJYanssXN3q-lhj0sp26wE&r=YtmGHBrMV2UwJGa3fbjrG8vlLowY6D6-nYw70ZGhL7lPYiK5mgwrfx5h2ziZzct9&m=kKRMsHatdJOlx30dzdsAwSj2r14GZtQUiaYc4F8lN-s&s=PNi26FFwQuQf1kQDx2tIYNmWjF4ZpWHJ4RKfWe_ALos&e= Az e-mailre t?rt?n? v?laszad?ssal ?n elfogadja az e-mail-szab?lyzatot. Fri, 02 Oct 2020 08:38:54 GMT http://community.qnx.com/sf/go/post121006 Daniel Amsalem 2020-10-02T08:38:54Z post120972: Getting loopback packet in pfil filter http://community.qnx.com/sf/go/post120972 Hi, In io-pkt I am using pfill hooks to get output and input packets on an ethernet interface. But when I sent the packet on local loopback port (lo0), the packet does not show of in pfill hooks. But the packet is received through tcpdump. How to receive the loopback packets sent on local loopback port? Wed, 30 Sep 2020 09:16:14 GMT http://community.qnx.com/sf/go/post120972 manas sahoo 2020-09-30T09:16:14Z post120962: Receiving own sent UDP packet through nfm filter http://community.qnx.com/sf/go/post120962 Hi, In my controller, I am using QNX 6.5 SP1. I am sending a multicast packet to outside through 1 Ethernet interface, through nfm filter. The packet goes outside and consumed by other controllers on the same multicast group. The sending controller is also waiting for packets on same multicast group. But this controller never gets its own sent packet (specifically sent from nfm filter). Is there anything specific I am missing, due to which the packet is not received in the same controller? Regards, Manas Tue, 29 Sep 2020 08:19:49 GMT http://community.qnx.com/sf/go/post120962 manas sahoo 2020-09-29T08:19:49Z post120922: Re: porting bcm43455 wifi driver(bcmdhd) to imx6 + qnx6.6.0 http://community.qnx.com/sf/go/post120922 hi Albrecht Uhlmann i am working on porting bcm wifi driver from linux to QNX7.0, would you please give me some example to do this job? Mon, 07 Sep 2020 12:19:21 GMT http://community.qnx.com/sf/go/post120922 jing feng(deleted) 2020-09-07T12:19:21Z post120871: BSP7.0 altera cyclone 5 http://community.qnx.com/sf/go/post120871 Is there an existing bsp for an altera cyclone 5 development kit for QNX7.0.0? If not what do I have to change from a bsp for QNX6.6.0? Tue, 28 Jul 2020 08:35:56 GMT http://community.qnx.com/sf/go/post120871 Markus Gäumann 2020-07-28T08:35:56Z post120840: Re: Error in Final Launch Sequence (Unknown Response Error Attempting to Exec Shared Lib) http://community.qnx.com/sf/go/post120840 Same error here. Already tried IDE 2.1.2 && 7.0.4., both got same failure.... Tue, 14 Jul 2020 08:49:38 GMT http://community.qnx.com/sf/go/post120840 Emily Lin(deleted) 2020-07-14T08:49:38Z post120814: Re: File system encryption using fsencrypt http://community.qnx.com/sf/go/post120814 https://www.google.com/ Mon, 06 Jul 2020 13:41:11 GMT http://community.qnx.com/sf/go/post120814 Nicholas Berryrdl(deleted) 2020-07-06T13:41:11Z post120813: Re: File system encryption using fsencrypt http://community.qnx.com/sf/go/post120813 I think it works! I encrypted it like this, but I think it was a long time ago Mon, 06 Jul 2020 13:40:49 GMT http://community.qnx.com/sf/go/post120813 Nicholas Berryrdl(deleted) 2020-07-06T13:40:49Z post120792: QNX6.6,emmc driver,GUID Partition Table problems for Jacinto 6 http://community.qnx.com/sf/go/post120792 I use this command below to start MMC device: devb-sdmmc-omap_generic sdmmc busno=1,verbose=7,partitions=on,cache=on blk naming=0#@,noatime,cache=2M cam cache,async there are only emmc‘s physical partitions in /dev folder, there is no uda’s gpt partitions. Does devb-sdmmc-omap_generic support to emmc's gpt partitions in QNX 6.6 platform? If does, please tell me how to use devb-sdmmc-omap_generic. If NOT, is there any patches can support this feature in QNX 6.6 platform Fri, 19 Jun 2020 05:40:51 GMT http://community.qnx.com/sf/go/post120792 Su Jianbang 2020-06-19T05:40:51Z post120771: Re: File system encryption using fsencrypt http://community.qnx.com/sf/go/post120771 > My understanding isthat fsencrypt works only in conjunction with the fs-qnx6. > so on a block device. > FFSv3, if there is support for encryption, must have its own solution, but I > am not aware of any. > > What you could do is run devb-loopback on top af a large-enough file inside > the FFSv3 partition, and launch encryption on that. Of course there is a > performance penalty, but maybe it is acceptable. > > Regards, > Albrecht Hi Albrecht, Thank you for your response. Sorry I'm new to QNX. It might work for me. Could you explain a little bit more? Right now I start like this: # Starting QSPI flash driver on -R 0xD devf-qspi-xzynq-zcu102 flashctl -p /dev/fs0p0 -o 0xee00000 -l 0x400000 -e -f -v -U flashctl -p /dev/fs0p1 -U flashctl -p /dev/fs0p1 -v -m -n /mnt/flash-partition How can I create a devb-loopback and encrypt it? Thank you! Thu, 11 Jun 2020 21:39:35 GMT http://community.qnx.com/sf/go/post120771 Daniel Wang 2020-06-11T21:39:35Z post120765: Does SLM support additional groups? http://community.qnx.com/sf/go/post120765 I have two groups defined in /etc/groups as: file-owner:x:300:user user:x:400: when I run the command id on the terminal, I see file-owner is added as an additional group. # id user uid=300(user) gid=300(user) groups=300(user),400(file-owner) However, running id from a script started bu SLM with <SLM:user>user:user</SLM:user> gives: uid=300(user) gid=300(user) Is this a known bug? This is causing me a problem because I cannot read a configuration file that is owned by the user/group file-owner, with zero permissions for others ls -l /tmp/my-configs.txt -r--r----- 1 file-owner file-owner 1054552 Jun 11 12:22 /tmp/my-configs.txt I run a process with id user:user but I cannot read the configuration file owned by file-owner. Thu, 11 Jun 2020 17:10:25 GMT http://community.qnx.com/sf/go/post120765 Ilyas Hamadouche 2020-06-11T17:10:25Z post120760: Re: File system encryption using fsencrypt http://community.qnx.com/sf/go/post120760 My understanding isthat fsencrypt works only in conjunction with the fs-qnx6.so on a block device. FFSv3, if there is support for encryption, must have its own solution, but I am not aware of any. What you could do is run devb-loopback on top af a large-enough file inside the FFSv3 partition, and launch encryption on that. Of course there is a performance penalty, but maybe it is acceptable. Regards, Albrecht Thu, 11 Jun 2020 12:16:56 GMT http://community.qnx.com/sf/go/post120760 Albrecht Uhlmann 2020-06-11T12:16:56Z post120759: Re: MMC util to read extcsd from emmc devices http://community.qnx.com/sf/go/post120759 Hi, I did a quick scan of the dcmd_*.h header files, but I didn't come across a device control command that would retrieve this information. $QNX_TARGET/usr/include/mmc contains a header file with some structures, but I think this is what the devb-sdmmc uses internally. -Al Thu, 11 Jun 2020 12:14:01 GMT http://community.qnx.com/sf/go/post120759 Albrecht Uhlmann 2020-06-11T12:14:01Z post120757: Re: MMC util to read extcsd from emmc devices http://community.qnx.com/sf/go/post120757 Hi, did you get any answer to what you had asked ? Using devb-sdmmc-* , could you read the emmc devices? Thu, 11 Jun 2020 07:41:36 GMT http://community.qnx.com/sf/go/post120757 Sriya Pradhan(deleted) 2020-06-11T07:41:36Z post120756: File system encryption using fsencrypt http://community.qnx.com/sf/go/post120756 It seems to me that this is no block level encryption solution (like dm-crypt in Linux). I found fsencrypt in the QNX document. However, in the document it mentioned "The fsencrypt utility manages the encryption of a Power-Safe (fs-qnx6.so) filesystem. In order to use fsencrypt, you must have specified crypto=enable for fs-qnx6.so." I have a flash device that is currently using FF3S file-system. Does fsencrypt works in this file system? Wed, 10 Jun 2020 21:02:16 GMT http://community.qnx.com/sf/go/post120756 Daniel Wang 2020-06-10T21:02:16Z post120751: QNX7 egalax (devh-egalax.so) touchscreen driver http://community.qnx.com/sf/go/post120751 Hi I'm looking for the driver for this, the documentation for qnx 7 seems to indicate this exists but I cannot find the driver in my installation path for image creation. (devh-egalax.so) Tue, 09 Jun 2020 18:46:59 GMT http://community.qnx.com/sf/go/post120751 Daryl Tyson(deleted) 2020-06-09T18:46:59Z post120386: Re: QCC: license check failed http://community.qnx.com/sf/go/post120386 QNX is a commercial OS, and you need to have a license to run the toolchain. There are some licenses available free of cost, e.g. for academic use, but you need to apply for them on the QNX homepage. -Al Sun, 22 Mar 2020 17:40:26 GMT http://community.qnx.com/sf/go/post120386 Albrecht Uhlmann 2020-03-22T17:40:26Z post120385: QCC: license check failed http://community.qnx.com/sf/go/post120385 I am trying to compile some automotive c++ code targeting QNX. I always get the error license check failed. QCC -V gives me the same error: source qnx700/qnxsdp-env.sh QCC -V Anybody faced this before? Any idea how to solve it? - Ilyas Sat, 21 Mar 2020 10:29:43 GMT http://community.qnx.com/sf/go/post120385 Ilyas Hamadouche 2020-03-21T10:29:43Z post120216: Re: BSP 6.5SP1 to 6.5 port http://community.qnx.com/sf/go/post120216 Hi Ralph, if the BSP is supplied by Adlink, I suggest to contact them if a downgrade is possible and at what cost. The other option is to use the SP1 BSP supplied by Adlink, enjoy their support, and bring your application forward to SP1. This would give you a mucher better maintainable solution in the mid and long term. Looking at the Adlink platform you mentioned, it's based on Baytrail SoC and Intel i210 network controllers, and getting this to work on 6.5.0 will probably cause a lot of headache. Regards, Albrecht Mon, 03 Feb 2020 09:14:43 GMT http://community.qnx.com/sf/go/post120216 Albrecht Uhlmann 2020-02-03T09:14:43Z post120213: Re: BSP 6.5SP1 to 6.5 port http://community.qnx.com/sf/go/post120213 Thanks, Here is more info... Currently have 6.5.0 apps developed/installed, in the field, with photon. Replacing, through attrition, a Lippert N270/945GSE PC104+ board(6.5.0 BSP) with an ADLINK CM2-BT2-E3825 board. The ADLINK board has, manufacture supplied, 6.5.0SP1 BSP and 7. We need a 6.5.0 BSP. My initial thought was to mod the 6.5.0SP1 to 6.5.0. Can a generic X86 BSP work? But the current list does not show one for 6.5.0. Is that still available? Fri, 31 Jan 2020 17:49:25 GMT http://community.qnx.com/sf/go/post120213 Ralph Kanzler 2020-01-31T17:49:25Z post120212: Re: BSP 6.5SP1 to 6.5 port http://community.qnx.com/sf/go/post120212 I guess it can be built, because the layout and structure of BSPs and the QNX Momentics SDP have not changed between 6.5.0 and SP1. But I would not be surprised if it either - does not boot up at all - boots up and looks ok but behaves strangely later on SP1 was a quite substantial step, and any subsequent releases/patches are mostly only targeted towards 6.5.0SP1. It will very much depend on the platform that you are looking at. Can you give more details? Do you have a particular reason why you want to stick with 6.5.0? Regards, Albrecht Fri, 31 Jan 2020 16:27:03 GMT http://community.qnx.com/sf/go/post120212 Albrecht Uhlmann 2020-01-31T16:27:03Z post120199: BSP 6.5SP1 to 6.5 port http://community.qnx.com/sf/go/post120199 Can a 6.5.0 SP1 BSP be built on a 6.5.0 momentics IDE environment? Is it just a mater of copying files from a similar BSP as the 6.4 to 6.5 migration? Wed, 29 Jan 2020 18:04:41 GMT http://community.qnx.com/sf/go/post120199 Ralph Kanzler 2020-01-29T18:04:41Z post120181: Embedded GUI tools supported by QNX http://community.qnx.com/sf/go/post120181 Hi, We are in the stage of analyzing and choosing the suitable embedded GUI framework for our medical device project which will run on QNX 6.6. Can anyone please provide the list of GUI frameworks supported by QNX 6.6. I am aware of Qt and PEG pro. Your responses are really appreciated. thanks Nagaraj Mon, 27 Jan 2020 14:09:31 GMT http://community.qnx.com/sf/go/post120181 Nagarajan Ramanantham(deleted) 2020-01-27T14:09:31Z post120160: Re: Does QNX 7 SDK VsomeIP and Boost libraries are open source for access? http://community.qnx.com/sf/go/post120160 Hi, If you want to use Boost and VsomeIP for QNX, download there source code and build them locally targeting QNX. I don't think QNX ships VsomeIP and Boost. - Ilyas Mon, 20 Jan 2020 09:24:11 GMT http://community.qnx.com/sf/go/post120160 Ilyas Hamadouche 2020-01-20T09:24:11Z post120156: Does QNX 7 SDK VsomeIP and Boost libraries are open source for access? http://community.qnx.com/sf/go/post120156 Hello, I am working on a project with QNX as the target platform. For enabling phase of the project, the project is using Open Source VsomeIP and Boost 7. But in order to enable validation for QNX platform, we require QNX version of the software libraries. Does the QNX 7 SDK Boost and VSomeIP software libraries are Open Source for download? Fri, 17 Jan 2020 09:54:12 GMT http://community.qnx.com/sf/go/post120156 Daniel Medina(deleted) 2020-01-17T09:54:12Z post120138: Re: IOzone run on QNX http://community.qnx.com/sf/go/post120138 Hi Shao, QNX isn't Linux -- iozone's Linux makefile target calls for features like System V shared memory that aren't available on QNX. You will need to create a makefile target that enables the right set of features for QNX. I built it with: # # QCC QNX build with threads, largefiles, async I/O # qnx: iozone_qnx.o libbif.o libasync.o fileop_qnx.o pit_server.o $(CC) -O $(LDFLAGS) iozone_qnx.o libbif.o libasync.o -lsocket -o iozone $(CC) -O fileop_qnx.o -o fileop $(CC) -O pit_server.o -lsocket -o pit_server iozone_qnx.o: iozone.c libbif.c libasync.c @echo "" @echo "Build iozone for QNX" @echo "" $(CC) -c -O -DNAME='"qnx"' -DHAVE_ANSIC_C -D_FILE_OFFSET_BITS=64 -DASYNC_IO $(CFLAGS) iozone.c -o iozone_qnx.o $(CC) -c -O -DHAVE_ANSIC_C -D_FILE_OFFSET_BITS=64 -DASYNC_IO $(CFLAGS) libbif.c -o libbif.o $(CC) -c -O -DNAME='"qnx"' -DHAVE_ANSIC_C -D_FILE_OFFSET_BITS=64 -DASYNC_IO $(CFLAGS) libasync.c -o libasync.o fileop_qnx.o: fileop.c @echo "" @echo "Building fileop for QNX" @echo "" $(CC) -Wall -c -O $(CFLAGS) -D_FILE_OFFSET_BITS=64 fileop.c -o fileop_qnx.o Fri, 10 Jan 2020 19:09:57 GMT http://community.qnx.com/sf/go/post120138 Will Miles 2020-01-10T19:09:57Z post120136: Re: IOzone run on QNX http://community.qnx.com/sf/go/post120136 Hi Shao, I looked up the shmget, shmat and shmctl functions. They are POSIX, but that part ("XSI Shared Memory") is apparently not implemented under QNX. What you will need to do is to re-write the code that operates with shared memory and make use of shm_open, shm_ctl functions as provided by QNX, see here: http://www.qnx.com/developers/docs/7.0.0/#com.qnx.doc.neutrino.lib_ref/topic/s/shm_ctl.html. Maybe someone from QSS can comment on that, or is XSI Shared Memory planned to be supported in a later release? What about the other guys in this thread, I understand that someone managed to get IOzone built for QNX some time back? Regards, Albrecht Fri, 10 Jan 2020 08:03:13 GMT http://community.qnx.com/sf/go/post120136 Albrecht Uhlmann 2020-01-10T08:03:13Z post120135: Re: IOzone run on QNX http://community.qnx.com/sf/go/post120135 hi: there also have a problem; log as fllow: qcc -static -O3 iozone_linux.o libbif.o libasync.o -o iozone -lc -lsocket iozone_linux.o: In function `alloc_mem': iozone.c:(.text+0x391c): undefined reference to `shmget' iozone.c:(.text+0x3936): undefined reference to `shmat' iozone.c:(.text+0x394d): undefined reference to `shmctl' cc: /home/qt/Desktop/qnx700/host/linux/x86_64/usr/bin/i586-pc-nto-qnx7.0.0-ld error 1 makefile:171: recipe for target 'linux' failed make: *** [linux] Error 1 Fri, 10 Jan 2020 00:58:05 GMT http://community.qnx.com/sf/go/post120135 shao zongfan 2020-01-10T00:58:05Z post120134: Re: IOzone run on QNX http://community.qnx.com/sf/go/post120134 Hi Janardhan, try to add libs to linker explicitly: qcc -static -O3 iozone_linux.o libbif.o libasync.o -o iozone -lc -lsocket Regards, Albrecht Thu, 09 Jan 2020 11:49:17 GMT http://community.qnx.com/sf/go/post120134 Albrecht Uhlmann 2020-01-09T11:49:17Z post120133: Re: IOzone run on QNX http://community.qnx.com/sf/go/post120133 i also some problem, can i get some help? log as fllow: qcc -static -O3 iozone_linux.o libbif.o libasync.o \ -o iozone iozone_linux.o: In function `alloc_mem': iozone.c:(.text+0x391c): undefined reference to `shmget' iozone.c:(.text+0x3936): undefined reference to `shmat' iozone.c:(.text+0x394d): undefined reference to `shmctl' iozone_linux.o: In function `start_master_listen': iozone.c:(.text+0x75eb): undefined reference to `socket' iozone.c:(.text+0x7612): undefined reference to `setsockopt' iozone.c:(.text+0x7635): undefined reference to `setsockopt' iozone.c:(.text+0x765b): undefined reference to `setsockopt' iozone.c:(.text+0x76ab): undefined reference to `bind' iozone_linux.o: In function `master_listen': iozone.c:(.text+0x7811): undefined reference to `accept' iozone.c:(.text+0x7853): undefined reference to `listen' iozone_linux.o: In function `child_send': iozone.c:(.text+0x79b6): undefined reference to `gethostbyname' iozone.c:(.text+0x7a09): undefined reference to `socket' iozone.c:(.text+0x7a5a): undefined reference to `bind' iozone.c:(.text+0x7ad9): undefined reference to `connect' iozone_linux.o: In function `start_child_listen': iozone.c:(.text+0x894b): undefined reference to `socket' iozone.c:(.text+0x8972): undefined reference to `setsockopt' iozone.c:(.text+0x8995): undefined reference to `setsockopt' iozone.c:(.text+0x89bb): undefined reference to `setsockopt' iozone.c:(.text+0x8a1d): undefined reference to `bind' iozone_linux.o: In function `child_attach': iozone.c:(.text+0x8ba3): undefined reference to `listen' iozone.c:(.text+0x8bc3): undefined reference to `accept' iozone_linux.o: In function `start_child_listen_async': iozone.c:(.text+0x945b): undefined reference to `socket' iozone.c:(.text+0x9482): undefined reference to `setsockopt' iozone.c:(.text+0x94a5): undefined reference to `setsockopt' iozone.c:(.text+0x94f1): undefined reference to `bind' iozone_linux.o: In function `start_master_send': iozone.c:(.text+0x9a81): undefined reference to `gethostbyname' iozone.c:(.text+0x9ac9): undefined reference to `socket' iozone.c:(.text+0x9b1a): undefined reference to `bind' iozone.c:(.text+0x9b80): undefined reference to `connect' iozone.c:(.text+0x9c7d): undefined reference to `inet_ntoa' iozone_linux.o: In function `start_master_send_async': iozone.c:(.text+0x9db5): undefined reference to `socket' iozone.c:(.text+0x9e06): undefined reference to `bind' iozone.c:(.text+0x9e50): undefined reference to `connect' iozone_linux.o: In function `sp_start_master_send': iozone.c:(.text+0xcc21): undefined reference to `gethostbyname' iozone.c:(.text+0xcc69): undefined reference to `socket' iozone.c:(.text+0xccba): undefined reference to `bind' iozone.c:(.text+0xcd20): undefined reference to `connect' iozone.c:(.text+0xce1d): undefined reference to `inet_ntoa' iozone_linux.o: In function `sp_start_child_listen': iozone.c:(.text+0xcef3): undefined reference to `socket' iozone.c:(.text+0xcf1a): undefined reference to `setsockopt' iozone.c:(.text+0xcf3d): undefined reference to `setsockopt' iozone.c:(.text+0xcf90): undefined reference to `bind' iozone.c:(.text+0xcfc2): undefined reference to `listen' iozone.c:(.text+0xcfe7): undefined reference to `accept' iozone_linux.o: In function `sp_start_master_listen': iozone.c:(.text+0xd187): undefined reference to `socket' iozone.c:(.text+0xd1ae): undefined reference to `setsockopt' iozone.c:(.text+0xd1d1): undefined reference to `setsockopt' iozone.c:(.text+0xd230): undefined reference to `bind' iozone.c:(.text+0xd259): undefined reference to `listen' iozone.c:(.text+0xd27e): undefined reference to `accept' iozone_linux.o: In function `sp_start_child_send': iozone.c:(.text+0xd521): undefined reference to `gethostbyname' iozone.c:(.text+0xd569): undefined reference to `socket' iozone.c:(.text+0xd5ba): undefined reference to `bind' iozone.c:(.text+0xd620): undefined reference to `connect' iozone_linux.o: In function `pit_gettimeofday': iozone.c:(.text+0xe95f): undefined reference to `getaddrinfo' iozone.c:(.text+0xe997): undefined reference to `socket' iozone.c:(.text+0xe9b4): undefined reference to `connect' iozone.c:(.text+0xe9c9): undefined reference to `freeaddrinfo' iozone.c:(.text+0xea4f): undefined reference to `freeaddrinfo' iozone.c:(.text+0xea80): undefined reference to `freeaddrinfo' iozone.c:(.text+0xeab0): undefined reference to `gai_strerror' cc: /home/qt/Desktop/qnx700/host/linux/x86_64/usr/bin/i586-pc-nto-qnx7.0.0-ld error 1 makefile:171: recipe for target 'linux' failed make: *** [linux] Error 1 Thu, 09 Jan 2020 08:24:24 GMT http://community.qnx.com/sf/go/post120133 shao zongfan 2020-01-09T08:24:24Z post120132: How to use Clang-Tidy with QNX code? http://community.qnx.com/sf/go/post120132 I have a QNX specific code and I want to use clang-tidy for static analysis. Is this possible? I am asking this because clang-tidy is used through the clang compiler, while QCC is based on GCC not clang. Tue, 07 Jan 2020 10:19:14 GMT http://community.qnx.com/sf/go/post120132 Ilyas Hamadouche 2020-01-07T10:19:14Z post120080: LVDS 8bit/4channel to LVDS 6bit/3channel http://community.qnx.com/sf/go/post120080 Hi All, We trying to replace 15" LCD/Touch panel display(1024x768) which has LVDS 4channel interface to 7" LCD/Touch panel(1024x600) which has LVDS 3channel interface. The development board is SABRE Smart platform. We are not sure what are the changes we need to make in QNX BSP code in order for the 7" display to work. We are also trying to find WFDCfg library in our BSP source tree, but it is not available. Your response is really appreciated. Thanks Nagaraj Fri, 08 Nov 2019 11:00:08 GMT http://community.qnx.com/sf/go/post120080 Nagarajan Ramanantham(deleted) 2019-11-08T11:00:08Z post120048: Test suite to validate QNX http://community.qnx.com/sf/go/post120048 Hi, I am looking for the Test suite to validate QNX kernel like we have "LTP" (https://github.com/linux-test-project/ltp) for Linux kernel. Please can some one provide your suggestion to get the right test suite to validate QNX? Regards, Koti Wed, 16 Oct 2019 10:01:35 GMT http://community.qnx.com/sf/go/post120048 Koteswararao Nayudu 2019-10-16T10:01:35Z post120020: QNX - OpenGL issues http://community.qnx.com/sf/go/post120020 Hello again, So I managed to get the Screen API to work, and also get the other functionalities. But there are still problems with OpenGL, even though the example apps work correctly. (my previous post can be found here: http://community.qnx.com/sf/discussion/do/listPosts/projects.community/discussion.community.topc27748). Currently, I'm facing two different behaviors of the application. First, when I'm debugging with Momentics, my app stops in "eglGetDisplay", because it cannot find a proper EGL display and so it returns a "egl_no_display". Second, when I'm just running the app on the board, the application stops in "eglCreateWindowSurface" (and also "eglCreatePlatformWindowSurface", because I also tried both), and the app just stops and returns a "Memory fault". Do you maybe know why we have these two different behaviors? Or maybe what could cause these problems? Thank you! Thu, 03 Oct 2019 14:24:56 GMT http://community.qnx.com/sf/go/post120020 Alexandra Mocanu 2019-10-03T14:24:56Z post120009: QNX7 OpenGL Screen Issues http://community.qnx.com/sf/go/post120009 Hello, I'm working on a M3N board that is supposed to be running QNX Neutrino and I'm using a built BSP from the H3 BSP Package. I'm booting with U-Boot and my host system is Windows10, I'm also using Momentics with an ethernet connection to debug. The issue I'm having is that I cannot seem to be getting the Screen API to work correctly with OpenGL. No example app from the usr/bin folder works. They all generate errors like "eglGetDisplay: cannot access a requested resource", "eglInitialize: EGL is not initialized, or could not be initialized, for the specified display". I also have some other issues with the Neutrino, like the mkdir command not working, or screeninfo, also i don't have a display.conf file and I can't get io-display to work (i saw that sometimes you also have to configure this s thats why i tried it). Do i need some other libraries or some other configurations? I added the graphics libraries from "qnx7\aarch64le\usr\lib\graphics\rcarm3n" in the /tmp folder because it was the only folder i could edit, and also set the $GRAPHICS_ROOT as this folder. Could you please give me some hints on what I could try to do next? Thank you! Mon, 30 Sep 2019 13:45:23 GMT http://community.qnx.com/sf/go/post120009 Alexandra Mocanu 2019-09-30T13:45:23Z post119926: Re: TARFS Resource Manager support http://community.qnx.com/sf/go/post119926 Hi Steve Did you had a chance to look at this? Do you have any update? Thanks V.Muthusubramanian Fri, 13 Sep 2019 05:36:58 GMT http://community.qnx.com/sf/go/post119926 Muthu Vengataraman 2019-09-13T05:36:58Z post119925: Re: Block Device Level Encryption http://community.qnx.com/sf/go/post119925 Hi Do you have any update on this? Thanks V.Muthusubramanian Fri, 13 Sep 2019 05:35:37 GMT http://community.qnx.com/sf/go/post119925 Muthu Vengataraman 2019-09-13T05:35:37Z post119879: virtual serial port http://community.qnx.com/sf/go/post119879 How do I implement a virtual serial port on QNX ? I have an application that is currently listening to a real serial port . I have a change request to fetch the dat from anoter source (TCP) . I do not want to change my existing application that listens to the serial port . Hence I need to create a virtual COM port . Is a virtual serial port idea viable ? Fri, 06 Sep 2019 04:24:08 GMT http://community.qnx.com/sf/go/post119879 Tejus S(deleted) 2019-09-06T04:24:08Z post119808: Re: QNX7: Missing pci_hw-Intel_x86.so http://community.qnx.com/sf/go/post119808 That was too easy! ;-) Found it. Thank You very much! With best regards, Michael Kurt. Fri, 16 Aug 2019 12:31:40 GMT http://community.qnx.com/sf/go/post119808 Michael Kurt 2019-08-16T12:31:40Z post119807: Re: QNX7: Missing pci_hw-Intel_x86.so http://community.qnx.com/sf/go/post119807 It has to be explicitly installed via QNX Software Center (look for "PCI HW module Intel" or something, or just type "pci" in the search field of the "Available" tab) Fri, 16 Aug 2019 11:49:13 GMT http://community.qnx.com/sf/go/post119807 Albrecht Uhlmann 2019-08-16T11:49:13Z post119806: QNX7: Missing pci_hw-Intel_x86.so http://community.qnx.com/sf/go/post119806 Dear community, with QNX7-SDP (latest updates installed) I'm trying to create a boot image for an x86 target PC with pci-server. As far as I know, I have to specify a hardware module for pci-server to run. For my case, this should be pci_hw-Intel_x86.so, but I'm unable to find the file in my installation (neither in 'host' nor 'target' directories as well not in the bsp-archive (BSP_x86[-64]_br-mainline_be-700_SVN848888_JBN5.zip)). The VMware-image provided with the SDP (qnx700.x86_64.7.0.0.SGA201703011126) contains the pci_hw-Intel_x86.so library in it's boot image. Where did this come from? Did I miss to install something? With best regards, Michael Kurt. Fri, 16 Aug 2019 10:01:55 GMT http://community.qnx.com/sf/go/post119806 Michael Kurt 2019-08-16T10:01:55Z post119774: Re: 'dumper' running on non-root does not work without secpogenerate http://community.qnx.com/sf/go/post119774 I tried it and dumper seems to run with the write uid. I'm not sure if I'm running exactly the same version as you but I suspect it doesn't matter. Looking into dumper code, it appears that there is a bug which could cause this. You'll see the policy includes: xprocess_mem_read:100 this is what allows dumper to read the memory of the process that it generates a core file for. However it is subranged by uid so in this case it has been given the ability only to dump processes with a uid of 100. If a process with a different uid crashes, dumper switches to uid 0 to dump it's memory. This however fails and dumper gives up but in doing so neglects to switch back. If this is the case, if you remove the ':100' from xprocess_mem_read in the policy the issue might go away. This is actually one of the cases where you do tend to have to alter the policy generated by secpolgenerate. Secpolgenerate tries to give the minimal abilities which is appropriate in most cases but there are some exceptions. On 2019-06-28, 10:33 AM, "Gauresh Badve" <community-noreply@qnx.com> wrote: Please find the rules for the dumper: # === Rules for type dumper_t ============ allow_attach dumper_t { /proc/dumper }; allow dumper_t self:ability { unlock noinherit # allow all setuid # allow all setgid # allow nonroot mem_peer # allow all priority # allow root able_priv }; allow dumper_t self:ability { pathspace prot_exec map_fixed public_channel prot_write_and_exec }; allow dumper_t self:ability { channel_connect:slogger2_t,devb_t xprocess_mem_read:100 }; _______________________________________________ General http://community.qnx.com/sf/go/post119773 To cancel your subscription to this discussion, please e-mail general-community-unsubscribe@community.qnx.com Fri, 28 Jun 2019 20:22:20 GMT http://community.qnx.com/sf/go/post119774 Roger Maclean 2019-06-28T20:22:20Z post119773: Re: 'dumper' running on non-root does not work without secpogenerate http://community.qnx.com/sf/go/post119773 Please find the rules for the dumper: # === Rules for type dumper_t ============ allow_attach dumper_t { /proc/dumper }; allow dumper_t self:ability { unlock noinherit # allow all setuid # allow all setgid # allow nonroot mem_peer # allow all priority # allow root able_priv }; allow dumper_t self:ability { pathspace prot_exec map_fixed public_channel prot_write_and_exec }; allow dumper_t self:ability { channel_connect:slogger2_t,devb_t xprocess_mem_read:100 }; Fri, 28 Jun 2019 14:33:28 GMT http://community.qnx.com/sf/go/post119773 Gauresh Badve 2019-06-28T14:33:28Z post119772: Re: 'dumper' running on non-root does not work without secpogenerate http://community.qnx.com/sf/go/post119772 Can you provide all the rules from your policy for dumper's type. You shouldn't have to add any rules manually. Any abilities that dumper tries to configure manually should have been left in their default state by the policy so should behave the same with or without a security policy. Dumper exits with a message to stderr if it fails to switch to the specified uid. On 2019-06-28, 9:43 AM, "Gauresh Badve" <community-noreply@qnx.com> wrote: Yes log_1 represents the behavior when we are running the system without secpolgenerate. So here are the steps we followed: Situation 1: 1) Enabled: LD_PRELOAD=/proc/boot/secpol-preload secpolgenerate -u -t 100 2) Give the command "pidin ar" I could see the following log: pid Arguments 1 procnto-smp-instr -v -mr 4098 secpolgenerate -u -t 100 8196 /proc/boot/pipe 12293 /proc/boot/slogger2 -U 111:116 16390 /proc/boot/dumper -U 112 20487 /proc/boot/random -pt -U 113:105 3) Give the command "ps -e -o "user,CMD" and I see the following log: USER CMD 0 procnto-smp-instr 0 secpolgenerate 0 on 110 pipe 111 slogger2 112 dumper 113 random Here I see that the dumper is running through user ID 112. 4) Check the generated policy at /dev/secpolgenerate/policy. Situation 2: 1) Use the policy generated from Situation 1. 2) Disabled: LD_PRELOAD=/proc/boot/secpol-preload secpolgenerate -u -t 100 3) Give the command "pidin ar". Here I see the following log pid Arguments 1 procnto-smp-instr -v -mr 8195 /proc/boot/pipe 12292 /proc/boot/slogger2 -U 111:116 16389 /proc/boot/dumper -U 112 20486 /proc/boot/random -pt -U 113:105 4) Give the command "ps -e -o "user,CMD" and I see the following log: USER CMD 0 procnto-smp-instr 110 pipe 111 slogger2 0 dumper 113 random Now I see that the dumper runs on root(UserID 0) instead of userid 112. To check further I killed an application "kill -SIGBUS PID_of_App" but I still see the dumper running on root. I believe the secpolgenerate should generate the ability required to run the dumper on userid 112. Do we need to add some abilities manually? _______________________________________________ General http://community.qnx.com/sf/go/post119771 To cancel your subscription to this discussion, please e-mail general-community-unsubscribe@community.qnx.com Fri, 28 Jun 2019 14:06:24 GMT http://community.qnx.com/sf/go/post119772 Roger Maclean 2019-06-28T14:06:24Z post119771: Re: 'dumper' running on non-root does not work without secpogenerate http://community.qnx.com/sf/go/post119771 Yes log_1 represents the behavior when we are running the system without secpolgenerate. So here are the steps we followed: Situation 1: 1) Enabled: LD_PRELOAD=/proc/boot/secpol-preload secpolgenerate -u -t 100 2) Give the command "pidin ar" I could see the following log: pid Arguments 1 procnto-smp-instr -v -mr 4098 secpolgenerate -u -t 100 8196 /proc/boot/pipe 12293 /proc/boot/slogger2 -U 111:116 16390 /proc/boot/dumper -U 112 20487 /proc/boot/random -pt -U 113:105 3) Give the command "ps -e -o "user,CMD" and I see the following log: USER CMD 0 procnto-smp-instr 0 secpolgenerate 0 on 110 pipe 111 slogger2 112 dumper 113 random Here I see that the dumper is running through user ID 112. 4) Check the generated policy at /dev/secpolgenerate/policy. Situation 2: 1) Use the policy generated from Situation 1. 2) Disabled: LD_PRELOAD=/proc/boot/secpol-preload secpolgenerate -u -t 100 3) Give the command "pidin ar". Here I see the following log pid Arguments 1 procnto-smp-instr -v -mr 8195 /proc/boot/pipe 12292 /proc/boot/slogger2 -U 111:116 16389 /proc/boot/dumper -U 112 20486 /proc/boot/random -pt -U 113:105 4) Give the command "ps -e -o "user,CMD" and I see the following log: USER CMD 0 procnto-smp-instr 110 pipe 111 slogger2 0 dumper 113 random Now I see that the dumper runs on root(UserID 0) instead of userid 112. To check further I killed an application "kill -SIGBUS PID_of_App" but I still see the dumper running on root. I believe the secpolgenerate should generate the ability required to run the dumper on userid 112. Do we need to add some abilities manually? Fri, 28 Jun 2019 13:43:04 GMT http://community.qnx.com/sf/go/post119771 Gauresh Badve 2019-06-28T13:43:04Z post119770: Re: 'dumper' running on non-root does not work without secpogenerate http://community.qnx.com/sf/go/post119770 It's not completely clear to me what you've done. You need to set LD_PRELOAD only when you’re using secpolgenerate since its purpose is to communicate to secpolgenerate information about procmgr_ability calls. Does log_1 represent the behavior when you're running the system without secpolgenerate using the generated policy? Even if run with the -U option, dumper will run as root at times since it needs to acquire additional privileges when it dumps a core file. So if you did happen to catch it after something crashed, this might be perfectly normal. On 2019-06-28, 7:41 AM, "Gauresh Badve" <community-noreply@qnx.com> wrote: Thank you for the solution. Yes the environment variable "LD_PRELOAD" was not set to /proc/boot/secpol-preload.so. After adding the following change: LD_PRELOAD=/proc/boot/secpol-preload.so I could see that "pidin ar" command shows the dumper running as below pid Arguments 1 procnto-smp-instr -v -mr 8195 /proc/boot/pipe 12292 /proc/boot/slogger2 -U 111:116 16389 /proc/boot/dumper -U 112 20486 /proc/boot/random -pt -U 113:105 But when I run the command " ps -e -o "user,CMD", I get the output as dumper still running on root. Please find the below log_1: USER CMD 0 procnto-smp-instr 110 pipe 111 slogger2 0 dumper 113 random However with the secpolgenerate enabled I see that dumper running on non-root. Please find the below log_2: USER CMD 0 procnto-smp-instr 0 secpolgenerate 110 pipe 111 slogger2 112 dumper 113 random Note: The log_1 uses the same policy generated by the secpolgenerate where we see the dumper running on non-root in log_2. _______________________________________________ General http://community.qnx.com/sf/go/post119769 To cancel your subscription to this discussion, please e-mail general-community-unsubscribe@community.qnx.com Fri, 28 Jun 2019 12:31:23 GMT http://community.qnx.com/sf/go/post119770 Roger Maclean 2019-06-28T12:31:23Z post119769: Re: 'dumper' running on non-root does not work without secpogenerate http://community.qnx.com/sf/go/post119769 Thank you for the solution. Yes the environment variable "LD_PRELOAD" was not set to /proc/boot/secpol-preload.so. After adding the following change: LD_PRELOAD=/proc/boot/secpol-preload.so I could see that "pidin ar" command shows the dumper running as below pid Arguments 1 procnto-smp-instr -v -mr 8195 /proc/boot/pipe 12292 /proc/boot/slogger2 -U 111:116 16389 /proc/boot/dumper -U 112 20486 /proc/boot/random -pt -U 113:105 But when I run the command " ps -e -o "user,CMD", I get the output as dumper still running on root. Please find the below log_1: USER CMD 0 procnto-smp-instr 110 pipe 111 slogger2 0 dumper 113 random However with the secpolgenerate enabled I see that dumper running on non-root. Please find the below log_2: USER CMD 0 procnto-smp-instr 0 secpolgenerate 110 pipe 111 slogger2 112 dumper 113 random Note: The log_1 uses the same policy generated by the secpolgenerate where we see the dumper running on non-root in log_2. Fri, 28 Jun 2019 11:41:49 GMT http://community.qnx.com/sf/go/post119769 Gauresh Badve 2019-06-28T11:41:49Z post119768: Re: 'dumper' running on non-root does not work without secpogenerate http://community.qnx.com/sf/go/post119768 When using secpolgenerate are you setting the environment variable LD_PRELOAD to /proc/boot/secpol-preload.so? This is currently required since it provides the only way of secpolgenerate from learning what abilities a process tries to configure using calls to procmgr_ability. If you don't have this, the policies it generates will lock the abilities which will result in the calls failing when used without secpolgenerate. If you look at the rules in the policy for dumper_t you should find a number of rules show up as unlocked. On 2019-06-27, 9:59 AM, "Gauresh Badve" <community-noreply@qnx.com> wrote: Let me explain my scenario: Version : QNX 7.0.0 I am using secpolgenerate utility to generate security policy for the dumper. The secpolgenerate observes all the behavior of the dumper and creates a policy file at /dev/secpolgenerate/policy. The command I used for secpolgenerate: 'secpolgenerate -u -t 100' I start the dumper using command: on -T dumper_t /proc/boot/dumper -U 112 ( Here 112 is the user id on which I want the dumper to run and dumper_t is the type defined for dumper in the security policy file ) The "pidin ar" command shows the dumper running with user id - 112 and also the policy file generated in location /dev/secpolgenerate/policy shows all the abilities the type dumper_t require to run the dumper. The same generated policy( at /dev/secpolgenerate/policy) is added into the security policy document. The new security policy document is compiled using secpolcompile utility and the binary of the security policy is added into /proc/boot/secpol.bin. This time I do not run the command 'secpolgenerate -u -t 100' and run the dumper "on -T dumper_t /proc/boot/dumper -U 112". Now the "pidin ar" command does not show the dumper running. I believe the secpolgenerate utility generate all the abilities require by the dumper to run. But with the same abilities I don't see the dumper running on non-root i.e. /proc/boot/dumper -U 112 when we disable the command 'secpolgenerate -u -t 100'. _______________________________________________ General http://community.qnx.com/sf/go/post119767 To cancel your subscription to this discussion, please e-mail general-community-unsubscribe@community.qnx.com Thu, 27 Jun 2019 14:14:19 GMT http://community.qnx.com/sf/go/post119768 Roger Maclean 2019-06-27T14:14:19Z post119767: 'dumper' running on non-root does not work without secpogenerate http://community.qnx.com/sf/go/post119767 Let me explain my scenario: Version : QNX 7.0.0 I am using secpolgenerate utility to generate security policy for the dumper. The secpolgenerate observes all the behavior of the dumper and creates a policy file at /dev/secpolgenerate/policy. The command I used for secpolgenerate: 'secpolgenerate -u -t 100' I start the dumper using command: on -T dumper_t /proc/boot/dumper -U 112 ( Here 112 is the user id on which I want the dumper to run and dumper_t is the type defined for dumper in the security policy file ) The "pidin ar" command shows the dumper running with user id - 112 and also the policy file generated in location /dev/secpolgenerate/policy shows all the abilities the type dumper_t require to run the dumper. The same generated policy( at /dev/secpolgenerate/policy) is added into the security policy document. The new security policy document is compiled using secpolcompile utility and the binary of the security policy is added into /proc/boot/secpol.bin. This time I do not run the command 'secpolgenerate -u -t 100' and run the dumper "on -T dumper_t /proc/boot/dumper -U 112". Now the "pidin ar" command does not show the dumper running. I believe the secpolgenerate utility generate all the abilities require by the dumper to run. But with the same abilities I don't see the dumper running on non-root i.e. /proc/boot/dumper -U 112 when we disable the command 'secpolgenerate -u -t 100'. Thu, 27 Jun 2019 13:59:51 GMT http://community.qnx.com/sf/go/post119767 Gauresh Badve 2019-06-27T13:59:51Z post119765: Re: qtalk transfer file http://community.qnx.com/sf/go/post119765 ${QNX_TARGET}/${CPU}/usr/bin/qtalk It is always there. It might not be on your target system, you need to simply copy it there, or include it in the IFS/rootfs build script -Al Thu, 20 Jun 2019 09:19:05 GMT http://community.qnx.com/sf/go/post119765 Albrecht Uhlmann 2019-06-20T09:19:05Z post119764: Re: A/B (Dual Copy) Booting in QNX. http://community.qnx.com/sf/go/post119764 Not sure what you actually want to achieve, could you be more specific? Do you want to have primary IFS for normal operations, and boot from secondary IFS in case of some abnormal condition? Which QNX version are you using? Which hardware platform are you using? -Al Thu, 20 Jun 2019 09:16:11 GMT http://community.qnx.com/sf/go/post119764 Albrecht Uhlmann 2019-06-20T09:16:11Z post119763: Re: is any doc guide to write CAN bus driver MCP2515 for QNX http://community.qnx.com/sf/go/post119763 I think writing CAN driver for this QNX release means designing and implementing a resource manager from scratch. With newer versions, QNX provides libio-can.a library and a standardized interface to CAN, meaning you would *only* need to implement the hardware layer to serve the actual chip. But I am not sure if this framework is available for 6.4.1. -Al Thu, 20 Jun 2019 09:14:34 GMT http://community.qnx.com/sf/go/post119763 Albrecht Uhlmann 2019-06-20T09:14:34Z post119762: Re: Max disk size supported by QNX 6.5.0 http://community.qnx.com/sf/go/post119762 I think this question can only be answered by QSS engineers because the disk drivers are not public source. Thu, 20 Jun 2019 09:11:49 GMT http://community.qnx.com/sf/go/post119762 Albrecht Uhlmann 2019-06-20T09:11:49Z post119757: Re: Max disk size supported by QNX 6.5.0 http://community.qnx.com/sf/go/post119757 I am still waiting for a response to the query . Thu, 13 Jun 2019 13:24:50 GMT http://community.qnx.com/sf/go/post119757 Jagat Bhusan 2019-06-13T13:24:50Z post119756: Re: Max disk size supported by QNX 6.5.0 http://community.qnx.com/sf/go/post119756 > Hi, > > Thanks for your immediate response. > In the link provided by you , it is mentioned as : > > For QNX6 FS > ----------------- > Physical disk sector > 32-bit (2 TB), using the devb API. > > Does it mean that the max size of disk / USB is limited to 2TB ? > > For QNX4 FS > ----------------- > Disk size > 2^64 bytes; limited by the disk driver. > > Does it mean that the max size supported by qnx4 fs is 2^64 bytes. > If so, what is the meaning of "limited by disk driver" ? How to know about the > max size supported by the driver ? > > Thanks > > Jagat > > Thu, 13 Jun 2019 13:23:31 GMT http://community.qnx.com/sf/go/post119756 Jagat Bhusan 2019-06-13T13:23:31Z post119755: is any doc guide to write CAN bus driver MCP2515 for QNX http://community.qnx.com/sf/go/post119755 Hi all, I am trying to develop MCP2515 CAN bus driver for QNX 6.4.1. The platform arch is PPC440. I am wondering anyone can point me where I should start? or is similar to linux device driver development? Linux has kernel code and user code, I would assume it is different since qnx is micro kernel. Please.. Thanks in advance. Wed, 12 Jun 2019 14:47:45 GMT http://community.qnx.com/sf/go/post119755 Chris Liang(deleted) 2019-06-12T14:47:45Z post119748: A/B (Dual Copy) Booting in QNX. http://community.qnx.com/sf/go/post119748 I'm looking to setup a A / B (Dual Copy) boot sequence with QNX. Are there any documents, or working examples, on how to set this up? Sun, 09 Jun 2019 18:19:50 GMT http://community.qnx.com/sf/go/post119748 Michael Delaney 2019-06-09T18:19:50Z post119743: Re: qtalk transfer file http://community.qnx.com/sf/go/post119743 Thank you, But currently I've checked in my system don't have qtalk. Do you know where I can get qtalk binary or source code ? Thanks. Fri, 07 Jun 2019 11:51:59 GMT http://community.qnx.com/sf/go/post119743 khiemspdt lq(deleted) 2019-06-07T11:51:59Z post119742: Re: Max disk size supported by QNX 6.5.0 http://community.qnx.com/sf/go/post119742 Hi, Thanks for your immediate response. In the link provided by you , it is mentioned as : For QNX6 FS ----------------- Physical disk sector 32-bit (2 TB), using the devb API. Does it mean that the max size of disk / USB is limited to 2TB ? For QNX4 FS ----------------- Disk size 2^64 bytes; limited by the disk driver. Does it mean that the max size supported by qnx4 fs is 2^64 bytes. If so, what is the meaning of "limited by disk driver" ? How to know about the max size supported by the driver ? Thanks Jagat There is an expli Fri, 07 Jun 2019 08:32:52 GMT http://community.qnx.com/sf/go/post119742 Jagat Bhusan 2019-06-07T08:32:52Z post119741: Re: Detecting unaligned access during runtime http://community.qnx.com/sf/go/post119741 I think that a thread doing unaligned access creates a fault at processor level that gets translated to a signal (SIGBUS I think, but not sure). You can catch that in your application, but not from outside. To make this wark, you have to disable "alignment fault emulation" in the kernel, its a command line option to procnto. (-ad or something) -Al Fri, 07 Jun 2019 08:13:10 GMT http://community.qnx.com/sf/go/post119741 Albrecht Uhlmann 2019-06-07T08:13:10Z post119740: Re: Block Device Level Encryption http://community.qnx.com/sf/go/post119740 Hi Thanks for your response. As far as my understanding the "fsencrypt" will be used to encrypt the files and folders which are part of the QNX system. The usecase that I am trying is Encrypt a folder/directory (with subdirectories and files inside) in a host operating system running LINUX. This encrypted folder/directory should be decrypted in the target operating system which will be running QNX. I am able to implement the above usecase on a LINUX HOST and LINUX TARGET system using dm-crypt + LUKS (cryptsetup). but not on QNX TARGET since cryptsetup is not there. Thanks V.Muthusubramanian Fri, 07 Jun 2019 08:12:54 GMT http://community.qnx.com/sf/go/post119740 Muthu Vengataraman 2019-06-07T08:12:54Z post119739: Re: qtalk transfer file http://community.qnx.com/sf/go/post119739 qtalk comes as a prebuilt binary from QNX with the standard installation of Momentics. You just need it to include in your bootimage/filesystem image. -Al Fri, 07 Jun 2019 08:10:58 GMT http://community.qnx.com/sf/go/post119739 Albrecht Uhlmann 2019-06-07T08:10:58Z post119738: Re: Max disk size supported by QNX 6.5.0 http://community.qnx.com/sf/go/post119738 See http://www.qnx.com/developers/docs/6.5.0SP1.update/#./com.qnx.doc.neutrino_user_guide/limits.html. There is a specific topic on filesystem limits. HTH -Al Fri, 07 Jun 2019 08:09:03 GMT http://community.qnx.com/sf/go/post119738 Albrecht Uhlmann 2019-06-07T08:09:03Z post119737: Re: Block Device Level Encryption http://community.qnx.com/sf/go/post119737 QNX 7 offers the Merkle filesystem on top of the regular QNX filesystem for integrity, and the QNX filesystem does have an encryption module that can be used as an option. http://www.qnx.com/developers/docs/7.0.0/#com.qnx.doc.neutrino.utilities/topic/f/fsf-merkle.so.html http://www.qnx.com/developers/docs/7.0.0/#com.qnx.doc.neutrino.utilities/topic/f/fsencrypt.html Regards, Albrecht Fri, 07 Jun 2019 08:07:19 GMT http://community.qnx.com/sf/go/post119737 Albrecht Uhlmann 2019-06-07T08:07:19Z post119736: Max disk size supported by QNX 6.5.0 http://community.qnx.com/sf/go/post119736 Hi, What is the maximum disk (hard disk & USB) size supported by QNX 6.5.0 when formatted with QNX file systems such as QNX 4 & QNX6 (fs-qnx6.so) ? Regards Jagat Fri, 07 Jun 2019 06:18:36 GMT http://community.qnx.com/sf/go/post119736 Jagat Bhusan 2019-06-07T06:18:36Z post119735: Block Device Level Encryption http://community.qnx.com/sf/go/post119735 In Linux we could use the dm-crypt + LUKS (cryptsetup) to encrypt and decrypt disks,partitions, logical volumes. Is there any similar or equivalent utility available in QNX 7.0.0. Thanks V.Muthusubramanian Fri, 07 Jun 2019 05:04:54 GMT http://community.qnx.com/sf/go/post119735 Muthu Vengataraman 2019-06-07T05:04:54Z post119731: qtalk transfer file http://community.qnx.com/sf/go/post119731 Hi all, I need to transfer file from PC to target via UART, but it need qtalk on the target. Anyone could share me qtalk source code ? then I try to build at my environment. Thanks. Thu, 06 Jun 2019 14:35:38 GMT http://community.qnx.com/sf/go/post119731 khiemspdt lq(deleted) 2019-06-06T14:35:38Z post119726: Re: TARFS Resource Manager support http://community.qnx.com/sf/go/post119726 I'll take a look at it, but I don't have an AArch64 machine to try it on. Tue, 04 Jun 2019 21:34:23 GMT http://community.qnx.com/sf/go/post119726 Steve Reid 2019-06-04T21:34:23Z post119725: Re: TARFS Resource Manager support http://community.qnx.com/sf/go/post119725 I was able to cross compile the Code for AARCH64 on QNX7. but when I ran the commands tarfs & mount -T tarfs /home/root/sample.tar sample.tar.dir the mount command didn't return any error. But when I try to cd to sample.tar.dir it gave Bad descriptor error. Thanks V.Muthusubramanian Tue, 04 Jun 2019 14:13:20 GMT http://community.qnx.com/sf/go/post119725 Muthu Vengataraman 2019-06-04T14:13:20Z post119724: Re: TARFS Resource Manager support http://community.qnx.com/sf/go/post119724 Hi Steve Yes. I downloaded the source code from the link that you provided. I tried cross-compiling it for AARCH64 architecture on QNX7 and I get link errors for gzopen,gzclose APIS. Thanks V.Muthusubramanian Tue, 04 Jun 2019 10:40:15 GMT http://community.qnx.com/sf/go/post119724 Muthu Vengataraman 2019-06-04T10:40:15Z post119723: Re: TARFS Resource Manager support http://community.qnx.com/sf/go/post119723 Do you mean the one that's discussed in the QNX Neutrino Cookbook? If so, you can get the source from the Download area on our website (it's in the same directory as the PDF versions of the SDP documentation). Here's a link: http://www.qnx.com/download/feature.html?programid=30134 Mon, 03 Jun 2019 14:29:44 GMT http://community.qnx.com/sf/go/post119723 Steve Reid 2019-06-03T14:29:44Z post119716: TARFS Resource Manager support http://community.qnx.com/sf/go/post119716 Hi How do I test the TARFS resource manager on QNX7.0 running on a AARCH64 CPU. Where can I get the source code of the same. Thanks V.Muthusubramanian Thu, 30 May 2019 11:46:44 GMT http://community.qnx.com/sf/go/post119716 Muthu Vengataraman 2019-05-30T11:46:44Z post119713: Detecting unaligned access during runtime http://community.qnx.com/sf/go/post119713 We are using QNX 6.6 with ARMv7 cores. Does QNX have any options to detect unaligned memory access at runtime? With linux this can be achieved by echo 3 > /proc/cpu/alignment to warn and fixup errors. Fri, 24 May 2019 22:51:14 GMT http://community.qnx.com/sf/go/post119713 Sesh 2019-05-24T22:51:14Z post119703: qcc stopped working. http://community.qnx.com/sf/go/post119703 I am a newbie to QNX development (taking over an old project). Something has changed, and I don't know what, and I am no longer able to compile anything. I am using the QNX SDP 6.4.1 on a Windows 10 PC. Every compile fails with the following message: '-p' is not recognized as an internal or external command, operable program or batch file. ********************************************************* Your software must be activated, run the "qnxactivate" application to activate. For more information or to get a new license key contact QNX Software Systems at activate@qnx.com ********************************************************* license check failed Even if I run qcc by itself on the command line, with no options, I get the same error. I do have a valid license: C:\Users\myusername>showlicense The currently active license is: Commercial The text corresponding to this license can be found in: C:\QNX641\install\qnxsdp\6.4.1\licenseCommercial.txt Any ideas on how to toubleshoot this? Thanks! Fri, 10 May 2019 22:57:37 GMT http://community.qnx.com/sf/go/post119703 Kevin Phillips 2019-05-10T22:57:37Z post119691: How to use Eigen in QNX 6.4.1 http://community.qnx.com/sf/go/post119691 Hi all Anyone knows how to include Eigen? my target is QNX 6.4.1, PPC I am using momentics for corss-compiling on windows my program is simple #include <Eigen/Dense> using Eigen::MatrixXd; int main(int argc, char *argv[]) { MatrixXd m(2,2); return 0; } when I compile it, it shows following errors: Compiling my_math.cpp qcc -V4.2.4,gcc_ntoppcbe_ecpp-ne -D_NO_CONSOLE_IO_ -DNDEBUG -O2 -IC:\src_Robotics\Robotics/Releases/Include -IC:\eigen_include\Eigen\src\Core -D_EMBEDDED_APPLICATION_ -Wno-unknown-pragmas -c vo_math.cpp vo_math.cpp:26:23: error: Eigen/Dense: No such file or directory cc: C:/QNX640/host/win32/x86/usr/lib/gcc/powerpc-unknown-nto-qnx6.4.0/4.2.4/cc1plus caught signal 1 make: *** [vo_math.o] Error 1 Thanks in advance Thu, 02 May 2019 02:39:19 GMT http://community.qnx.com/sf/go/post119691 Chris Liang(deleted) 2019-05-02T02:39:19Z post119684: About QNX 7 include path http://community.qnx.com/sf/go/post119684 Dear all: I'm using QNX 7 on ubuntu 18.04 OS. Using include path qnx700/target/qnx7/usr/include/c++/5.4.0 to complie Google's Gtest, compile success. But using include path qnx700/target/qnx7/usr/include/c++/v1, encountered the follow errors: ./libgtest_main.a(gtest-all.o): In function `testing::internal::Random::Generate(unsigned int)': googletest/make/../src/gtest.cc:348: undefined reference to `std::__1::basic_ostream<char, std::__1::char_traits<char> >::operator<<(unsigned int)' googletest/make/../src/gtest.cc:349: undefined reference to `std::__1::basic_ostream<char, std::__1::char_traits<char> >::operator<<(unsigned int)' What is the diffeerence between of 5.4.0 and v1? What path should be included for C++ project? Sun, 28 Apr 2019 06:54:29 GMT http://community.qnx.com/sf/go/post119684 martin fong(deleted) 2019-04-28T06:54:29Z post119653: showmem showing weird memory information http://community.qnx.com/sf/go/post119653 Hi, I want to check the program memory usage, data/bss, heap I am using showmem -P to get the process memory usage In my program, I create a large static buffer: static char testBuf[10240]; // 10k bytes buffer memset(testBuf, 0, sizeof(testBuf)); // set to zero open this program in momentics, it shows .bss 0x00002800 testBuf total .bss 0x000152e0 this is correct, testBuf is static variable and it should belong to .bss section When I ran this program in qnx 6.4.1, using showmem it gives Total Code Data Heap Stack Other 4382720 1540096 81920 2752512 8192 0 Now, I remove the testBuf. after compiled, total .bss 0x00012ae0, so the difference is 0x2800 which makes sense. However, when I ran the new program again, check the showmem it shows: Total Code Data Heap Stack Other 4374528 1540096 81920 2744320 8192 0 I am expecting Data section reduced, however, it is not and the heap section reduced. Does it means .bss includes in the Heap section in showmem?? Thanks Thu, 11 Apr 2019 15:08:21 GMT http://community.qnx.com/sf/go/post119653 Chris Liang(deleted) 2019-04-11T15:08:21Z post119623: Re: MMC util to read extcsd from emmc devices http://community.qnx.com/sf/go/post119623 The SD/MMC drivers usually come in source form in the various BSPs. Maybe you can look for some special devctl calls that would retrieve this information. Regards, Al Fri, 29 Mar 2019 12:16:03 GMT http://community.qnx.com/sf/go/post119623 Albrecht Uhlmann 2019-03-29T12:16:03Z post119619: MMC util to read extcsd from emmc devices http://community.qnx.com/sf/go/post119619 HI All, I want read the extcsd register values to know about much info about emmc. In linux we have MMC util to read the information like csd cid and extcsd and other information. Is there any utility developed for QNX to read all the details about emmc device. Can any one share the source code or utility to read it. any help will be great for me... Thanks in advance Thanks & Regards Janardhan Reddy Thu, 28 Mar 2019 11:19:18 GMT http://community.qnx.com/sf/go/post119619 janardhan reddy(deleted) 2019-03-28T11:19:18Z post119618: Re: O_DIRECT giving error while compiling the source code http://community.qnx.com/sf/go/post119618 HI Albrecht Uhlmann, Thanks for your help... I am able to built code.. Thanks & Regards Janardhan Reddy Thu, 28 Mar 2019 11:15:15 GMT http://community.qnx.com/sf/go/post119618 janardhan reddy(deleted) 2019-03-28T11:15:15Z post119600: Re: O_DIRECT giving error while compiling the source code http://community.qnx.com/sf/go/post119600 I think O_DIRECT is not supported under QNX. Since it is a performance optimization, you could simply do something like #ifnef O_DIRECT #define O_DIRECT 0 #endif Regards, Albrecht Fri, 22 Mar 2019 13:33:44 GMT http://community.qnx.com/sf/go/post119600 Albrecht Uhlmann 2019-03-22T13:33:44Z post119599: Testdisk support for qnx660 http://community.qnx.com/sf/go/post119599 HI QNX, I am trying to compile netbsd testdisk package which is part of qnx660/pkgsrc to run on my QNX660 platform. But i am getting build errors and unable to compile successfully. Is testdisk support for qnx?? can anyone share the source code path if it support on QNX. Thanks in advance Thanks & Regards Janardhan Reddy Thu, 21 Mar 2019 11:53:45 GMT http://community.qnx.com/sf/go/post119599 janardhan reddy(deleted) 2019-03-21T11:53:45Z post119598: O_DIRECT giving error while compiling the source code http://community.qnx.com/sf/go/post119598 HI QNX, I am compiling one of the source code which having OPEN( ) function call having O_DIRECT to open the file. But i am getting error while compiling that O_DIRECT is not declared. Is there any alternate to use to open the file which does same functionality as O_DIRECT. Thanks in advance Thanks & Regards Janardhan Reddy Thu, 21 Mar 2019 11:50:02 GMT http://community.qnx.com/sf/go/post119598 janardhan reddy(deleted) 2019-03-21T11:50:02Z post119587: Re: user managing and/or passwd problem ! http://community.qnx.com/sf/go/post119587 The image file system is read-only, you can only place pre-prepared versions of /etc/group, /etc/passwd and /etc/shadow there, these files are not changable at runtime, so passwd utility fails. For quick-tests, you can startup a RAMdrive and mount it. For persistent storage, you need a writable file system and mount it in appropriate place. Regards, Al Mon, 18 Mar 2019 10:00:21 GMT http://community.qnx.com/sf/go/post119587 Albrecht Uhlmann 2019-03-18T10:00:21Z post119585: user managing and/or passwd problem ! http://community.qnx.com/sf/go/post119585 Good day, I have a problem similar to a post titled “Passwd Trouble - post56074”. I worked with a BSP that is based on “image file-system”. The original BSP did not include some account managing files in “/etc” as “group”, “shadow” and “.pwlock”. I have edited and/or added those missing files into the folder and compiled the BSP. Although “passwd new_user” could be invoked, I face with “cannot create password entry” message in each try. Moreover, despite of any “passwd” calling for changing the “root” password, the next “login” as “root” does not request the password as shown below: # passwd changing password for root New password: Retype new password: # login login: root # passwd jack User id # (100) 100 Group id # (100) 100 Real name () jackson Home directory (/usr/jack) /ssd/jack Login shell (/bin/sh) New password: Retype new password: cannot create password entry Regards, Sat, 16 Mar 2019 07:33:53 GMT http://community.qnx.com/sf/go/post119585 Mh Mansouri(deleted) 2019-03-16T07:33:53Z post119565: Re: Error in Final Launch Sequence (Unknown Response Error Attempting to Exec Shared Lib) http://community.qnx.com/sf/go/post119565 Getting the same error, has anyone gotten anywhere with this? Wed, 06 Mar 2019 19:16:15 GMT http://community.qnx.com/sf/go/post119565 Ian Clough 2019-03-06T19:16:15Z post119558: Re: IOzone run on QNX http://community.qnx.com/sf/go/post119558 HI Will, I have resolved this fsync error by giving -l c option in make file. Now i am able to run iozone successfully. Thanks for your great support to execute iozone. Thanks & Regards Janardhan Reddy Tue, 05 Mar 2019 07:52:57 GMT http://community.qnx.com/sf/go/post119558 janardhan reddy(deleted) 2019-03-05T07:52:57Z post119557: Re: IOzone run on QNX http://community.qnx.com/sf/go/post119557 Hi Will, Thanks for your support. Able to build the iozone and running on QNX660 arm processor. After run iozone process is getting interrupted. ERROR log: # ./iozone -a Iozone: Performance Test of File I/O Version $Revision: 3.408 $ Compiled for 32 bit mode. Build: qnx Contributors:William Norcott, Don Capps, Isom Crawford, Kirby Collins Al Slater, Scott Rhine, Mike Wisner, Ken Goss Steve Landherr, Brad Smith, Mark Kelly, Dr. Alain CYR, Randy Dunlap, Mark Montague, Dan Million, Gavin Brebner, Jean-Marc Zucconi, Jeff Blomberg, Benny Halevy, Dave Boone, Erik Habbinga, Kris Strecker, Walter Wong, Joshua Root, Fabrice Bacchella, Zhenghua Xue, Qin Li, Darren Sawyer. Ben England. Run began: Wed Dec 31 20:56:56 1969 Auto Mode Command line used: ./iozone -a Output is in Kbytes/sec Time Resolution = 0.001000 seconds. Processor cache size set to 1024 Kbytes. Processor cache line size set to 32 bytes. File stride size set to 17 * record size. random random bkwd record stride KB reclen write rewrite read reread read write read rewrite read fwrite frewrite fread freread 64 4fsync: Function not implemented iozone: interrupted exiting iozone Can you help on this what is causing this error. Thanks & Regards Janardhan reddy Mon, 04 Mar 2019 11:32:32 GMT http://community.qnx.com/sf/go/post119557 janardhan reddy(deleted) 2019-03-04T11:32:32Z post119554: Re: IOzone run on QNX http://community.qnx.com/sf/go/post119554 Hi, librt and libpthread aren't needed on QNX -- those functions are included in the base libc. You can just remove them from the linker lines in the makefile. -Will Fri, 01 Mar 2019 15:00:13 GMT http://community.qnx.com/sf/go/post119554 Will Miles 2019-03-01T15:00:13Z post119553: Re: IOzone run on QNX http://community.qnx.com/sf/go/post119553 HI Will, Thanks for your great help, now i am able to compile the iozone but while linking getting the error. error log: Building iozone for qnx qcc -c -O3 -D_FILE_OFFSET_BITS=64 -DHAVE_ANSIC_C -DASYNC_IO -DNO_MADVISE \ -DNAME='"qnx"' -DQNX_ARM \ -Dqnx -D_LARGEFILE64_SOURCE iozone.c \ -o iozone_qnx-arm.o qcc -c -O3 -D_FILE_OFFSET_BITS=64 -DHAVE_ANSIC_C -DASYNC_IO \ -Dqnx libbif.c -o libif.o qcc -c -O3 -Dqnx -D_FILE_OFFSET_BITS=64 -DHAVE_ANSIC_C -DASYNC_IO \ -D_LARGEFILE64_SOURCE libasync.c -o libasync.o qcc -O3 iozone_qnx-arm.o libif.o libasync.o -lrt -lpthread -o iozone /opt/qnx660/host/linux/x86/usr/bin/i486-pc-nto-qnx6.6.0-ld: cannot find -lrt /opt/qnx660/host/linux/x86/usr/bin/i486-pc-nto-qnx6.6.0-ld: cannot find -lpthread cc: /opt/qnx660/host/linux/x86/usr/bin/i486-pc-nto-qnx6.6.0-ld error 1 make: *** [qnx] Error 1 Thanks in advance thanks & Regards Janardhan Reddy Fri, 01 Mar 2019 05:31:13 GMT http://community.qnx.com/sf/go/post119553 janardhan reddy(deleted) 2019-03-01T05:31:13Z post119549: Re: IOzone run on QNX http://community.qnx.com/sf/go/post119549 Hi, I picked up the iozone sources from iozone.org. From there, I basically did: -> makefile: added a qnx target. I used -D_FILE_OFFSET_BITS=64 -D_HAVE_ANCIC_C -DASYNC_IO -DNO_MADVISE -> iozone.c: Add some defined(__QNX__) to get the right headers and signal handling bits; also renamed long long delay to tp_delay to avoid linker issues with delay() -> libasync.c: fix includes on QNX, we need <stdint.h> and <errno.h> instead of <sys/errno.h> -> libif.c: fix header includes with some defined(__QNX__) NB that I'm also building with qcc in the usual way, eg. CC=qcc make qnx Hope this helps some, -Will Wed, 27 Feb 2019 21:51:04 GMT http://community.qnx.com/sf/go/post119549 Will Miles 2019-02-27T21:51:04Z post119541: Re: QNX-IFS is not loading on IMX7-Sabare board http://community.qnx.com/sf/go/post119541 HI, We are able to load the QNX-IFS and platform is booting fine. Thanks & Regards Janardhan Reddy Tue, 26 Feb 2019 05:34:19 GMT http://community.qnx.com/sf/go/post119541 janardhan reddy(deleted) 2019-02-26T05:34:19Z post119540: Re: IOzone run on QNX http://community.qnx.com/sf/go/post119540 Hi Will, Thanks for your response. I am looking into the latest iozone source code from netbsd. I added some places in iozone.c with (__QNX__), while building facing lotof build errors. As you mentioned the post because of licensing you are unable to share the source code,can you please suggest the files which we need to modify/tweek to port on QNX. it will be a great help to me Thanks & Regards Janardhan reddy Mon, 25 Feb 2019 11:17:29 GMT http://community.qnx.com/sf/go/post119540 janardhan reddy(deleted) 2019-02-25T11:17:29Z post119534: Re: IOzone run on QNX http://community.qnx.com/sf/go/post119534 Hi, I can't resist a challenge, so I took a quick look. Are you sure you were looking at the right program? iozone itself seems to depend on nothing but libc (and on QNX libsocket). The tarball includes some scripts and pieces to process the output with gnuplot, but you don't need them to run the benchmark; and if you do want those graphs, you can run the processing on some other machine after collecting the data. I found that porting iozone was pretty straightforward - basically just copying an existing OS profile with the desired features, adding || defined(__QNX__) in a few places, and the usual header idiosyncrasy cleanup. Unfortunately, the license for iozone prohibits publication of derived works, so I cannot post my sources - sorry. I would also note that iozone benchmarks using standard clock interfaces, which on QNX 6.x are quite coarse (typical resolution ~1 ms, although if you increase the clock interrupt rate via ClockPeriod() you could probably push it down to 100us with only a moderate overhead). This limits the accuracy of the measurements somewhat, particularly for small transactions which may complete faster than 1 tick. Adjusting to use ClockCycles() or the like for more accurate wall-time measurements would be a more complex task. (We, er, have an LD_PRELOAD library we use to intercept the underlying libc time calls and augment them with CPU cycle counter data, but again for licensing reasons I can't share this code, sorry.) I don't know if this has changed in QNX 7. -Will Wed, 20 Feb 2019 15:05:35 GMT http://community.qnx.com/sf/go/post119534 Will Miles 2019-02-20T15:05:35Z post119532: Re: IOzone run on QNX http://community.qnx.com/sf/go/post119532 We tried to port IOZone to QNX some time back but appeared to us not a straight-forward port, I think there were lots of library depencies that would need to be satisfied. So if an internet search doesn't yield a result, I guess there is no maintained QNX port available. Maybe inside QNX for disk testing. Regards, Albrecht Wed, 20 Feb 2019 08:38:48 GMT http://community.qnx.com/sf/go/post119532 Albrecht Uhlmann 2019-02-20T08:38:48Z post119531: IOzone run on QNX http://community.qnx.com/sf/go/post119531 HI QNX, I would like to run IOZONE on QNX to get performance results. Can i get the iozone source code/ link to source code to run on QNX6.6.0 Thanks in advance Thanks & Regards Janardhan Reddy Wed, 20 Feb 2019 05:36:42 GMT http://community.qnx.com/sf/go/post119531 janardhan reddy(deleted) 2019-02-20T05:36:42Z post119498: Re: question for procnto-booke and procnto-booke-instr kernels http://community.qnx.com/sf/go/post119498 > In that case we would need more information. > > - can you post the build script that you use to create the boot image? > - are you sure all settings/env vars etc. are the same, only procnto replaced > with instrumented version? > - How are you launching you processes? > - How do they terminate? (external signal, from their own)? > > It might be possible that the instrumented procnto behaves differently > regarding process termination, maybe someone from QNX can comment on this > after reviewing your data. > > Regards, > -Al To be honest, I dont think the env variable or settings are same, cuz i just tried to load with procnto. it still fails some of my processes. Thanks Fri, 08 Feb 2019 16:43:00 GMT http://community.qnx.com/sf/go/post119498 Chris Liang(deleted) 2019-02-08T16:43:00Z post119496: Re: question for procnto-booke and procnto-booke-instr kernels http://community.qnx.com/sf/go/post119496 In that case we would need more information. - can you post the build script that you use to create the boot image? - are you sure all settings/env vars etc. are the same, only procnto replaced with instrumented version? - How are you launching you processes? - How do they terminate? (external signal, from their own)? It might be possible that the instrumented procnto behaves differently regarding process termination, maybe someone from QNX can comment on this after reviewing your data. Regards, -Al Fri, 08 Feb 2019 15:43:51 GMT http://community.qnx.com/sf/go/post119496 Albrecht Uhlmann 2019-02-08T15:43:51Z post119495: Re: question for procnto-booke and procnto-booke-instr kernels http://community.qnx.com/sf/go/post119495 > To my understanding, no modifications are necessary. Just replace boot image > and reboot target. > > There could be restrictions the other way round: If you place calls to > TRACE_EVENT in your code these functions will fail if executed on a non- > instrumented kernel. > > -Al Hi Albrecht, Thanks replying. Then, it is weird. After I replace with instr kernel image, some of my processes become zombies. any idea? Fri, 08 Feb 2019 15:15:07 GMT http://community.qnx.com/sf/go/post119495 Chris Liang(deleted) 2019-02-08T15:15:07Z post119493: Re: question for procnto-booke and procnto-booke-instr kernels http://community.qnx.com/sf/go/post119493 To my understanding, no modifications are necessary. Just replace boot image and reboot target. There could be restrictions the other way round: If you place calls to TRACE_EVENT in your code these functions will fail if executed on a non-instrumented kernel. -Al Fri, 08 Feb 2019 12:33:04 GMT http://community.qnx.com/sf/go/post119493 Albrecht Uhlmann 2019-02-08T12:33:04Z post119492: question for procnto-booke and procnto-booke-instr kernels http://community.qnx.com/sf/go/post119492 Hi all, a quick question. If I wrote program running on procnto-booke kernel, does the program also be able to run on procnto-booke-instr kernel if I changed BSP image from procnto-booke to procnto-booke-instr? Thanks Thu, 07 Feb 2019 23:39:49 GMT http://community.qnx.com/sf/go/post119492 Chris Liang(deleted) 2019-02-07T23:39:49Z post119467: GCOV http://community.qnx.com/sf/go/post119467 Hello QNX, I am in need of your help regarding simplistic ''HELLO WORLD'' program using GCOV with the compile-option “std=gnu++98” and are able to compile and link code with QNX660 qcc. In code::blocks I try to compile the target 'debgcov_qnx660_qcc_x86' but, I am getting an error as undefined reference to `__gcov_init' and undefined reference to `__gcov_merge add'. So, I kindly need your help to short out these errors using Gcov in code::blocks. Thank you in advance and looking forward to your positive response Arun Vijay Mon, 04 Feb 2019 11:14:27 GMT http://community.qnx.com/sf/go/post119467 Arun Vijay Selvaraj(deleted) 2019-02-04T11:14:27Z post119463: Re: problem with fslSATA detecting ssd mSATA http://community.qnx.com/sf/go/post119463 Hello Mr. Varlet, I've tried your binary file but it gave me exact same result as before. I compared two binary files, apart from some info related to host machine and build date they are all the same. Thank you for you response I'll try to contact MEN Germany. Wed, 30 Jan 2019 11:04:22 GMT http://community.qnx.com/sf/go/post119463 hamed davaneh(deleted) 2019-01-30T11:04:22Z post119462: Re: problem with fslSATA detecting ssd mSATA http://community.qnx.com/sf/go/post119462 attachement Wed, 30 Jan 2019 09:01:31 GMT http://community.qnx.com/sf/go/post119462 Guillaume Varlet 2019-01-30T09:01:31Z post119461: Re: problem with fslSATA detecting ssd mSATA http://community.qnx.com/sf/go/post119461 Hello M. Davaneh. Please try the attached driver. If you have still problem, please contact MEN Support in Germany (support at men.de) Guillaume Varlet, Customer Support / SW developer MEN Mikro Elektronik SAS 18, rue René Cassin ZA de la Châtelaine 74240 Gaillard, France www.men-france.fr Wed, 30 Jan 2019 09:00:55 GMT http://community.qnx.com/sf/go/post119461 Guillaume Varlet 2019-01-30T09:00:55Z post119460: Re: problem with fslSATA detecting ssd mSATA http://community.qnx.com/sf/go/post119460 test Wed, 30 Jan 2019 08:49:59 GMT http://community.qnx.com/sf/go/post119460 Guillaume Varlet 2019-01-30T08:49:59Z post119452: Re: QNX-IFS is not loading on IMX7-Sabare board http://community.qnx.com/sf/go/post119452 > Hello QNX, > > I have downloaded MCIMX7 SABARE target BSP from below link > Bsp link: http://community.qnx.com/sf/frs/do/viewRelease/projects.bsp/frs. > sdp_6_6_bsp_for_the_nxp_mcimx7_s.sdp_6_6_bsp_for_the_nxp_mcimx7_s > > Built the bsp using QNX660 and created IPL(ipl-imx-sabre.bin) and QNX-IFS by > following the user guide. > Flashed the images on SD card and kept the card on target. after power on IPL > is loading successfully and asked to select the load image from SD card. > Given option to load from SD card, Image load is successful but image scan is > getting failed always. > > How can i check what is causing to fail image scan. > > Could you please help me on this. > > Thanks in advance > > Thanks & Regards > Janardhan Reddy Tue, 29 Jan 2019 03:32:30 GMT http://community.qnx.com/sf/go/post119452 janardhan reddy(deleted) 2019-01-29T03:32:30Z post119451: QNX-IFS is not loading on IMX7-Sabare board http://community.qnx.com/sf/go/post119451 Hello QNX, I have downloaded MCIMX7 SABARE target BSP from below link Bsp link: http://community.qnx.com/sf/frs/do/viewRelease/projects.bsp/frs.sdp_6_6_bsp_for_the_nxp_mcimx7_s.sdp_6_6_bsp_for_the_nxp_mcimx7_s Built the bsp using QNX660 and created IPL(ipl-imx-sabre.bin) and QNX-IFS by following the user guide. Flashed the images on SD card and kept the card on target. after power on IPL is loading successfully and asked to select the load image from SD card. Given option to load from SD card, Image load is successful but image scan is getting failed always. How can i check what is causing to fail image scan. Could you please help me on this. Thanks in advance Thanks & Regards Janardhan Reddy Tue, 29 Jan 2019 03:26:19 GMT http://community.qnx.com/sf/go/post119451 janardhan reddy(deleted) 2019-01-29T03:26:19Z post119450: Re: qnx 6.6 appsmedia on beaglebone black http://community.qnx.com/sf/go/post119450 following 《QNX SDK for Apps and Media 1.1 Getting Started》, I am able to building a target image of beaglebonedemo. Thanks for well documented. Mike Mon, 28 Jan 2019 05:47:30 GMT http://community.qnx.com/sf/go/post119450 mike scott(deleted) 2019-01-28T05:47:30Z post119440: Re: problem with fslSATA detecting ssd mSATA http://community.qnx.com/sf/go/post119440 We developed our own S-ATA driver for the P1013 long time ago. I remember we had to add some settings in startup: Add dynamic interrupts for the S-ATA controller. Maybe that's the reason. Regards, Al Wed, 23 Jan 2019 14:18:24 GMT http://community.qnx.com/sf/go/post119440 Albrecht Uhlmann 2019-01-23T14:18:24Z post119433: problem with fslSATA detecting ssd mSATA http://community.qnx.com/sf/go/post119433 I'm using QNX 6.5 on an NXP single-core P1013. It has an mSATA slot. in U-Boot it successfully detects the SATA: A21=> sata device SATA0 SATA device 0: Model: G-BONG G300 32G Firm: 20170223 Ser#: AA000000000003083320 Type: Hard Disk Capacity: 30208.0 MB = 29.5 GB (61865984 x 512) ... is now current device A21=> sata part SATA0 Partition Map for SATA device 0 -- Partition Type: DOS Partition Start Sector Num Sectors Type 1 2048 61859840 6 But in the OS with fslSATA after about one minute I get error. I'm using fslSATA as noted in release note for P1010-RDB BSP : devb-fslSata fslSata ioport=0xFF718000,irq=65 Error: xpt_configure: fslSata SIM attach failure Tue, 22 Jan 2019 13:15:39 GMT http://community.qnx.com/sf/go/post119433 hamed davaneh(deleted) 2019-01-22T13:15:39Z post119418: qnx 6.6 appsmedia on beaglebone black http://community.qnx.com/sf/go/post119418 Hi QNX, qnx sdp 6.6, qnx sdk for apps and media 1.1 release, BSP_ti-am335x-beaglebone_br-660_be-660_SVN797070_JBN574.zip beaglebonedemo.ext.anm11.258.150325_2017 About_the_QNX_SDK_for_Apps_and_Media.pdf I am working on beaglebone black with qnx 6.6 + sdk for apps and media. According to 《About_the_QNX_SDK_for_Apps_and_Media.pdf》 page 11, quote, "You begin by downloading a BSP from the QNX website. Among other things, the BSP should include three buildfiles: • a QNX SDP 6.6 BSP-specific buildfile • a board-specific buildfile for Apps and Media (appsmedia-sample-board.build) • a common buildfile for Apps and Media (appsmedia-sample-common.build)" However, there is only one build file in the BSP_xxxx.zip , i.e., beaglebone.build, while missing appsmedia-sample-beaglebone.build and appsmedia-sample-common.build. On the other hands, I have tried beaglebonedemo.ext.anm11.258.150325_2017, which actually provides full support of appsmedia package. I am wondering whether QNX experts could provide appsmedia-sample-beaglebone.build and appsmedia-sample-common.build, or provide the building script for beaglebonedemo to facilitate my study. Please advise, thanks in advance. Mike Thu, 17 Jan 2019 06:01:43 GMT http://community.qnx.com/sf/go/post119418 mike scott(deleted) 2019-01-17T06:01:43Z post119412: Re: Error in Final Launch Sequence (Unknown Response Error Attempting to Exec Shared Lib) http://community.qnx.com/sf/go/post119412 @Amit: Did you figure out the solution? If so, please let me know the solution. I am experiencing the same issue. Tue, 15 Jan 2019 00:34:11 GMT http://community.qnx.com/sf/go/post119412 Hari Prasad 2019-01-15T00:34:11Z post119411: Re: DIM2 (MediaLB), i.MX6, clocks, porting Linux function http://community.qnx.com/sf/go/post119411 Hi Andrey, I don't have this code at hand, haven't used MediaLB explicitly myself. I just explained the general procedure. Regards, Al Thu, 10 Jan 2019 16:49:12 GMT http://community.qnx.com/sf/go/post119411 Albrecht Uhlmann 2019-01-10T16:49:12Z post119410: Re: slogger writes non-sense messages to the log file http://community.qnx.com/sf/go/post119410 > Hi Chris, > the only reason I can think of is, when your application is writing binary > data into the slogf(). > The API for slog maintains a flag, telling the server (slogger) that the data > is readably text or just binary data. > So when your Apps are writing binary data using slogf(), this garbage will be > in the servers text buffers. > > In general, when sending binary (raw) data, you should use the slogb() API, > when sending just readable text, use slogf(). A third API to send just > integers as an array which later can be translated when the message is read > and interpreted. > > Again, I think in your case, one of the formatted message contains no zero > termination or garbage. I can't imagine, the slogger damages the messages on > the server side. > > Do you have the source of the app, the garbage comes from? Hi Peter, Thank you again for all the comments and thoughts. You are right, to send formatted messages, use slogf(). I am sending formatted ascii txt message in my case. my code is: sprintf(debugMsg, "%.3f, %.3f", distance, time); slogf(_SLOG_SETCODE(_SLOGC_TEST, 0), _SLOG_DEBUG1, "<%s:%d> compute :%s", LOG_IDENT(id), __LINE__, debugMsg); As you can see, this is formatted readable ASCII message. slogf is correct API to use. I am sending exactly same message repeat all over again. I saw the garbage messages after the program ran for 10 mins. the logging rate is in 200Hz. I am thinking it might related to the heap memory. Because I ran slogger with 'slogger -s 256k -l /dev/shmem/log -f 7', -s 256k specify in-memory buffer size used which is allocated on heap. If I increase to -s 15000k, I do not see the garbage at all. Thanks. Thu, 10 Jan 2019 15:53:50 GMT http://community.qnx.com/sf/go/post119410 Chris Liang(deleted) 2019-01-10T15:53:50Z post119409: Re: slogger writes non-sense messages to the log file http://community.qnx.com/sf/go/post119409 Hi Peter, Thank you again for all the comments and thoughts. You are right, to send formatted messages, use slogf(). I am sending formatted ascii txt message in my case. my code is: sprintf(debugMsg, "%.3f, %.3f", distance, time); slogf(_SLOG_SETCODE(_SLOGC_TEST, 0), _SLOG_DEBUG1, "<%s:%d> compute :%s", LOG_IDENT(id), __LINE__, debugMsg); As you can see, this is formatted readable ASCII message. slogf is correct API to use. I am sending exactly same message repeat all over again. I saw the garbage messages after the program ran for 10 mins. the logging rate is in 200Hz. I am thinking it might related to the heap memory. Because I ran slogger with 'slogger -s 256k -l /dev/shmem/log -f 7', -s 256k specify in-memory buffer size used which is allocated on heap. If I increase to -s 15000k, I do not see the garbage at all. Thanks. > Hi Chris, > the only reason I can think of is, when your application is writing binary > data into the slogf(). > The API for slog maintains a flag, telling the server (slogger) that the data > is readably text or just binary data. > So when your Apps are writing binary data using slogf(), this garbage will be > in the servers text buffers. > > In general, when sending binary (raw) data, you should use the slogb() API, > when sending just readable text, use slogf(). A third API to send just > integers as an array which later can be translated when the message is read > and interpreted. > > Again, I think in your case, one of the formatted message contains no zero > termination or garbage. I can't imagine, the slogger damages the messages on > the server side. > > Do you have the source of the app, the garbage comes from? Thu, 10 Jan 2019 15:51:55 GMT http://community.qnx.com/sf/go/post119409 Chris Liang(deleted) 2019-01-10T15:51:55Z post119408: Re: DIM2 (MediaLB), i.MX6, clocks, porting Linux function http://community.qnx.com/sf/go/post119408 Hi Albrecht, I appreciate your quick respond. Could you please share the code that just activates the clocks mlb150_clk and pll6 on the i.MX6Q? Thanks, Andrey Thu, 10 Jan 2019 15:35:15 GMT http://community.qnx.com/sf/go/post119408 Andrey Shvetsov 2019-01-10T15:35:15Z post119407: Re: DIM2 (MediaLB), i.MX6, clocks, porting Linux function http://community.qnx.com/sf/go/post119407 Hi Andrey, regarding the mx6x.h header file, I think that this is continuous work: As soon as a new driver or component is added that accesses some registers not yet defined, it will be added and part of the next BSP release. What we do in our own i.MX6 BSP is to hold and maintain a private version of mx6x.h where we can add definitions as needed. We keep our section at the very bottom of the file so that a merge with a newer version from QNX is still possible. Regards, Albrecht Thu, 10 Jan 2019 15:20:25 GMT http://community.qnx.com/sf/go/post119407 Albrecht Uhlmann 2019-01-10T15:20:25Z post119406: DIM2 (MediaLB), i.MX6, clocks, porting Linux function http://community.qnx.com/sf/go/post119406 I'm porting the Linux DIM2 (IP for the MediaLB) driver to the QNX. The BSP is BSP_freescale_imx6x-sabreARD_br-660_be-660_SVN737103_JBN5.zip The hardware is the i.MX6Q SABRE for Automotive Infotainment. I can access the DIM2 IP using its register wall and it responses according to the DIM2 manuals. What makes me unsure, if I look into the BSP, is missing functionality around the PLL6_MLB in the QNX BSP. For example the definition of MX6X_ANATOP_PLL6_MLB in mx6.h has no usage at all. See how it is done for the MX6X_ANATOP_PLL8_ENET. I'm looking for the ideas how to initialize the MediaLB clocks in the QNX like it is done in the Linux function fsl_mx6_enable() from the link https://elixir.bootlin.com/linux/v4.20/source/drivers/staging/most/dim2/dim2.c#L935 I also want to know what could be the equivalent to the Linux patch https://github.com/microchip-ais/meta-mchp-most-fsl/blob/master/recipes-kernel/linux/linux-imx-3.14.28/0001-add-medialb-clk.patch that describes the clocks for the MediaLB. Thanks, Andrey. Thu, 10 Jan 2019 14:54:11 GMT http://community.qnx.com/sf/go/post119406 Andrey Shvetsov 2019-01-10T14:54:11Z post119405: Re: slogger writes non-sense messages to the log file http://community.qnx.com/sf/go/post119405 Hi Chris, the only reason I can think of is, when your application is writing binary data into the slogf(). The API for slog maintains a flag, telling the server (slogger) that the data is readably text or just binary data. So when your Apps are writing binary data using slogf(), this garbage will be in the servers text buffers. In general, when sending binary (raw) data, you should use the slogb() API, when sending just readable text, use slogf(). A third API to send just integers as an array which later can be translated when the message is read and interpreted. Again, I think in your case, one of the formatted message contains no zero termination or garbage. I can't imagine, the slogger damages the messages on the server side. Do you have the source of the app, the garbage comes from? Thu, 10 Jan 2019 08:55:01 GMT http://community.qnx.com/sf/go/post119405 Peter Weber 2019-01-10T08:55:01Z post119404: Re: slogger writes non-sense messages to the log file http://community.qnx.com/sf/go/post119404 Peter, Thanks for replying.. I am using the slogf API to log the data. You recommend to use slogb? slogf is for formatted message. I do format the message. Wed, 09 Jan 2019 17:07:21 GMT http://community.qnx.com/sf/go/post119404 Chris Liang(deleted) 2019-01-09T17:07:21Z post119403: Re: slogger writes non-sense messages to the log file http://community.qnx.com/sf/go/post119403 seems an app is writing binary data using the wrong API. e.g. slogf() instead of slogb() ? Wed, 09 Jan 2019 16:54:02 GMT http://community.qnx.com/sf/go/post119403 Peter Weber 2019-01-09T16:54:02Z post119402: Re: slogger writes non-sense messages to the log file http://community.qnx.com/sf/go/post119402 Yes, I used 'sloginfo -t -w' which print messages once they arrived. the default log file is /dev/slog I also saved to /var/log/message as 'slogger -s 2048k -l /var/logs/message -f 5' -l specify the saved raw log file. then, 'sloginfo -t /var/log/message' to print out the saved log message. They all contains some garbage logs. > and have you tried using sloginfo to read the log file as suggested in the > docs? > http://www.qnx.com/developers/docs/6.6.0.update/#com.qnx.doc.neutrino. > utilities/topic/s/sloginfo.html Wed, 09 Jan 2019 16:35:26 GMT http://community.qnx.com/sf/go/post119402 Chris Liang(deleted) 2019-01-09T16:35:26Z post119401: Re: slogger writes non-sense messages to the log file http://community.qnx.com/sf/go/post119401 Sorry, it was a typo. It is only one '-l' slogger -s 2048k -l /var/logs/message -f 5 > what does the -l -l ...stands for? Wed, 09 Jan 2019 16:23:58 GMT http://community.qnx.com/sf/go/post119401 Chris Liang(deleted) 2019-01-09T16:23:58Z post119400: Re: slogger writes non-sense messages to the log file http://community.qnx.com/sf/go/post119400 and have you tried using sloginfo to read the log file as suggested in the docs? http://www.qnx.com/developers/docs/6.6.0.update/#com.qnx.doc.neutrino.utilities/topic/s/sloginfo.html Wed, 09 Jan 2019 16:22:28 GMT http://community.qnx.com/sf/go/post119400 Peter Weber 2019-01-09T16:22:28Z post119399: Re: slogger writes non-sense messages to the log file http://community.qnx.com/sf/go/post119399 what does the -l -l ...stands for? Wed, 09 Jan 2019 16:15:34 GMT http://community.qnx.com/sf/go/post119399 Peter Weber 2019-01-09T16:15:34Z post119398: Re: slogger writes non-sense messages to the log file http://community.qnx.com/sf/go/post119398 Please, any one knows? > Hi, > I am using slogger to write debugging message to a /var/log/message. > > execute the command 'slogger -s 2048k -l -l /var/logs/message -f 5' at the > early system up stage. > > However, when I looked at the logged messages from sloginfo -t -w. > > it contains very non-sense messages which human cannot understand. > ie. > > GOOD LOGS: > Nov 30 23:07:24.501 5 10000 0 <compute.cpp:285> static lever arm v, 0.008, -0.133, 0.070 > , 0.000, 0.000, 0.000, 0.008, -0.133, 0.070 > > BAD LOGS: the month is changed to Aug for some reason.... > Aug 23 15:49:06.663 3 93795 1862 1635149164 1701064291 1886403122 > 859061792 538976288 538979360 1936619103 1915642992 1529961768 825112113 > 875113504 1936619103 1915647579 828188720 774910008 690757740 1634956383 > 1985687901 674246192 808986924 543454258 674246192 808659244 541339944 > 824788018 674244896 1936619103 1915647016 909192752 926099756 544435830 > 1600416115 1949201448 909192752 926099756 544497513 1953900592 774910005 > 807993392 2826093 10000 1543619244 1013213555 1952542307 1700754546 1635149164 > 1701064291 1886403122 859061792 538976288 538979360 1936619103 1915642992 > 1530027304 758328886 909453612 544435830 1601318518 1530027304 758132273 > 858990892 > > I thought it might be the sloginfo utility issue. Then, I wrote a stand along > utility to decode slogger message by open /dev/slog > > Now the bad logs is not numbers but it is still not making any senses > > GOOD LOGS: > Jan 06 20:43:13.528 5 10000 0: <compute.cpp:231> -77.586, 5.348, 45.341, -0.005, -0.000, 0. > 003, 162802.148 > > BAD LOGS: > Sep 18 07:27:48.757 7 290669 1782: a.valid to false, (162806.585, 74597.004) > , head from (2) advanced to (0) > Feb 01 05:31:12.838 7 536617 514: > Jan 01 02:46:40.758 5 133901 1: \2hf<compute.cpp:386> numOfMsgFromIin = 162759 > Sep 18 07:27:48.757 7 290669 1782: a.valid to false, (162807.585, 74598.004) > , head from (0) advanced to (1) > > I think it might be related to slogger utility. > > Any one knows the issues? > > Thanks in advance... Wed, 09 Jan 2019 16:06:23 GMT http://community.qnx.com/sf/go/post119398 Chris Liang(deleted) 2019-01-09T16:06:23Z post119394: Re: slogger writes non-sense messages to the log file http://community.qnx.com/sf/go/post119394 Did I post in right place? If not, please guide me where I should post it Many thanks Tue, 08 Jan 2019 15:08:41 GMT http://community.qnx.com/sf/go/post119394 Chris Liang(deleted) 2019-01-08T15:08:41Z post119393: Re: Unable to install SDK for apps and media 1.1 http://community.qnx.com/sf/go/post119393 > It's a known issue when installing AnM1.1 on Windows 7 64-bit system. > There are 2 possible workarounds: > > 1. open the console window, set up 660 environment by running qnx660-env.bat, > then launch AnM 1.1 installer from that terminal window > > If that does not solve the issue, you can try this workaround: > > 2. copy .com.zerog.registry.xml file from C:\Program Files (x86)\Zero G > Registry\ to: C:\Program Files\Zero G Registry\. Then launch AnM1.1 installer > . > > Hope that helps. > > Natalia > Hello All, I am also facing the same issue, unable to install the "App & Media Package (qnx-sdk-for-apps-and-media-1.1-201503251644 .exe)" while I already install the " SDP 6.6 (qnx-sdp-6.6-201402230339.exe)" I tried the workaround for windows 7, but I could not install it. My system / environment details are like Below: OS : Win 10 64 Bit SDP : 6.6 Version (Activated) App & Media : Ver 1.1 -- Regards Tue, 08 Jan 2019 09:06:56 GMT http://community.qnx.com/sf/go/post119393 KENTA OGATA 2019-01-08T09:06:56Z post119389: slogger writes non-sense messages to the log file http://community.qnx.com/sf/go/post119389 Hi, I am using slogger to write debugging message to a /var/log/message. execute the command 'slogger -s 2048k -l -l /var/logs/message -f 5' at the early system up stage. However, when I looked at the logged messages from sloginfo -t -w. it contains very non-sense messages which human cannot understand. ie. GOOD LOGS: Nov 30 23:07:24.501 5 10000 0 <compute.cpp:285> static lever arm v, 0.008, -0.133, 0.070, 0.000, 0.000, 0.000, 0.008, -0.133, 0.070 BAD LOGS: the month is changed to Aug for some reason.... Aug 23 15:49:06.663 3 93795 1862 1635149164 1701064291 1886403122 859061792 538976288 538979360 1936619103 1915642992 1529961768 825112113 875113504 1936619103 1915647579 828188720 774910008 690757740 1634956383 1985687901 674246192 808986924 543454258 674246192 808659244 541339944 824788018 674244896 1936619103 1915647016 909192752 926099756 544435830 1600416115 1949201448 909192752 926099756 544497513 1953900592 774910005 807993392 2826093 10000 1543619244 1013213555 1952542307 1700754546 1635149164 1701064291 1886403122 859061792 538976288 538979360 1936619103 1915642992 1530027304 758328886 909453612 544435830 1601318518 1530027304 758132273 858990892 I thought it might be the sloginfo utility issue. Then, I wrote a stand along utility to decode slogger message by open /dev/slog Now the bad logs is not numbers but it is still not making any senses GOOD LOGS: Jan 06 20:43:13.528 5 10000 0: <compute.cpp:231> -77.586, 5.348, 45.341, -0.005, -0.000, 0.003, 162802.148 BAD LOGS: Sep 18 07:27:48.757 7 290669 1782: a.valid to false, (162806.585, 74597.004), head from (2) advanced to (0) Feb 01 05:31:12.838 7 536617 514: Jan 01 02:46:40.758 5 133901 1: \2hf<compute.cpp:386> numOfMsgFromIin = 162759 Sep 18 07:27:48.757 7 290669 1782: a.valid to false, (162807.585, 74598.004), head from (0) advanced to (1) I think it might be related to slogger utility. Any one knows the issues? Thanks in advance... Mon, 07 Jan 2019 15:55:16 GMT http://community.qnx.com/sf/go/post119389 Chris Liang(deleted) 2019-01-07T15:55:16Z post119388: Re: porting bcm43455 wifi driver(bcmdhd) to imx6 + qnx6.6.0 http://community.qnx.com/sf/go/post119388 The QNX network stack offers a shim layer to port NetBSD network drivers over to QNX quite easily. If that works for WiFi drivers I cannot tell. Using a Linux/Android source base as a starting point will definitely cause more porting effort. The online help also contains a Network DDK with a sample Ethernet driver. For the additional things for WiFi (e.g. interface to WPA-Supplicant) I do not know about samples. Which interface of the chip are you using? PCIe oder SDIO or UART? In case of SDIO you would also need to look up the supplied driver code for the devb-sdmmc driver and extract the SDIO part from it. Regards, Albrecht Mon, 07 Jan 2019 11:46:02 GMT http://community.qnx.com/sf/go/post119388 Albrecht Uhlmann 2019-01-07T11:46:02Z post119378: porting bcm43455 wifi driver(bcmdhd) to imx6 + qnx6.6.0 http://community.qnx.com/sf/go/post119378 Hi, I trying to bring wifi module bcm43455 (similar to bcm4335/bcm4339) on qnx6.6.0 platform. All i have is bcmdhd driver for linux/android, how can i port it to qnx system ? Thanks! Thu, 03 Jan 2019 01:41:28 GMT http://community.qnx.com/sf/go/post119378 wang tony(deleted) 2019-01-03T01:41:28Z post119369: Re: QNX 6.5.0 - TFTP http://community.qnx.com/sf/go/post119369 Hi Hugo, in a standard installation, /usr/sbin/tftpd is present by default. You need to enable the service in /etc/inetd.conf by commenting in the line "tftpd", and then (re)start "inetd". /etc/bootptab and /etc/services may need to be adjusted, too. Details can be found in utilities reference. -Al Wed, 19 Dec 2018 11:25:10 GMT http://community.qnx.com/sf/go/post119369 Albrecht Uhlmann 2018-12-19T11:25:10Z post119368: QNX 6.5.0 - TFTP http://community.qnx.com/sf/go/post119368 Hello, I am new to the QNX world. I currently have a disk image (.iso) of the QNX 6.5.0 system. Unfortunately the TFTP service is not installed on this system. Do you know if it is possible to install this service via a package? If so, where can I download this package? Best regards, Hugo Wed, 19 Dec 2018 10:23:37 GMT http://community.qnx.com/sf/go/post119368 Hugo TOUZE(deleted) 2018-12-19T10:23:37Z post119353: Re: syslog() function cannot log the message over 200 bytes??? http://community.qnx.com/sf/go/post119353 I see. Is syslog-ng available for qnx 6.4 or higher? Thank you again. > Our source for syslog() is from NetBSD, with some customization. I don't think > we make the source available. > > I don't know about the limits on logging frequency, so let's hope someone else > chimes in. Wed, 12 Dec 2018 16:14:24 GMT http://community.qnx.com/sf/go/post119353 Chris Liang(deleted) 2018-12-12T16:14:24Z post119352: Re: syslog() function cannot log the message over 200 bytes??? http://community.qnx.com/sf/go/post119352 Our source for syslog() is from NetBSD, with some customization. I don't think we make the source available. I don't know about the limits on logging frequency, so let's hope someone else chimes in. Wed, 12 Dec 2018 15:41:45 GMT http://community.qnx.com/sf/go/post119352 Steve Reid 2018-12-12T15:41:45Z post119351: Re: syslog() function cannot log the message over 200 bytes??? http://community.qnx.com/sf/go/post119351 Hi Steve, Thanks for replying. It is possible to change the size of the length. Where I can find the source code. BTW, do you have an idea how fast the syslogd can handle writing logs. right now, I am writing debugging message in 200Hz rate. it seems it is always stop writing for 30 seconds and then start writing again. Is there a limitation on the logging frequency? Thanks Wed, 12 Dec 2018 15:28:16 GMT http://community.qnx.com/sf/go/post119351 Chris Liang(deleted) 2018-12-12T15:28:16Z post119350: Re: syslog() function cannot log the message over 200 bytes??? http://community.qnx.com/sf/go/post119350 I've looked at the source code, and it seems that 200 bytes is a hard-coded limit. > Hi all, > > I am using syslog() function to log a debugging/info/warning message in /var/ > log/message. > > However, I realize that it chop the message if it is over 200 bytes. Is there > a length of the message I can set? > > Thanks in advance.. Wed, 12 Dec 2018 14:51:09 GMT http://community.qnx.com/sf/go/post119350 Steve Reid 2018-12-12T14:51:09Z post119349: How can I get third-party open source software "ceres" http://community.qnx.com/sf/go/post119349 I need Ceres for Matrixs computation, but my qnx-adas-2.0 do not have this lib and include. I also travelled all software in qnx software center, and get no result. Really appreciate your help, Thank you! Wed, 12 Dec 2018 04:18:26 GMT http://community.qnx.com/sf/go/post119349 Li Liu(deleted) 2018-12-12T04:18:26Z post119348: syslog() function cannot log the message over 200 bytes??? http://community.qnx.com/sf/go/post119348 Hi all, I am using syslog() function to log a debugging/info/warning message in /var/log/message. However, I realize that it chop the message if it is over 200 bytes. Is there a length of the message I can set? Thanks in advance.. Tue, 11 Dec 2018 20:48:12 GMT http://community.qnx.com/sf/go/post119348 Chris Liang(deleted) 2018-12-11T20:48:12Z post119315: Re: Error in Final Launch Sequence (Unknown Response Error Attempting to Exec Shared Lib) http://community.qnx.com/sf/go/post119315 Hey anyone sort out this issue . i have been looking for solution from past one week.. I have installed qnx sdp on my ubuntu and qnx neutrino rtos on vmware . Tue, 04 Dec 2018 07:33:53 GMT http://community.qnx.com/sf/go/post119315 Amit Sharma 2018-12-04T07:33:53Z post119312: GPIO interrupts on Intel Atom E3800 (Baytrail) http://community.qnx.com/sf/go/post119312 Hello! I am trying to use level triggered interrupts on my Intel Atom E3800 based board. A GPIO pin, wich I want to use is GPIO_S5[13]. So This GPIO is located in Intel Legacy Block (iLB) and registers, wich correspond to this GPIO, are mapped to memory (not to legacy space). To configure this GPIO I made the follows: ... pci_attach( 0 ); //Find the PCI/ISA bus (intel legacy block) pci_find_class(0x060100, 0, &busnum, &devfuncnum); //Get IOBASE register, which contains base address for memory mapped GPIOs registers (GPSSUS) accoding to datasheet pci_read_config32(busnum, devfuncnum, 0x4C, 1, &ioBaseRegister); uint32_t ioControllerBaseAddr = ioBaseRegister & 0xFFFFC000; //Get pad configuration register for GPIO_S5[13] uint64_t s5_13_pad_config = (ioControllerBaseAddr + 0x2000 + 0x140); uint32_t * ptr = (uint32_t*) mmap_device_memory( 0, 4, PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, s5_13_pad_config ); // (1<<26) - Set Gb Tne to 1 ( Detect falling edge. For level interrupt mode it will enable active low level irq) // (1<<27) - Set Direct Irq En (direct_irq_en) // (1<<24) - Set Gd Level (gd_level): When this bit is set a level irq will be choose and not edge irq *ptr |= (1<<26)|(1<<27)|(1<<24); //Get pad value register for GPIO_S5[13] uint64_t s5_13_pad_val_unmaped = (ioControllerBaseAddr + 0x2000 + 0x148); ptr = (uint32_t*) mmap_device_memory( 0, 4, PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, s5_13_pad_val_unmaped ); //Enable input, disable output *ptr |= (1<<1); *ptr &= ~(1<<2); //Connect gpios5[13] to IRQ0 (APIC 67) uint64_t direct_irq0 = (ioControllerBaseAddr + 0x2000 + 0x980); ptr = (uint32_t*) mmap_device_memory( 0, 4, PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, direct_irq0 ); *ptr &= ~(0x7F); *ptr |= 13; pci_detach( phdl ) ... In my startup-apic -vv output a see: ... [13] vec: 67, cpumask:00000001, ID: 2, busid:0, busintr:13, dest intin:13, type:0, flags:00000005 ... So when I am waiting for interrupt I do the follows: struct sigevent int_event; static int int_counter; const struct sigevent *handler (void *area, int id) { int_counter++; return (&int_event); } void * interruptWaitThread( void* arg ) { ThreadCtl( _NTO_TCTL_IO, 0 ); struct sigevent event; int_event.sigev_notify = SIGEV_INTR; InterruptAttach( 13, &handler, NULL, 0, _NTO_INTR_FLAGS_TRK_MSK); while (1) { InterruptWait (0, NULL); printf (" Got interrupt %lu ( 0x%lX ) #%4ld\n", 13, 13, int_counter); } return( 0 ); } But the interruptWaitThread have never unblocked from InterruptWait(). What am doing wrong? Regards, Vasily. Wed, 28 Nov 2018 10:14:29 GMT http://community.qnx.com/sf/go/post119312 Vasilij Yanikeev(deleted) 2018-11-28T10:14:29Z post119311: GPIO interrupts on Intel Atom E3800 (Baytrail) http://community.qnx.com/sf/go/post119311 Hello! I am trying to use level triggered interrupts on my Intel Atom E3800 based board. A GPIO pin, wich I want to use is GPIO_S5[13]. So This GPIO is located in Intel Legacy Block (iLB) and registers, wich correspond to this GPIO, are mapped to memory (not to legacy space). To configure this GPIO I made the follows: ... pci_attach( 0 ); //Find the PCI/ISA bus (intel legacy block) pci_find_class(0x060100, 0, &busnum, &devfuncnum); //Get IOBASE register, which contains base address for memory mapped GPIOs registers (GPSSUS) accoding to datasheet pci_read_config32(busnum, devfuncnum, 0x4C, 1, &ioBaseRegister); uint32_t ioControllerBaseAddr = ioBaseRegister & 0xFFFFC000; //Get pad configuration register for GPIO_S5[13] uint64_t s5_13_pad_config = (ioControllerBaseAddr + 0x2000 + 0x140); uint32_t * ptr = (uint32_t*) mmap_device_memory( 0, 4, PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, s5_13_pad_config ); // (1<<26) - Set Gb Tne to 1 ( Detect falling edge. For level interrupt mode it will enable active low level irq) // (1<<27) - Set Direct Irq En (direct_irq_en) // (1<<24) - Set Gd Level (gd_level): When this bit is set a level irq will be choose and not edge irq *ptr |= (1<<26)|(1<<27)|(1<<24); //Get pad value register for GPIO_S5[13] uint64_t s5_13_pad_val_unmaped = (ioControllerBaseAddr + 0x2000 + 0x148); ptr = (uint32_t*) mmap_device_memory( 0, 4, PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, s5_13_pad_val_unmaped ); //Enable input, disable output *ptr |= (1<<1); *ptr &= ~(1<<2); //Connect gpios5[13] to IRQ0 (APIC 67) uint64_t direct_irq0 = (ioControllerBaseAddr + 0x2000 + 0x980); ptr = (uint32_t*) mmap_device_memory( 0, 4, PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, direct_irq0 ); *ptr &= ~(0x7F); *ptr |= 13; pci_detach( phdl ) ... In my startup-apic -vv output a see: ... [13] vec: 67, cpumask:00000001, ID: 2, busid:0, busintr:13, dest intin:13, type:0, flags:00000005 ... So when I am waiting for interrupt I do the follows: struct sigevent int_event; static int int_counter; const struct sigevent *handler (void *area, int id) { int_counter++; return (&int_event); } void * interruptWaitThread( void* arg ) { ThreadCtl( _NTO_TCTL_IO, 0 ); struct sigevent event; int_event.sigev_notify = SIGEV_INTR; InterruptAttach( 13, &handler, NULL, 0, _NTO_INTR_FLAGS_TRK_MSK); while (1) { InterruptWait (0, NULL); printf (" Got interrupt %lu ( 0x%lX ) #%4ld\n", 13, 13, int_counter); } return( 0 ); } But the interruptWaitThread have never unblocked from InterruptWait(). What am doing wrong? Regards, Vasily. Wed, 28 Nov 2018 10:14:27 GMT http://community.qnx.com/sf/go/post119311 Vasilij Yanikeev(deleted) 2018-11-28T10:14:27Z post119310: GPIO interrupts on Intel Atom E3800 (Baytrail) http://community.qnx.com/sf/go/post119310 Hello! I am trying to use level triggered interrupts on my Intel Atom E3800 based board. A GPIO pin, wich I want to use is GPIO_S5[13]. So This GPIO is located in Intel Legacy Block (iLB) and registers, wich correspond to this GPIO, are mapped to memory (not to legacy space). To configure this GPIO I made the follows: ... pci_attach( 0 ); //Find the PCI/ISA bus (intel legacy block) pci_find_class(0x060100, 0, &busnum, &devfuncnum); //Get IOBASE register, which contains base address for memory mapped GPIOs registers (GPSSUS) accoding to datasheet pci_read_config32(busnum, devfuncnum, 0x4C, 1, &ioBaseRegister); uint32_t ioControllerBaseAddr = ioBaseRegister & 0xFFFFC000; //Get pad configuration register for GPIO_S5[13] uint64_t s5_13_pad_config = (ioControllerBaseAddr + 0x2000 + 0x140); uint32_t * ptr = (uint32_t*) mmap_device_memory( 0, 4, PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, s5_13_pad_config ); // (1<<26) - Set Gb Tne to 1 ( Detect falling edge. For level interrupt mode it will enable active low level irq) // (1<<27) - Set Direct Irq En (direct_irq_en) // (1<<24) - Set Gd Level (gd_level): When this bit is set a level irq will be choose and not edge irq *ptr |= (1<<26)|(1<<27)|(1<<24); //Get pad value register for GPIO_S5[13] uint64_t s5_13_pad_val_unmaped = (ioControllerBaseAddr + 0x2000 + 0x148); ptr = (uint32_t*) mmap_device_memory( 0, 4, PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, s5_13_pad_val_unmaped ); //Enable input, disable output *ptr |= (1<<1); *ptr &= ~(1<<2); //Connect gpios5[13] to IRQ0 (APIC 67) uint64_t direct_irq0 = (ioControllerBaseAddr + 0x2000 + 0x980); ptr = (uint32_t*) mmap_device_memory( 0, 4, PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, direct_irq0 ); *ptr &= ~(0x7F); *ptr |= 13; pci_detach( phdl ) ... In my startup-apic -vv output a see: ... [13] vec: 67, cpumask:00000001, ID: 2, busid:0, busintr:13, dest intin:13, type:0, flags:00000005 ... So when I am waiting for interrupt I do the follows: struct sigevent int_event; static int int_counter; const struct sigevent *handler (void *area, int id) { int_counter++; return (&int_event); } void * interruptWaitThread( void* arg ) { ThreadCtl( _NTO_TCTL_IO, 0 ); struct sigevent event; int_event.sigev_notify = SIGEV_INTR; InterruptAttach( 13, &handler, NULL, 0, _NTO_INTR_FLAGS_TRK_MSK); while (1) { InterruptWait (0, NULL); printf (" Got interrupt %lu ( 0x%lX ) #%4ld\n", 13, 13, int_counter); } return( 0 ); } But the interruptWaitThread have never unblocked from InterruptWait(). What am doing wrong? Regards, Vasily. Wed, 28 Nov 2018 10:14:25 GMT http://community.qnx.com/sf/go/post119310 Vasilij Yanikeev(deleted) 2018-11-28T10:14:25Z post119148: is there USB 3.0 driver for QNX 6? http://community.qnx.com/sf/go/post119148 Hi, Does QNX 6 support usb 3.0 stack ? And if it does, where can I get driver files ? Mon, 24 Sep 2018 09:39:48 GMT http://community.qnx.com/sf/go/post119148 Cong Pham 2018-09-24T09:39:48Z post119109: QNX 6.5 OpenSSL Build Error http://community.qnx.com/sf/go/post119109 Hi, Am trying to build the openssl source for QNX 6.5/6.6 OS. I have tried to build after the instructions given in internet. 1. QNX 6.6 build environment variable is set. 2. Executed below command. sh-3.1$ ./Configure QNX6 shared --prefix=./qnx660/release --openssldir=./qnx660/release 3. make depend exectuted. Got compilation error. ../../util/domd ../.. -MD gcc -- -fPIC -DOPENSSL_PIC -DOPENSSL_THREADS -DDSO_DLFCN -DHAVE_DLFCN_H -I.. -I../.. -I../modes -I../asn1 -I../evp -I../../include -DOPENSSL_NO_DEPRECATED -DOPENSSL_NO_EC_NISTP_64_GCC_128 -DOPENSSL_NO_GMP -DOPENSSL_NO_JPAKE -DOPENSSL_NO_LIBUNBOUND -DOPENSSL_NO_MD2 -DOPENSSL_NO_RC5 -DOPENSSL_NO_RFC3779 -DOPENSSL_NO_SCTP -DOPENSSL_NO_SSL_TRACE -DOPENSSL_NO_SSL2 -DOPENSSL_NO_STORE -DOPENSSL_NO_UNIT_TEST -DOPENSSL_NO_WEAK_SSL_CIPHERS -- dso_dl.c dso_dlfcn.c dso_err.c dso_lib.c dso_null.c dso_openssl.c dso_win32.c dso_vms.c dso_beos.c dso_dlfcn.c:84:12: fatal error: dlfcn.h: No such file or directory # include <dlfcn.h> Also when I executed make all from command line. Seems like nothing has been built. sh-3.1$ make sh-3.1$ make all sh-3.1$ Could anyone help me out to build openssl for qnx 6.5 os. Thanks, Murugaiyan Sun, 16 Sep 2018 16:02:13 GMT http://community.qnx.com/sf/go/post119109 Murugaiyan Perumal(deleted) 2018-09-16T16:02:13Z post119080: Re: cp command cause root directory is gone (/ point is unmounted) http://community.qnx.com/sf/go/post119080 Hi Albrecht, It is AMCC PPC440EP. I also observed that if I am using cp -B to copy files, then there is no failure. -B is grabbing smaller size buffer 2k, instead of 16k. Thanks Fri, 07 Sep 2018 17:33:40 GMT http://community.qnx.com/sf/go/post119080 Chris Liang(deleted) 2018-09-07T17:33:40Z post119079: Re: cp command cause root directory is gone (/ point is unmounted) http://community.qnx.com/sf/go/post119079 I guess you have either a hardware issue, or some driver is not operating correctly. I mean under 6.4.1 (2009) the SD/MMC support was by far not as mature as today. Which board/SoC are you using? -Albrecht Fri, 07 Sep 2018 17:10:32 GMT http://community.qnx.com/sf/go/post119079 Albrecht Uhlmann 2018-09-07T17:10:32Z post119076: cp command cause root directory is gone (/ point is unmounted) http://community.qnx.com/sf/go/post119076 Hi, I posted this in QNX4 community, they ask me to repeat in QNX 6. I encounter a problem that using cp command to copy a large file (~1GB size) from USB to SD card or vise versa. during copying, error out and root directory is gone (/ mount point is umounted). The following is verbose from cp: cp: LSTAT(/dos/d/,buf) cp: LSTAT(/log/file.121,buf) cp: copy_guy(/log/file.121,/dos/d///file.121) cp: OPEN(/log/file.121,0,0) cp: OPEN(/dos/d///file.121,2401,100640) cp: LSTAT(/dos/d///file.121,buf) cp: Copying /log/file.121 to /dos/d/file.121 cp: write (/dos/d///file.121): Input/output error cp: ERRS++ (1) write() 88.74% (755840/851673 kbytes, 2323 kb/s) cp: read (/log/file.121): Bad file descriptor cp: ERRS++ (2) read() cp: past_data_copy errs_in =0, errs = 2 cp: exit_copy_guy (rc=0) cp: CLOSE(fildes) cp: close (/log/file.121): Bad file descriptor cp: ERRS++ (3) _close() cp: CLOSE(fildes) cp: close (/dos/d///file.121): Bad file descriptor cp: ERRS++ (4) _close() QNX version: 6.4.1 both SD card and usb key is running on USB bus. I can see during copy devb-umass and io-usb processes are taking CPU usages what could be the root cause of this? Thanks in advance. Thu, 06 Sep 2018 21:02:45 GMT http://community.qnx.com/sf/go/post119076 Chris Liang(deleted) 2018-09-06T21:02:45Z post119027: How to disable neighbor discovery http://community.qnx.com/sf/go/post119027 I am using QNX Neutrino 6.6.0 on the Freescale i.mx6.I want to establish an ipv6 communication(ping6).As soon as i start ping6(ping6 -I tap0 destination address) command i see neighbor discovery happening,I want to skip neighbor discovery, since i have the layer2(mac)address of destination. Anyone please suggest an idea to disable neighbor discovery in qnx and send icmpv6 echo request using destination layer2(mac)address? Wed, 01 Aug 2018 05:33:20 GMT http://community.qnx.com/sf/go/post119027 sudheesh k t(deleted) 2018-08-01T05:33:20Z post119022: CAN Bus driver for the Beaglebone Black using QNX 7 http://community.qnx.com/sf/go/post119022 Hello everybody. I'm trying to play with CAN bus using the Beaglebone Black and QNX 7. However, I have no idea where can I find the driver for the CAN Bus. Does somebody know if it is available? Thank you ind advance. Regards, C.K. Mon, 30 Jul 2018 17:19:01 GMT http://community.qnx.com/sf/go/post119022 Cristian dos Santos 2018-07-30T17:19:01Z post119020: bsp6.5.0 ,GPIO interrupt of am335x beaglebone black http://community.qnx.com/sf/go/post119020 hello: I am using the bsp I use the gpio3_20 to get interrupt . i have configure the gpio setting of am335x according to linux bsp which is work fine. I add code following in the startup/initpinmux.c out32(conf_mcasp0_axr1,(MODE(7) | RXACTIVE |PULLUDEN | PULLUP_EN));//gpio3_20 out32(AM335X_GPIO3_BASE + GPIO_OE , in32(AM335X_GPIO3_BASE + GPIO_OE) & (1<<20)); out32(AM335X_GPIO3_BASE + GPIO_LEVELDETECT0 , in32(AM335X_GPIO3_BASE + GPIO_LEVELDETECT0) & (1<<20)); out32(AM335X_GPIO3_BASE + GPIO_LEVELDETECT1 , in32(AM335X_GPIO3_BASE + GPIO_LEVELDETECT1) & 0xFFEFFFFF); out32(AM335X_GPIO3_BASE + GPIO_RISINGDETECT , in32(AM335X_GPIO3_BASE + GPIO_RISINGDETECT) & 0xFFEFFFFF); out32(AM335X_GPIO3_BASE + GPIO_FALLINGDETECT , in32(AM335X_GPIO3_BASE + GPIO_FALLINGDETECT ) & 0xFFEFFFFF); I use the gpio_irq 0x374 ,The irq num which is defined in initintinfo.c // GPIO3 interrupt { 0x360, // vector base 32, // number of vectors 62, // cascade vector 0, // CPU vector base 0, // CPU vector stride 0, // flags { 0, 0, &interrupt_id_am335x_gpio}, { INTR_GENFLAG_LOAD_INTRMASK, 0, &interrupt_eoi_am335x_gpio}, &interrupt_mask_am335x_gpio, // mask callout &interrupt_unmask_am335x_gpio, // unmask callout 0, // config callout &am335x_gpio3_base }, But I can not get the interrupt in my ISR,can any one tell me why ? I also find another guy meet the problem. Can anyone also tell me where is the error he make? Best regards https://e2e.ti.com/support/arm/sitara_arm/f/791/t/293435 Mon, 30 Jul 2018 10:34:39 GMT http://community.qnx.com/sf/go/post119020 hu jiaqi 2018-07-30T10:34:39Z post119014: Re: Error in Final Launch Sequence (Unknown Response Error Attempting to Exec Shared Lib) http://community.qnx.com/sf/go/post119014 Did you ever sort out this issue thanks Thu, 26 Jul 2018 09:33:15 GMT http://community.qnx.com/sf/go/post119014 Raymond Burke 2018-07-26T09:33:15Z post119003: Re: QNX6.5 emmc/MMC and pci drivers problems in BSP for x86-generic http://community.qnx.com/sf/go/post119003 I succesfuly launched driver for VID/DID = 0x8086/0x0F16 (simple MMCSD card). Launch command is: devb-mmcsd mmcsd vid=0x8086,did=0x0f16,irq=18 But I unable to launch this driver for emmc (0x8085/0xF50): devb-mmcsd mmcsd vid=0x8086,did=0x0f50,irq=12 No host controller found xpt_configure: mmcsd SIM attach failure What am I doing wrong? Wed, 25 Jul 2018 05:49:47 GMT http://community.qnx.com/sf/go/post119003 Vasilij Yanikeev(deleted) 2018-07-25T05:49:47Z post119002: Re: QNX6.5 emmc/MMC and pci drivers problems in BSP for x86-generic http://community.qnx.com/sf/go/post119002 I succesfuly launched driver for VID/DID = 0x8086/0x0F16 (simple MMCSD card). Launch command is: devb-mmcsd mmcsd vid=0x8086,did=0x0f16,irq=18 But I unable to launch this driver for emmc (0x8085/0xF50): devb-mmcsd mmcsd vid=0x8086,did=0x0f50,irq=12 No host controller found xpt_configure: mmcsd SIM attach failure What am I doing wrong? Wed, 25 Jul 2018 05:49:46 GMT http://community.qnx.com/sf/go/post119002 Vasilij Yanikeev(deleted) 2018-07-25T05:49:46Z post119001: Re: QNX6.5 emmc/MMC and pci drivers problems in BSP for x86-generic http://community.qnx.com/sf/go/post119001 I succesfuly launched driver for VID/DID = 0x8086/0x0F16 (simple MMCSD card). Launch command is: devb-mmcsd mmcsd vid=0x8086,did=0x0f16,irq=18 But I unable to launch this driver for emmc (0x8085/0xF50): devb-mmcsd mmcsd vid=0x8086,did=0x0f50,irq=12 No host controller found xpt_configure: mmcsd SIM attach failure What am I doing wrong? Wed, 25 Jul 2018 05:49:40 GMT http://community.qnx.com/sf/go/post119001 Vasilij Yanikeev(deleted) 2018-07-25T05:49:40Z post118954: Re: QNX 6.5.0 SP1: pci-bios-v2 is not starting whenever a PCI card is plugged in http://community.qnx.com/sf/go/post118954 There is a new PCI server in QNX SDP7, which might solve your problem. On 2018-07-13, 5:23 AM, "Michael Kurt" <community-noreply@qnx.com> wrote: Now, after contacting our QNX sales representative and receiving your offer, I at first need to evaluate other options. That's why one more question: Would an upgrade to a newer QNX version solve the problem? Is that already fixed in newer QNX versions? Thank You - with best regards, Michael. _______________________________________________ General http://community.qnx.com/sf/go/post118953 To cancel your subscription to this discussion, please e-mail general-community-unsubscribe@community.qnx.com Fri, 13 Jul 2018 11:41:49 GMT http://community.qnx.com/sf/go/post118954 Hugh Brown 2018-07-13T11:41:49Z post118953: Re: QNX 6.5.0 SP1: pci-bios-v2 is not starting whenever a PCI card is plugged in http://community.qnx.com/sf/go/post118953 Now, after contacting our QNX sales representative and receiving your offer, I at first need to evaluate other options. That's why one more question: Would an upgrade to a newer QNX version solve the problem? Is that already fixed in newer QNX versions? Thank You - with best regards, Michael. Fri, 13 Jul 2018 09:41:13 GMT http://community.qnx.com/sf/go/post118953 Michael Kurt 2018-07-13T09:41:13Z post118948: Re: QNX 6.5.0 SP1: pci-bios-v2 is not starting whenever a PCI card is plugged in http://community.qnx.com/sf/go/post118948 OK, I will do that. Thank You, Michael. > This is going to require major development work on the 6.5.0 PCI server, so > please will you contact your QNX sales representative to arrange for this. > > Thanks, Hugh. Thu, 12 Jul 2018 05:53:06 GMT http://community.qnx.com/sf/go/post118948 Michael Kurt 2018-07-12T05:53:06Z post118943: Re: QNX 6.5.0 SP1: pci-bios-v2 is not starting whenever a PCI card is plugged in http://community.qnx.com/sf/go/post118943 This is going to require major development work on the 6.5.0 PCI server, so please will you contact your QNX sales representative to arrange for this. Thanks, Hugh. On 2018-07-11, 3:46 AM, "Michael Kurt" <community-noreply@qnx.com> wrote: I modified the build file as suggested and, additionally, increased the RAM disk size to 1GB in order to ensure enough space for the dumpfiles under /tmp. Unfortunately, there are no dumpfiles produced, at all (also, no messages from 'dumper -v -d/tmp'). Nevertheless, I attached all other information here, hoping it shows something useful. With best regards, Michael. > Please can you modify your build file and add "dumper -d/tmp" before "seedres" > in your build file. Reboot the system with a PCI adapter installed and post > the resulting .core file from the /tmp directory, together with the pci-bios- > v2 that you are using and the libc.so.3. Also please post the output from " > sloginfo". > Also, please boot your system without a PCI adapter installed and post the > resulting output from sloginfo, together with the "pci -vvv" output. > > Thanks, Hugh. _______________________________________________ General http://community.qnx.com/sf/go/post118934 To cancel your subscription to this discussion, please e-mail general-community-unsubscribe@community.qnx.com Wed, 11 Jul 2018 14:22:38 GMT http://community.qnx.com/sf/go/post118943 Hugh Brown 2018-07-11T14:22:38Z post118942: Re: QNX6.5 emmc/MMC and pci drivers problems in BSP for x86-generic http://community.qnx.com/sf/go/post118942 Yes, you are right! Thank you! I rebuild coreboot with seabios and pci driver on qnx core succesfuly launched! # sloginfo Time Sev Major Minor Args Apr 15 18:29:13 3 17 0 pci_server: enabling MSI for video Apr 15 18:29:13 6 17 0 free_mem_start = 0x3ae00000, free_mem_end = 0xfec00000 Apr 15 18:29:13 6 17 0 intrinfo size = 320 entry size = 64 count = 5 Apr 15 18:29:13 6 17 0 base = 0x80010000 num = 6 cascade = 0x7fffffff intr 48 Apr 15 18:29:13 6 17 0 base = 0x8001ffff num = 1 cascade = 0x7fffffff intr 47 Apr 15 18:29:13 6 17 0 base = 0x80000000 num = 3 cascade = 0x7fffffff intr 2 Apr 15 18:29:13 6 17 0 base = 0x00000000 num = 87 cascade = 0x7fffffff intr 54 Apr 15 18:29:13 6 17 0 base = 0x00000100 num = 114 cascade = 0x7fffffff intr 141 Apr 15 18:29:13 5 17 0 Get routing failed 81 Apr 15 18:29:13 6 17 0 find_host_bridge - bridge_count 8 - num_pci_bridges 8 Wed, 11 Jul 2018 13:55:41 GMT http://community.qnx.com/sf/go/post118942 Vasilij Yanikeev(deleted) 2018-07-11T13:55:41Z post118941: Re: QNX 6.5.0 SP1: pci-bios-v2 is not starting whenever a PCI card is plugged in http://community.qnx.com/sf/go/post118941 I'll have to take a look at this as soon as I get a chance. On 2018-07-11, 3:46 AM, "Michael Kurt" <community-noreply@qnx.com> wrote: I modified the build file as suggested and, additionally, increased the RAM disk size to 1GB in order to ensure enough space for the dumpfiles under /tmp. Unfortunately, there are no dumpfiles produced, at all (also, no messages from 'dumper -v -d/tmp'). Nevertheless, I attached all other information here, hoping it shows something useful. With best regards, Michael. > Please can you modify your build file and add "dumper -d/tmp" before "seedres" > in your build file. Reboot the system with a PCI adapter installed and post > the resulting .core file from the /tmp directory, together with the pci-bios- > v2 that you are using and the libc.so.3. Also please post the output from " > sloginfo". > Also, please boot your system without a PCI adapter installed and post the > resulting output from sloginfo, together with the "pci -vvv" output. > > Thanks, Hugh. _______________________________________________ General http://community.qnx.com/sf/go/post118934 To cancel your subscription to this discussion, please e-mail general-community-unsubscribe@community.qnx.com Wed, 11 Jul 2018 12:36:25 GMT http://community.qnx.com/sf/go/post118941 Hugh Brown 2018-07-11T12:36:25Z post118940: Re: QNX6.5 emmc/MMC and pci drivers problems in BSP for x86-generic http://community.qnx.com/sf/go/post118940 The PCI server uses BIOS calls to read/write the PCI configuration space, so I guess that your hardware doesn't have this functionality in your BIOS, or maybe it is a BIOS option. On 2018-07-11, 8:01 AM, "Vasilij Yanikeev" <community-noreply@qnx.com> wrote: # sloginfo Time Sev Major Minor Args Oct 28 18:30:02 2 17 0 pci-bios: No BIOS present - Status ffffffff - errno 14! Oct 28 18:30:02 2 17 0 pci-bios: HWI failed! Oct 28 18:30:02 2 17 0 pci_server: No dll loaded! Oct 28 18:32:10 2 19 1800 devb-mmcsd 1.00A (Jan 12 2017 11:25:35) Oct 28 18:32:10 2 5 0 libcam.so (Jun 20 2012 13:40:15) bver 6050001 Oct 28 18:32:10 2 19 1800 sdhci_init: pci_attach failed _______________________________________________ General http://community.qnx.com/sf/go/post118939 To cancel your subscription to this discussion, please e-mail general-community-unsubscribe@community.qnx.com Wed, 11 Jul 2018 12:20:54 GMT http://community.qnx.com/sf/go/post118940 Hugh Brown 2018-07-11T12:20:54Z post118939: Re: QNX6.5 emmc/MMC and pci drivers problems in BSP for x86-generic http://community.qnx.com/sf/go/post118939 # sloginfo Time Sev Major Minor Args Oct 28 18:30:02 2 17 0 pci-bios: No BIOS present - Status ffffffff - errno 14! Oct 28 18:30:02 2 17 0 pci-bios: HWI failed! Oct 28 18:30:02 2 17 0 pci_server: No dll loaded! Oct 28 18:32:10 2 19 1800 devb-mmcsd 1.00A (Jan 12 2017 11:25:35) Oct 28 18:32:10 2 5 0 libcam.so (Jun 20 2012 13:40:15) bver 6050001 Oct 28 18:32:10 2 19 1800 sdhci_init: pci_attach failed Wed, 11 Jul 2018 12:18:42 GMT http://community.qnx.com/sf/go/post118939 Vasilij Yanikeev(deleted) 2018-07-11T12:18:42Z post118938: QNX6.5 emmc/MMC and pci drivers problems in BSP for x86-generic http://community.qnx.com/sf/go/post118938 Hello! I'm trying to launch this BSP (https://community.qnx.com/sf/wiki/do/viewPage/projects.bsp/wiki/X86Bios) on my Intel Atom E3800 board. I built QNX BSP with minimum amount of modules (only pci driver and mmc for downloading other modules from emmc) driver as elf. After that I build Coreboot bios (https://www.coreboot.org/) with QNX BSP elf as payload. I flashed image with coreboot and QNX kernel to SPI RAM by programmer. QNX launched, but there is some problems (see full launch log in attachments) with emmc and pci server. Here QNX startup log and cat /dev/slog after that: Welcome to QNX Neutrino 6.5.0 SP1! Starting slogger... Starting serial server... Starting PCI server... Start xHCI USB services... main: Unable to locate pci server main: Unable to locate pci server main: Unable to locate pci server main: Unable to locate pci server main: Unable to locate pci server main: Unable to locate pci server main: Unable to locate pci server main: Unable to locate pci server main: Unable to locate pci server main: Unable to locate pci server Starting Input services... Starting some consoles... # devb-mmcsd mmcsd vid=0x8086,did=0x0f14,irq=18 # No host controller found xpt_configure: mmcsd SIM attach failure # # cat /dev/slog jєLжpci-bios: No BIOS present - Status ffffffff - errno 14!jєLжpci-bios: HWI failed!enjєLжpci_server: No dll loaded! What am I doing wrong? Full launch log and my build file in attachments. Regards, Vasily Wed, 11 Jul 2018 11:18:52 GMT http://community.qnx.com/sf/go/post118938 Vasilij Yanikeev(deleted) 2018-07-11T11:18:52Z post118936: Issues about Running QNX 7.00 on NXP i.MX8QXP ARM2 Board http://community.qnx.com/sf/go/post118936 Hi, We built a image for i.MX8QXP accroding "BSP User's Guide NXP i.MX8QXP CPU Board", and we got 2 image : ipl-imx8qxp-cpu.bin & ifs-imx8qxp-cpu-graphics.bin, but it could not start/work correctly. We just have a NXP ARM2 board with i.MX8QXP a0 IC, and do not have the MEK board in hand. We wanna know if the BSP is built for the official MEK boark? What should we do if we want to run the QNX on the ARM2 board? Wed, 11 Jul 2018 09:40:39 GMT http://community.qnx.com/sf/go/post118936 Wang XiaoWei 2018-07-11T09:40:39Z post118934: Re: QNX 6.5.0 SP1: pci-bios-v2 is not starting whenever a PCI card is plugged in http://community.qnx.com/sf/go/post118934 I modified the build file as suggested and, additionally, increased the RAM disk size to 1GB in order to ensure enough space for the dumpfiles under /tmp. Unfortunately, there are no dumpfiles produced, at all (also, no messages from 'dumper -v -d/tmp'). Nevertheless, I attached all other information here, hoping it shows something useful. With best regards, Michael. > Please can you modify your build file and add "dumper -d/tmp" before "seedres" > in your build file. Reboot the system with a PCI adapter installed and post > the resulting .core file from the /tmp directory, together with the pci-bios- > v2 that you are using and the libc.so.3. Also please post the output from " > sloginfo". > Also, please boot your system without a PCI adapter installed and post the > resulting output from sloginfo, together with the "pci -vvv" output. > > Thanks, Hugh. Wed, 11 Jul 2018 08:04:04 GMT http://community.qnx.com/sf/go/post118934 Michael Kurt 2018-07-11T08:04:04Z post118933: where is the qnx bsp for s32v-sbc http://community.qnx.com/sf/go/post118933 I want to run the qnx on s32v-sbc, but only qnx bsp for s32v-evb is found in qnx home site. How can I get the qnx bsp for s32v-sbc? Thanks a lot~ Wed, 11 Jul 2018 04:38:42 GMT http://community.qnx.com/sf/go/post118933 jian wong(deleted) 2018-07-11T04:38:42Z post118930: Re: QNX 6.5.0 SP1: pci-bios-v2 is not starting whenever a PCI card is plugged in http://community.qnx.com/sf/go/post118930 Please can you modify your build file and add "dumper -d/tmp" before "seedres" in your build file. Reboot the system with a PCI adapter installed and post the resulting .core file from the /tmp directory, together with the pci-bios-v2 that you are using and the libc.so.3. Also please post the output from "sloginfo". Also, please boot your system without a PCI adapter installed and post the resulting output from sloginfo, together with the "pci -vvv" output. Thanks, Hugh. On 2018-07-10, 6:43 AM, "Michael Kurt" <community-noreply@qnx.com> wrote: I'm expieriencing some troubles while getting a PC hardware to run under QNX 6.5.0 SP1 (latest available patches applied): Whenever I insert a PCI card, the pci-server is not started ("Unable to access "/dev/pci" (2)") and I cannot find the reason for this. It does not matter, what kind of PCI card I insert (I tried several different cards: network, graphics, gpio) - the result is always the same. The hardware is an Intel Haswell Core i7-4650U with 8GB of RAM and PCI express Slots, where I use an adapter for PCI cards. (As far as I know, the controllers are PEX8112 (PCI-to-PCIe bridge) and PI7C9X20404 (PCIe switch)) The PC is booted with 'startup-apic' and 'pci-bios-v2' (see the attached .zip file for the boot script) (MSI (pci-bios -M) are switched off, since message signalled interrupts are not supported by our software, but starting with MSI enabled also fails) In the attached .zip file, there are some log files with the output of the boot process (startup-apic and sloginfo) logged via serial console. (the file names should be self-explaining) In the 'boot_with__no_pci-card' logfile, You can also find the output of the 'pci' command, if this is of interest. Is there something missing in the boot script or is there some unsupported hardware? Any hints by someone would be very helpful. Thank You in advance - with best regards, Michael. _______________________________________________ General http://community.qnx.com/sf/go/post118929 To cancel your subscription to this discussion, please e-mail general-community-unsubscribe@community.qnx.com Tue, 10 Jul 2018 13:20:09 GMT http://community.qnx.com/sf/go/post118930 Hugh Brown 2018-07-10T13:20:09Z post118929: QNX 6.5.0 SP1: pci-bios-v2 is not starting whenever a PCI card is plugged in http://community.qnx.com/sf/go/post118929 I'm expieriencing some troubles while getting a PC hardware to run under QNX 6.5.0 SP1 (latest available patches applied): Whenever I insert a PCI card, the pci-server is not started ("Unable to access "/dev/pci" (2)") and I cannot find the reason for this. It does not matter, what kind of PCI card I insert (I tried several different cards: network, graphics, gpio) - the result is always the same. The hardware is an Intel Haswell Core i7-4650U with 8GB of RAM and PCI express Slots, where I use an adapter for PCI cards. (As far as I know, the controllers are PEX8112 (PCI-to-PCIe bridge) and PI7C9X20404 (PCIe switch)) The PC is booted with 'startup-apic' and 'pci-bios-v2' (see the attached .zip file for the boot script) (MSI (pci-bios -M) are switched off, since message signalled interrupts are not supported by our software, but starting with MSI enabled also fails) In the attached .zip file, there are some log files with the output of the boot process (startup-apic and sloginfo) logged via serial console. (the file names should be self-explaining) In the 'boot_with__no_pci-card' logfile, You can also find the output of the 'pci' command, if this is of interest. Is there something missing in the boot script or is there some unsupported hardware? Any hints by someone would be very helpful. Thank You in advance - with best regards, Michael. Tue, 10 Jul 2018 11:01:22 GMT http://community.qnx.com/sf/go/post118929 Michael Kurt 2018-07-10T11:01:22Z post118926: QNX6.5.0 SP1: devg-intelhd and Intel HD graphics 5000 (Haswell) http://community.qnx.com/sf/go/post118926 Our PC platform is equipped with an Intel HD graphics 5000 controller (Haswell, PCI ID 8086:0a26). The latest available version of 'devg-intelhd' is rel4742 from 2014-05-19, which does not support this controller, but has it already in it's list (/etc/system/enum/devices/graphics.ihd). Is there a newer version of the driver available, which supports this controller? Tue, 10 Jul 2018 09:43:15 GMT http://community.qnx.com/sf/go/post118926 Michael Kurt 2018-07-10T09:43:15Z post118908: Error in Final Launch Sequence (Unknown Response Error Attempting to Exec Shared Lib) http://community.qnx.com/sf/go/post118908 I am trying to run a helloWorld C++ Script onto my target. Is this possible? I have very limited experience with this software and just started coding with it. I am planning to develop security-based applications for connected vehicles. I checked that my target is configured properly, and I don't see where the shared library would come into play. I have build configurations and to my knowledge they are correct. Why am I getting this error? Fri, 29 Jun 2018 15:57:10 GMT http://community.qnx.com/sf/go/post118908 Miles Frierson(deleted) 2018-06-29T15:57:10Z post118903: Re: GPMI driver for i.mx6s http://community.qnx.com/sf/go/post118903 By the way, could you show haw did you bind apbh dma interrupt with qnx kernel? Fri, 22 Jun 2018 11:29:33 GMT http://community.qnx.com/sf/go/post118903 Vasilij Yanikeev(deleted) 2018-06-22T11:29:33Z post118902: Re: GPMI driver for i.mx6s http://community.qnx.com/sf/go/post118902 Hello, Albrecht! Thank you for your response! Yes, I verifyed compatibility for GPMI, BCH and APBH for imx6s and imx7. There is only difference in base address. All other registers are the same. And there is differs interrupt numbpers for BCH and APBH DMA. Thank you for pointing about NAND flash driver Freescale's i.MX6 Platform SDK, I will take a look. In which BSP for imx6 did you see NAND driver? I saw driver only for mtd-flash, but it is not the same as driver for parallel NAND flash. Fri, 22 Jun 2018 10:02:00 GMT http://community.qnx.com/sf/go/post118902 Vasilij Yanikeev(deleted) 2018-06-22T10:02:00Z post118901: Re: GPMI driver for i.mx6s http://community.qnx.com/sf/go/post118901 Hello, Albrecht! Thank you for your response! Yes, I verifyed compatibility for GPMI, BCH and APBH for imx6s and imx7. There is only difference in base address. All other registers are the same. And there is differs interrupt numbpers for BCH and APBH DMA. Thank you for pointing about NAND flash driver Freescale's i.MX6 Platform SDK, I will take a look. In which BSP for imx6 did you see NAND driver? I saw driver only for mtd-flash, but it is not the same as driver for parallel NAND flash. Fri, 22 Jun 2018 10:01:59 GMT http://community.qnx.com/sf/go/post118901 Vasilij Yanikeev(deleted) 2018-06-22T10:01:59Z post118900: Re: GPMI driver for i.mx6s http://community.qnx.com/sf/go/post118900 Hello, Albrecht! Thank you for your response! Yes, I verifyed compatibility for GPMI, BCH and APBH for imx6s and imx7. There is only difference in base address. All other registers are the same. And there is differs interrupt numbpers for BCH and APBH DMA. Thank you for pointing about NAND flash driver Freescale's i.MX6 Platform SDK, I will take a look. In which BSP for imx6 did you see NAND driver? I saw driver only for mtd-flash, but it is not the same as driver for parallel NAND flash. Fri, 22 Jun 2018 10:01:58 GMT http://community.qnx.com/sf/go/post118900 Vasilij Yanikeev(deleted) 2018-06-22T10:01:58Z post118899: Re: GPMI driver for i.mx6s http://community.qnx.com/sf/go/post118899 Hello Vasilij, did you verify that the GPMI is compatible between i.MX6-Solo and i.MX7? We have created a NAND flash driver for i.MX6dq based on Freescale's i.MX6 Platform SDK. It's a slightly different approach, though. I also saw that some other i.MX6 BSP did contain a NAND flash driver. It obviously comes from Freescale and also incorporates some modified sources from the aforementioned Platform SDK. Maybe that helps. Regards, Albrecht Fri, 22 Jun 2018 08:52:27 GMT http://community.qnx.com/sf/go/post118899 Albrecht Uhlmann 2018-06-22T08:52:27Z post118898: GPMI driver for i.mx6s http://community.qnx.com/sf/go/post118898 Hello! I am trying to run QNX6.5 etfs driver for parallel NAND memory on my i.MX6SL based board. I ported BSP for Freescale i.MX6Q Sabre Lite Board (http://community.qnx.com/sf/wiki/do/viewPage/projects.bsp/wiki/FreescaleImx6QSabreLite) and it successfully started on my board. After that I took driver from BSP for NXP MCIMX7 Sabre Board (http://community.qnx.com/sf/wiki/do/viewPage/projects.bsp/wiki/NxpMcimx7sabre) and ported it for my platform. I added driver initialization in QNX startup (added “fs-etfs-imx-micron –e” to .script section in build-file). So drivers stops execution while initialization gpmi module on waiting IMX_APBH_IRQ interrupt (45 - Logical OR of APBH DMA channels 0-3 completion and error interrupts). What am I doing wrong? So gpmi initialization sequence is follows. 1) Clock enable in DCD section: … DCD_ENTRY(1, 0x020c4068, 0xffffffff) DCD_ENTRY(2, 0x020c406c, 0xffffffff) DCD_ENTRY(3, 0x020c4070, 0xffffffff) DCD_ENTRY(4, 0x020c4074, 0xffffffff) DCD_ENTRY(5, 0x020c4078, 0xffffffff) DCD_ENTRY(6, 0x020c407c, 0xffffffff) DCD_ENTRY(7, 0x020c4080, 0xffffffff) … 2) Setup pin muxing in startup: … out32(MX6X_CCM_BASE + MX6X_CCM_CCGR4, 0xFFFFF300 ); pinmux_set_swmux(SWMUX_NANDF_CLE, MUX_CTL_MUX_MODE_ALT0); pinmux_set_padcfg(SWPAD_NANDF_CLE, PAD_CFG_0); pinmux_set_swmux(SWMUX_NANDF_ALE, MUX_CTL_MUX_MODE_ALT0); pinmux_set_padcfg(SWPAD_NANDF_ALE, PAD_CFG_0); pinmux_set_swmux(SWMUX_NANDF_WP_B, MUX_CTL_MUX_MODE_ALT0); pinmux_set_padcfg(SWPAD_NANDF_WP_B, PAD_CFG_0); pinmux_set_swmux(SWMUX_NANDF_RB0, MUX_CTL_MUX_MODE_ALT0); pinmux_set_padcfg(SWPAD_NANDF_RB0, PAD_CFG_1); pinmux_set_swmux(SWMUX_NANDF_CS0, MUX_CTL_MUX_MODE_ALT0); pinmux_set_padcfg(SWPAD_NANDF_CS0, PAD_CFG_0); pinmux_set_swmux(SWMUX_NANDF_CS1, MUX_CTL_MUX_MODE_ALT0); pinmux_set_padcfg(SWPAD_NANDF_CS1, PAD_CFG_0); pinmux_set_swmux(SWMUX_NANDF_CS2, MUX_CTL_MUX_MODE_ALT0); pinmux_set_padcfg(SWPAD_NANDF_CS2, PAD_CFG_0); pinmux_set_swmux(SWMUX_NANDF_CS3, MUX_CTL_MUX_MODE_ALT0); pinmux_set_padcfg(SWPAD_NANDF_CS3, PAD_CFG_0); pinmux_set_swmux(SWMUX_SD4_CMD, MUX_CTL_MUX_MODE_ALT1); pinmux_set_padcfg(SWPAD_SD4_CMD, PAD_CFG_0); pinmux_set_swmux(SWMUX_SD4_CLK, MUX_CTL_MUX_MODE_ALT1); pinmux_set_padcfg(SWPAD_SD4_CLK, PAD_CFG_0); pinmux_set_swmux(SWMUX_NANDF_D0, MUX_CTL_MUX_MODE_ALT0); pinmux_set_padcfg(SWPAD_NANDF_D0, PAD_CFG_0); pinmux_set_swmux(SWMUX_NANDF_D1, MUX_CTL_MUX_MODE_ALT0); pinmux_set_padcfg(SWPAD_NANDF_D1, PAD_CFG_0); pinmux_set_swmux(SWMUX_NANDF_D2, MUX_CTL_MUX_MODE_ALT0); pinmux_set_padcfg(SWPAD_NANDF_D2, PAD_CFG_0); pinmux_set_swmux(SWMUX_NANDF_D3, MUX_CTL_MUX_MODE_ALT0); pinmux_set_padcfg(SWPAD_NANDF_D3, PAD_CFG_0); pinmux_set_swmux(SWMUX_NANDF_D4, MUX_CTL_MUX_MODE_ALT0); pinmux_set_padcfg(SWPAD_NANDF_D4, PAD_CFG_0); pinmux_set_swmux(SWMUX_NANDF_D5, MUX_CTL_MUX_MODE_ALT0); pinmux_set_padcfg(SWPAD_NANDF_D5, PAD_CFG_0); pinmux_set_swmux(SWMUX_NANDF_D6, MUX_CTL_MUX_MODE_ALT0); pinmux_set_padcfg(SWPAD_NANDF_D6, PAD_CFG_0); pinmux_set_swmux(SWMUX_NANDF_D7, MUX_CTL_MUX_MODE_ALT0); pinmux_set_padcfg(SWPAD_NANDF_D7, PAD_CFG_0); pinmux_set_swmux(SWMUX_SD4_DAT0, MUX_CTL_MUX_MODE_ALT2); pinmux_set_padcfg(SWPAD_SD4_DAT0, PAD_CFG_2); … 3) GPMI initialization in driver. Briefly: ... // APBH, BCH and GPMI init if (nand_init(cio) != 0) { dev->log(_SLOG_CRITICAL, "nand_init failed : %s", strerror(errno)); // We will not return } cio->apbhirq = IMX_APBH_IRQ; cio->bchirq = IMX_BCH_IRQ; // Start-up a thread that is dedicated to interrupt processing cio->apbhirq_expected = 0; pthread_mutex_init(&cio->apbhmutex, NULL); pthread_cond_init(&cio->apbhcond, NULL); pthread_create(NULL, NULL, apbhint_thread, cio); // Start-up a thread that is dedicated to interrupt processing cio->bchirq_expected = 0; pthread_mutex_init(&cio->bchmutex, NULL); pthread_cond_init(&cio->bchcond, NULL); pthread_create(NULL, NULL, bchint_thread, cio); ... if (nand_wait_busy(cio, MAX_RESET_USEC, 0) != 0) { dev->log(_SLOG_CRITICAL, "Timeout on RESET"); } // Create reset device and reset the part - for some devices it must be first command create_reset_descriptor(reset_ptr); status = run_dma((apbh_dma_t*)reset_ptr, cio, NAND_DMA_GPMI_TRANS, (uint32_t)virtual_to_physical_addr(reset_ptr)); if (status != NAND_EOK) { dev->log(_SLOG_CRITICAL, "DMA operation fail"); } if (nand_wait_busy(cio, MAX_RESET_USEC, 0) != 0) { dev->log(_SLOG_CRITICAL, "Timeout on RESET"); } delay(2); // Create read status chain and read status register from device create_readStatus2_descriptor(read_status_ptr, mem_stat_ptr, 1); status = run_dma((apbh_dma_t*)read_status_ptr, cio, NAND_DMA_GPMI_TRANS, (uint32_t)virtual_to_physical_addr(read_status_ptr)); //<<<<<<<<<<<<<<<<< Stops here <<<<<<<<<<<<<<<<<<< ... Regards, Vasily Fri, 22 Jun 2018 06:47:54 GMT http://community.qnx.com/sf/go/post118898 Vasilij Yanikeev(deleted) 2018-06-22T06:47:54Z post118897: Re: QNX SDP 6.6 BSP for Freescale i.MX6x SABRE SmartDevices Fails to Boot http://community.qnx.com/sf/go/post118897 I see u-boot log in your message. Do you booting by u-boot? It is much more easy to boot this BSP by IPL. There must be ipl-mx6q-sabresmart.bin in ./image directory with your BSP. So you can download IPL to your bootable SD-card like this: sudo dd if=ipl-mx6q-sabresmart.bin of=/dev/sdb bs=512 seek=2 skip=2 Where /dev/sdb is your SD-card. After that you should to copy qnx-ifs image to SD card. Regards, Vasily Fri, 22 Jun 2018 06:44:29 GMT http://community.qnx.com/sf/go/post118897 Vasilij Yanikeev(deleted) 2018-06-22T06:44:29Z post118896: Re: QNX SDP 6.6 BSP for Freescale i.MX6x SABRE SmartDevices Fails to Boot http://community.qnx.com/sf/go/post118896 I see u-boot log in your message. Do you booting by u-boot? It is much more easy to boot this BSP by IPL. There must be ipl-mx6q-sabresmart.bin in ./image directory with your BSP. So you can download IPL to your bootable SD-card like this: sudo dd if=ipl-mx6q-sabresmart.bin of=/dev/sdb bs=512 seek=2 skip=2 Where /dev/sdb is your SD-card. After that you should to copy qnx-ifs image to SD card. Regards, Vasily Fri, 22 Jun 2018 06:44:28 GMT http://community.qnx.com/sf/go/post118896 Vasilij Yanikeev(deleted) 2018-06-22T06:44:28Z post118895: Re: QNX SDP 6.6 BSP for Freescale i.MX6x SABRE SmartDevices Fails to Boot http://community.qnx.com/sf/go/post118895 I see u-boot log in your message. Do you booting by u-boot? It is much more easy to boot this BSP by IPL. There must be ipl-mx6q-sabresmart.bin in ./image directory with your BSP. So you can download IPL to your bootable SD-card like this: sudo dd if=ipl-mx6q-sabresmart.bin of=/dev/sdb bs=512 seek=2 skip=2 Where /dev/sdb is your SD-card. After that you should to copy qnx-ifs image to SD card. Regards, Vasily Fri, 22 Jun 2018 06:44:27 GMT http://community.qnx.com/sf/go/post118895 Vasilij Yanikeev(deleted) 2018-06-22T06:44:27Z post118893: What types of QNX crash file are there http://community.qnx.com/sf/go/post118893 I have some unexpected files appeared in my file system. They are not core dumps as recognised by kc_coreinfo - is anyone aware of any other tools I could try other then simply inspecting their contents. They are simply numbered - for example 00036181 Wed, 20 Jun 2018 14:47:02 GMT http://community.qnx.com/sf/go/post118893 Neal Hewer 2018-06-20T14:47:02Z post118862: Re: How to enable interrupt in QNX7.0 ? http://community.qnx.com/sf/go/post118862 Hi again I still have no idea what I am doing wrong. I can't send interrupt from PRU1 to PRU0. I attach my code - some of it I took from pypruss (https://github.com/HudsonWerks/pypruss). I would be very grateful for any help. Run_PRUs.zip - Momentics Tool Project that can run PRU programs wait_intr.bin - PRU program which is blinking just one LED until it gets interrupt (however it doesn't receive interrupt so it would blink endlessly) wait_intr.p - code of wait_intr.bin for PASM compiler send_intr.bin - PRU program which makes single blink of all LEDs and then sends interrupt send_intr.p - code of wait_intr.bin for PASM compiler Thanks in advance Tue, 05 Jun 2018 09:00:58 GMT http://community.qnx.com/sf/go/post118862 Przemysław Wojnarski(deleted) 2018-06-05T09:00:58Z post118856: Re: How to enable interrupt in QNX7.0 ? http://community.qnx.com/sf/go/post118856 > Please post your code > > Looking into ti-am335x-beaglebone/src/hardware/startup/boards/ti-am335x/ > init_intrinfo.c I can see that interrupts 0-127 are covered by the general IRQ > handler, so it sould work. > > Regards, > Al Thanks for reply. You are probably right. This means that the PRU INTC is not sending interrupt. To verify this theory I tried to send an interrupt from one PRU core to another. It turned out that it is not possible. It is very odd. HIPIR register shows that my interrupt has the highest priority and also SECR register shows that my interrupt is enabled. Assuming that my code is correct, everything should work fine, but it is not. Is it possible that the signals from PRU INTC are blocked somehow or I am just making some stupid mistake ? Regards Tue, 29 May 2018 18:51:35 GMT http://community.qnx.com/sf/go/post118856 Przemysław Wojnarski(deleted) 2018-05-29T18:51:35Z post118852: Re: Tracing and Monitroing with QNX http://community.qnx.com/sf/go/post118852 I quickly browsed unistd.h In SDP 6.6. it simplay says: /* POSIX 1003.1q-2000 */ # undef _POSIX_TRACE_EVENT_FILTER # undef _POSIX_TRACE # undef _POSIX_TRACE_INHERIT # undef _POSIX_TRACE_LOG So I fear it is not implemented. Under SDP 7, it says /* POSIX 1003.1q-2000 */ # define _POSIX_TRACE_EVENT_FILTER (-1) # define _POSIX_TRACE (-1) # define _POSIX_TRACE_INHERIT (-1) # define _POSIX_TRACE_LOG (-1) So something has changed, but I don't know what (-1) means. Does it also say "No" or does it say "Default Support" or something? Maybe someone from QNX can comment on this ... my understanding is that there needs to be a wrapper API for the Low-Level "TraceEvent" calls. Regards, Al Mon, 28 May 2018 07:37:56 GMT http://community.qnx.com/sf/go/post118852 Albrecht Uhlmann 2018-05-28T07:37:56Z post118851: Re: How to enable interrupt in QNX7.0 ? http://community.qnx.com/sf/go/post118851 Please post your code Looking into ti-am335x-beaglebone/src/hardware/startup/boards/ti-am335x/init_intrinfo.c I can see that interrupts 0-127 are covered by the general IRQ handler, so it sould work. Regards, Al Mon, 28 May 2018 07:19:32 GMT http://community.qnx.com/sf/go/post118851 Albrecht Uhlmann 2018-05-28T07:19:32Z post118850: How to enable interrupt in QNX7.0 ? http://community.qnx.com/sf/go/post118850 Hi everyone I installed QNX7.0 on my BeagleBone Black. BBB has AM335x SoC which contains PRU-ICSS however, by default, interrupts from PRUs are disabled - in QNX buildfile system interrupts 20-27 (PRU events) are marked as "Reserved": ## vector: 20 - 27 ## trigger: N/A ## device: Reserved I would like to enable it. Does anyone know how to do that? Additionaly, I am not sure what "Reserved" means. On the begining I thought that "Reserved" means that there is no handler for these interrupts so sending it would cause system crash. I also thought that maybe there is some very simple handler which does nothing but erasing the source of the interrupt. However, when I generate interrupt from PRU, the main INTC does not even get this interrupt - ITR register is clear - how is that possible? Regards Sun, 27 May 2018 13:58:52 GMT http://community.qnx.com/sf/go/post118850 Przemysław Wojnarski(deleted) 2018-05-27T13:58:52Z post118846: Tracing and Monitroing with QNX http://community.qnx.com/sf/go/post118846 Hallo, I'm writing my master's thesis in a company and in my project I need to implement a tracing tool. The QNX OS is a hot candidat for my project and I wanted to ask, whether the QNX OS supports the POSIX Tracing Standard (IEEE 1003.1q-2000). Best regards Usam Fri, 25 May 2018 13:09:18 GMT http://community.qnx.com/sf/go/post118846 Usam Sersultanov 2018-05-25T13:09:18Z post118825: Error using gdb http://community.qnx.com/sf/go/post118825 Hello, Am facing below error when i am trying to open core file. "Cant read pathname for load map : input/output error" Am generating core file using dumper -p pid. gdb version 7.5 Please suggest how to resolve this issue. Thank you Thu, 17 May 2018 19:39:29 GMT http://community.qnx.com/sf/go/post118825 Surya kumar(deleted) 2018-05-17T19:39:29Z post118824: Error using gdb http://community.qnx.com/sf/go/post118824 Hello, Am facing below error when i am trying to open core file. "Cant read pathname for load map : input/output error" Am generating core file using dumper -p pid. gdb version 7.5 Please suggest how to resolve this issue. Thank you Thu, 17 May 2018 19:38:33 GMT http://community.qnx.com/sf/go/post118824 Surya kumar(deleted) 2018-05-17T19:38:33Z post118802: BSP Mercury+ XU1 SoC http://community.qnx.com/sf/go/post118802 Hello, i need some information. Is the BSP from "Xilinx Zynq UltraScale+ MPSoC ZCU102 Eval. Kit" compatible with the "Mercury+ XU1 SoC Module"? If not, there is another BSP for the board? thanks Wed, 09 May 2018 13:22:37 GMT http://community.qnx.com/sf/go/post118802 Daniel Ring(deleted) 2018-05-09T13:22:37Z post118768: QNX IDE Momentics(tracelogger error) http://community.qnx.com/sf/go/post118768 Hi, I am using QNX IDE Momentics. I tried opening tracelogger output file in QNX IDE Momentics. But it is throwing an error. I will attach the screenshot. Could you please help me and let me kow if I am doing something wrong. Thanks in advance. Thanks and regards, Jashitha Fri, 13 Apr 2018 05:16:55 GMT http://community.qnx.com/sf/go/post118768 jashitha kp(deleted) 2018-04-13T05:16:55Z post118733: Re: File Viewer http://community.qnx.com/sf/go/post118733 You will need to boot the QNX disk (into QNX). From there I would most likely use FTP or CIFS to mount a remote disk and copy files over. Other options (but probably requires you to have a bit more QNX knowledge) include creating a separate DOS partition or disk, USB connected flash drive or disk, to copy the files you want. - Dave Mon, 02 Apr 2018 18:29:18 GMT http://community.qnx.com/sf/go/post118733 Dave Nickerson 2018-04-02T18:29:18Z post118732: Re: Hogs tool for qnx http://community.qnx.com/sf/go/post118732 Application Profiling tools within Momentics would help you find where your app is spending its execution time. System Profiling tools would also help you locate any system resources that are being consumed by your application or other applications on your system. Mon, 02 Apr 2018 18:23:21 GMT http://community.qnx.com/sf/go/post118732 Dave Nickerson 2018-04-02T18:23:21Z post118729: Qnx 6.5 , switching active console http://community.qnx.com/sf/go/post118729 dear all, I built an app with curses display UI.. as a default, terminal will display the virtual console-1 after boot up.. I have problem if I used virtual console-1 since the system log keeps displaying into the console-1. So, I need to use another console (ex: console-2) for my display UI to get away from system log printing.. Therefore I need to switch into console-2 automatically after OS booting finished.. Is it possible to switch the active console via C code or bash script rather than pressing keyboard key Alt+Ctrl+n ? In qnx 4, there was console_active() function.. but i cannot find this function in qnx 6.5 Thank you. Fri, 30 Mar 2018 04:04:02 GMT http://community.qnx.com/sf/go/post118729 frans kurniawan(deleted) 2018-03-30T04:04:02Z post118715: Hogs tool for qnx http://community.qnx.com/sf/go/post118715 Hello, I am running hogs tool for one of my application to check CPU utilisation. I see there is a sudden increase in msec but memory remains constant as shown below PID NAME MSEC PIDS SYS MEMORY 397356 a.out 28 0% 0% 1476k 10% 397356 a.out 32 0% 1% 1476k 10% 397356 a.out 35 0% 1% 1476k 10% 397356 a.out 37 0% 1% 1476k 10% 397356 a.out 29 0% 0% 1476k 10% 397356 a.out 50 0% 1% 1476k 10% 397356 a.out 36 0% 1% 1476k 10% 397356 a.out 36 0% 1% 1476k 10% 397356 a.out 50 0% 1% 1476k 10% 397356 a.out 40 0% 1% 1476k 10% 397356 a.out 39 0% 1% 1476k 10% 397356 a.out 45 0% 1% 1476k 10% 397356 a.out 454 0% 1% 1476k 10% 397356 a.out 414 0% 1% 1476k 10% 397356 a.out 404 0% 1% 1476k 10% 397356 a.out 422 0% 1% 1476k 10% 397356 a.out 411 0% 1% 1476k 10% 397356 a.out 402 0% 1% 1476k 10% 397356 a.out 422 0% 1% 1476k 10% 397356 a.out 407 0% 1% 1476k 10% 397356 a.out 398 0% 1% 1476k 10% Could you please help me in this. Can I know what could be the possible reason behind this. Appreciate any help in this regard Thank you in advance. Thanks and regards, Jashitha Thu, 29 Mar 2018 12:41:27 GMT http://community.qnx.com/sf/go/post118715 jashitha kp(deleted) 2018-03-29T12:41:27Z post118684: Re: Please help recommend multi-core platform boxes on the market http://community.qnx.com/sf/go/post118684 I have found what I am looking for at the BSP section. Thank you for your attention. Charles 3/20 Mon, 19 Mar 2018 21:23:39 GMT http://community.qnx.com/sf/go/post118684 Charles Wang(deleted) 2018-03-19T21:23:39Z post118681: PRU-ICSS memory access (Beaglebone Black) http://community.qnx.com/sf/go/post118681 Hi I installed QNX 7.0 on my Beaglebone Black. Now I need to get access to PRU-ICSS memory. ARM Cortex-A8 Memory Map says that PRU-ICSS memory starts at 0x4a300000 and ends at 0x4a37FFFF (512KB). Mapping this memory causes no errors: void* pruss_memory = mmap_device_memory(NULL, 0x80000, PROT_READ|PROT_WRITE, 0, 0x4a300000); if ( pruss_memory == MAP_FAILED ) { perror( "mmap_device_memory failed" ); exit( EXIT_FAILURE ); } However when I try to read or write to this memory I get this error: Process 81942 (LedyTest) terminated SIGBUS code=2 fltno=40 ip=100c8f9a(/tmp/LedyTest@_btext+0x000001fe) mapaddr=00000f9a. ref=28000000 Does anyone know how to solve this problem? Thanks in advance Sun, 18 Mar 2018 10:38:54 GMT http://community.qnx.com/sf/go/post118681 Przemysław Wojnarski(deleted) 2018-03-18T10:38:54Z post118678: Please help recommend multi-core platform boxes on the market http://community.qnx.com/sf/go/post118678 Hi: I am new to QNX systems. I am looking to buy a commercial platform hardware to test out QNX Neutrino. Must have a multi-core microprocessor (Cortex, Intel...). Can you recommend a commercial product on the market? Thanks. Charles 3/17 Sat, 17 Mar 2018 01:37:45 GMT http://community.qnx.com/sf/go/post118678 Charles Wang(deleted) 2018-03-17T01:37:45Z post118673: File Viewer http://community.qnx.com/sf/go/post118673 I have a disk image of a QNX drive. I am not a developer and am not very familiar with QNX. What is the best way to view the QNX disk image? I just need access to all of the files so I can copy them out into a Windows application. Thank You! Thu, 15 Mar 2018 12:04:00 GMT http://community.qnx.com/sf/go/post118673 Brian Salmon(deleted) 2018-03-15T12:04:00Z post118596: How to speed up file transfers? http://community.qnx.com/sf/go/post118596 I'm using QNX 7.0 in virtualbox and Ubuntu 16.04 LTS. Uploading a file to QNX using scp transfers at about 686 KB/s but download is 32 MB/s. Does anyone know how to make uploading faster? I tried to use rsync but I couldn't figure out how to compile it for QNX. Mon, 19 Feb 2018 19:35:20 GMT http://community.qnx.com/sf/go/post118596 Darryl Gough 2018-02-19T19:35:20Z post118588: Re: Does not go to the interrupt handler when generating the MSI interrupt driver for the module on the PciExpress bus (OS QNX 6.5.0 X86) http://community.qnx.com/sf/go/post118588 Thanks for letting us know. Hugh. On 2018-02-15, 7:14 AM, "matrix dasd" <community-noreply@qnx.com> wrote: Many thanks for the help, finally, figured out))) rewrote the code via InterruptAttachEvent, everything worked The problem was that the functions printf and MsgDeliverEvent can not be used in the interrupt handler, I did not know that there are such limitations in QNX (I'll repeat once again, this is my first experience writing drivers for QNX, I wrote mostly for Linux) formally did this - in the process of initialization a thread_irq is created, which registers an interrupt and waits for it, sends a signal void *thread_irq(void *arg) { uint32_t ri, mi, mci, rci; int eu = 0; unsigned int minor = *(unsigned int *)arg; struct sigevent int_event; //текущее событие struct sigevent event; int i = 0,err = 0; printf("\nDEV_MIL_DRV_UDx: Start irq_thread(), minor = %d",minor); //записываем номер MSI прерывания device_mil[minor].irq_num = device_mil[minor].pci_info.Irq; if(device_mil[minor].pci_info.msi) printf("\nDEV_MIL_DRV_UDx: MSI enable, MSI irq is %d",device_mil[minor].irq_num); else printf("\nDEV_MIL_DRV_UDx: !!! MSI DON'T ENABLE, YOU MUST DON'T USE INTERRUPT FOR WORK WITH MODULE!!!"); // создаем поток для драйвера(должны быть root права) if(ThreadCtl(_NTO_TCTL_IO, 0) != EOK){ printf("\nDEV_MIL_DRV_UDx: You must be root!"); pthread_exit((void*)-1); } //регистрируем обработчик прерывания int_event.sigev_notify = SIGEV_INTR; device_mil[minor].di.int_id = InterruptAttachEvent(device_mil[minor].irq_num,&int_event,0); if(device_mil[minor].di.int_id == -1) { printf("\nDEV_MIL_DRV_UDx: error interrupt attach"); perror("\nInterruptAttach:"); pthread_exit((void*)-1); } while(1){ //ожидаем прерывания InterruptWait( 0, NULL); printf("\nDEV_MIL_DRV_UDx: irq_handler(): begin.\n"); !!!!!code!!!! } } now I will only use InterruptAttachEvent))) Once again many thanks for the help !!!))) _______________________________________________ General http://community.qnx.com/sf/go/post118581 To cancel your subscription to this discussion, please e-mail general-community-unsubscribe@community.qnx.com Fri, 16 Feb 2018 12:57:48 GMT http://community.qnx.com/sf/go/post118588 Hugh Brown 2018-02-16T12:57:48Z post118587: Re: QNX 7 - PRU-ICSS support (Beaglebone Black Rev C) http://community.qnx.com/sf/go/post118587 As far as I'm aware there is no standardized driver available in QNX. We have ourselves evaluated this scenario some years back, and found that the effort is quite considerable (at that time) and the support from TI was not overwhelming - very little information on how theses PRUs work, what you need to do, examples and so on. We then abandoned this approach for a completely different design. Knowing that there is some driver available in Linux, maybe you could use that as a starting point to implement a resource manager that handles the basic tasks - download a firmware image, start it, and provide a mechanism to exchange data. Regards, Al Fri, 16 Feb 2018 09:10:57 GMT http://community.qnx.com/sf/go/post118587 Albrecht Uhlmann 2018-02-16T09:10:57Z post118586: QNX 7 - PRU-ICSS support (Beaglebone Black Rev C) http://community.qnx.com/sf/go/post118586 Hi I installed QNX 7.0 BSP on my Beaglebone Black Rev C. However I need to use PRUs in my project. I can't find any information how to use it. Is PRU-ICSS supported by QNX ? Default Debian image shipped with Beaglebone has special kernel module called 'remoteproc' which allowes basic operations like loading image, stop, start etc. I wonder, wheter is there similar driver in QNX 7? Thanks in advance Thu, 15 Feb 2018 21:05:39 GMT http://community.qnx.com/sf/go/post118586 Przemysław Wojnarski(deleted) 2018-02-15T21:05:39Z post118583: apache web server 2.4 for QNX 6.5.0 SP1 http://community.qnx.com/sf/go/post118583 Is anybody successfully build apache server 2.4 on QNX 6.5.0 SP1? Is there any public apache 2.4 binary package for QNX 6.5.0? Thanks Janusz Thu, 15 Feb 2018 15:10:20 GMT http://community.qnx.com/sf/go/post118583 Janusz Ruszel 2018-02-15T15:10:20Z post118582: Re: pdf file generators for QNX 6.5 http://community.qnx.com/sf/go/post118582 what about GNU ghostscript in batch mode? Thu, 15 Feb 2018 15:06:31 GMT http://community.qnx.com/sf/go/post118582 Janusz Ruszel 2018-02-15T15:06:31Z post118581: Re: Does not go to the interrupt handler when generating the MSI interrupt driver for the module on the PciExpress bus (OS QNX 6.5.0 X86) http://community.qnx.com/sf/go/post118581 Many thanks for the help, finally, figured out))) rewrote the code via InterruptAttachEvent, everything worked The problem was that the functions printf and MsgDeliverEvent can not be used in the interrupt handler, I did not know that there are such limitations in QNX (I'll repeat once again, this is my first experience writing drivers for QNX, I wrote mostly for Linux) formally did this - in the process of initialization a thread_irq is created, which registers an interrupt and waits for it, sends a signal void *thread_irq(void *arg) { uint32_t ri, mi, mci, rci; int eu = 0; unsigned int minor = *(unsigned int *)arg; struct sigevent int_event; //текущее событие struct sigevent event; int i = 0,err = 0; printf("\nDEV_MIL_DRV_UDx: Start irq_thread(), minor = %d",minor); //записываем номер MSI прерывания device_mil[minor].irq_num = device_mil[minor].pci_info.Irq; if(device_mil[minor].pci_info.msi) printf("\nDEV_MIL_DRV_UDx: MSI enable, MSI irq is %d",device_mil[minor].irq_num); else printf("\nDEV_MIL_DRV_UDx: !!! MSI DON'T ENABLE, YOU MUST DON'T USE INTERRUPT FOR WORK WITH MODULE!!!"); // создаем поток для драйвера(должны быть root права) if(ThreadCtl(_NTO_TCTL_IO, 0) != EOK){ printf("\nDEV_MIL_DRV_UDx: You must be root!"); pthread_exit((void*)-1); } //регистрируем обработчик прерывания int_event.sigev_notify = SIGEV_INTR; device_mil[minor].di.int_id = InterruptAttachEvent(device_mil[minor].irq_num,&int_event,0); if(device_mil[minor].di.int_id == -1) { printf("\nDEV_MIL_DRV_UDx: error interrupt attach"); perror("\nInterruptAttach:"); pthread_exit((void*)-1); } while(1){ //ожидаем прерывания InterruptWait( 0, NULL); printf("\nDEV_MIL_DRV_UDx: irq_handler(): begin.\n"); !!!!!code!!!! } } now I will only use InterruptAttachEvent))) Once again many thanks for the help !!!))) Thu, 15 Feb 2018 12:34:52 GMT http://community.qnx.com/sf/go/post118581 matrix dasd(deleted) 2018-02-15T12:34:52Z post118577: Re: Does not go to the interrupt handler when generating the MSI interrupt driver for the module on the PciExpress bus (OS QNX 6.5.0 X86) http://community.qnx.com/sf/go/post118577 Well if the BIOS interrupts didn't work, then it isn't a QNX problem. Hugh. On 2018-02-14, 4:16 AM, "matrix dasd" <community-noreply@qnx.com> wrote: Yes, I tried, but the driver did not enter the interrupt handler. I made the driver log with and without the apic bootloader ("startup-bios" and "pci-bios"), as well as the pci -vvv log after downloading the driver in both cases, these logs I made on the work computer where uefi bios stands (the previous ones were made from a home computer) in QNX are there any tools (utilities, programs, files) that let you see whether there was an interruption at all? _______________________________________________ General http://community.qnx.com/sf/go/post118576 To cancel your subscription to this discussion, please e-mail general-community-unsubscribe@community.qnx.com Wed, 14 Feb 2018 13:13:55 GMT http://community.qnx.com/sf/go/post118577 Hugh Brown 2018-02-14T13:13:55Z post118576: Re: Does not go to the interrupt handler when generating the MSI interrupt driver for the module on the PciExpress bus (OS QNX 6.5.0 X86) http://community.qnx.com/sf/go/post118576 Yes, I tried, but the driver did not enter the interrupt handler. I made the driver log with and without the apic bootloader ("startup-bios" and "pci-bios"), as well as the pci -vvv log after downloading the driver in both cases, these logs I made on the work computer where uefi bios stands (the previous ones were made from a home computer) in QNX are there any tools (utilities, programs, files) that let you see whether there was an interruption at all? Wed, 14 Feb 2018 09:37:04 GMT http://community.qnx.com/sf/go/post118576 matrix dasd(deleted) 2018-02-14T09:37:04Z post118572: Re: Does not go to the interrupt handler when generating the MSI interrupt driver for the module on the PciExpress bus (OS QNX 6.5.0 X86) http://community.qnx.com/sf/go/post118572 Looking at the outputs that you sent, it appears that everything is setup correctly for MSI interrupts. Have you tried running "startup-bios" and "pci-bios" to see if your device works with non-msi interrupts? On 2018-02-13, 9:42 AM, "matrix dasd" <community-noreply@qnx.com> wrote: Unfortunately, this is my first experience of developing drivers for QNX, I do not know much about how it is possible at least on the side of QNX to see if the operating system has fixed the interrupt arrival, as in linux (the proc / interrupts file) On the module side, the interrupt is exactly gone; this is seen on the chipscope, I see that the corresponding registers in the module are correctly configured, with the same module configuration on Linux, the interrupts come _______________________________________________ General http://community.qnx.com/sf/go/post118570 To cancel your subscription to this discussion, please e-mail general-community-unsubscribe@community.qnx.com Tue, 13 Feb 2018 15:35:16 GMT http://community.qnx.com/sf/go/post118572 Hugh Brown 2018-02-13T15:35:16Z post118570: Re: Does not go to the interrupt handler when generating the MSI interrupt driver for the module on the PciExpress bus (OS QNX 6.5.0 X86) http://community.qnx.com/sf/go/post118570 Unfortunately, this is my first experience of developing drivers for QNX, I do not know much about how it is possible at least on the side of QNX to see if the operating system has fixed the interrupt arrival, as in linux (the proc / interrupts file) On the module side, the interrupt is exactly gone; this is seen on the chipscope, I see that the corresponding registers in the module are correctly configured, with the same module configuration on Linux, the interrupts come Tue, 13 Feb 2018 15:03:18 GMT http://community.qnx.com/sf/go/post118570 matrix dasd(deleted) 2018-02-13T15:03:18Z post118569: Re: Does not go to the interrupt handler when generating the MSI interrupt driver for the module on the PciExpress bus (OS QNX 6.5.0 X86) http://community.qnx.com/sf/go/post118569 I see that your RTL8169 Ethernet controller is using MSI-X interrupts, so if that is working, it means that the APIC controller is working. Do you have a bus analyzer on the system to see the MSI interrupt for your device? On 2018-02-13, 8:45 AM, "matrix dasd" <community-noreply@qnx.com> wrote: Thanks, Hugh, for your reply the whole log of pci -vvv I'm attaching but how can this happen ?? because the pci server itself configures the capability of the msi registers, and not I in the program itself write down these addresses and the value it turns out that the pci server itself incorrectly configures the apic controller? I checked on 2 computers, on one is just bios, on another uefi bios, in Linux I had problems with switching to uefi bios, because programmer that wrote before I forgot to call the driver pci_master_enable (), and uefi bios did not skip msi interrupts with this configuration, but in QNX the module is a master and can go to the pciexpress bus ... _______________________________________________ General http://community.qnx.com/sf/go/post118567 To cancel your subscription to this discussion, please e-mail general-community-unsubscribe@community.qnx.com Tue, 13 Feb 2018 14:54:11 GMT http://community.qnx.com/sf/go/post118569 Hugh Brown 2018-02-13T14:54:11Z post118567: Re: Does not go to the interrupt handler when generating the MSI interrupt driver for the module on the PciExpress bus (OS QNX 6.5.0 X86) http://community.qnx.com/sf/go/post118567 Thanks, Hugh, for your reply the whole log of pci -vvv I'm attaching but how can this happen ?? because the pci server itself configures the capability of the msi registers, and not I in the program itself write down these addresses and the value it turns out that the pci server itself incorrectly configures the apic controller? I checked on 2 computers, on one is just bios, on another uefi bios, in Linux I had problems with switching to uefi bios, because programmer that wrote before I forgot to call the driver pci_master_enable (), and uefi bios did not skip msi interrupts with this configuration, but in QNX the module is a master and can go to the pciexpress bus ... Tue, 13 Feb 2018 14:06:01 GMT http://community.qnx.com/sf/go/post118567 matrix dasd(deleted) 2018-02-13T14:06:01Z post118566: Re: Does not go to the interrupt handler when generating the MSI interrupt driver for the module on the PciExpress bus (OS QNX 6.5.0 X86) http://community.qnx.com/sf/go/post118566 Please can you supply the complete "pci -vv" from the system? I see that the PCI server is using address 0xfee00000 for the apic, so that might be the problem. Maybe the apic on your system is at a different address. Thanks, Hugh. On 2018-02-13, 2:29 AM, "matrix dasd" <community-noreply@qnx.com> wrote: Good afternoon everyone! There is a board with the Pci Express bus, this board implements the work of MSI interrupts I wrote the driver for Linux, MSI interrupts are enabled via the pci_msi_anable function and everything worked fine until I had a need to rewrite the driver under QNX 6.5.0 according to the documentation for the pci server (standard, which is installed with QNX), it's enough just to pass the PCI_USE_MSI flag to the function pci_attach_device and everything will be set up ... but that just does not work ... I changed the bootloader QNX so that it loads startup-apic and pci-bios-v2 in the driver I connect to the pci server and initialize msi interrupts, then I connect the interrupt handler, but the driver does not enter the interrupt handler (there are no messages from the handler), and I know for sure that the message packet msi leaves the tlp module, it is ignored on the QNX side or blocked loader and driver code for initializing the module with msi interrupts under QNX 6.5, as well as the pci -vvv log and the driver download log I am attaching dear forum users, did anyone have experience of including MSI interrupts under QNX 6.5.0 X86, share, please experience, 2 weeks already I fight, so far no result ???? thank you waiting for an answer _______________________________________________ General http://community.qnx.com/sf/go/post118563 To cancel your subscription to this discussion, please e-mail general-community-unsubscribe@community.qnx.com Tue, 13 Feb 2018 13:54:54 GMT http://community.qnx.com/sf/go/post118566 Hugh Brown 2018-02-13T13:54:54Z post118563: Does not go to the interrupt handler when generating the MSI interrupt driver for the module on the PciExpress bus (OS QNX 6.5.0 X86) http://community.qnx.com/sf/go/post118563 Good afternoon everyone! There is a board with the Pci Express bus, this board implements the work of MSI interrupts I wrote the driver for Linux, MSI interrupts are enabled via the pci_msi_anable function and everything worked fine until I had a need to rewrite the driver under QNX 6.5.0 according to the documentation for the pci server (standard, which is installed with QNX), it's enough just to pass the PCI_USE_MSI flag to the function pci_attach_device and everything will be set up ... but that just does not work ...   I changed the bootloader QNX so that it loads startup-apic and pci-bios-v2   in the driver I connect to the pci server and initialize msi interrupts, then I connect the interrupt handler, but the driver does not enter the interrupt handler (there are no messages from the handler), and I know for sure that the message packet msi leaves the tlp module, it is ignored on the QNX side or blocked   loader and driver code for initializing the module with msi interrupts under QNX 6.5, as well as the pci -vvv log and the driver download log I am attaching   dear forum users, did anyone have experience of including MSI interrupts under QNX 6.5.0 X86, share, please experience, 2 weeks already I fight, so far no result ????   thank you waiting for an answer Tue, 13 Feb 2018 07:50:09 GMT http://community.qnx.com/sf/go/post118563 matrix dasd(deleted) 2018-02-13T07:50:09Z post118478: Memory usage problem: Shared libraries not shared between processes with QNX 7.0 http://community.qnx.com/sf/go/post118478 As an experiment I wrote a really minimal C program, which just does sleep(3600), nothing else. I linked this program to Qt libraries (The libraries occupy 15 MB). When executing this test-app, I notice via "pidin info" that the free memory goes down by 15 MB. The problem is, if I open 10 instances of this program then the free memory goes down by 150 MB, and when it reaches 0, no more programs can be opened. When running the same on QNX 6.5.0 it only goes down by 500 KB, which is expected, since the libraries .code sections are shared between processes. Is this something that can be configured ? Sat, 27 Jan 2018 14:01:23 GMT http://community.qnx.com/sf/go/post118478 Sérgio Martins(deleted) 2018-01-27T14:01:23Z post118378: Re: Support for Intel Bay-Trail (E3800) http://community.qnx.com/sf/go/post118378 > Hi, May I know the Intel E3800 is supported in QNX 6.5? If not, when can I > expect a BSP for it? Thanks. I would like to renew that question .... is the Intel E3800 SoC supported now? As anounced 5 years bevore ... Armin Mon, 15 Jan 2018 10:07:49 GMT http://community.qnx.com/sf/go/post118378 Armin Steinhoff(deleted) 2018-01-15T10:07:49Z post118377: QNX screen wont start http://community.qnx.com/sf/go/post118377 Hi, I have installed this http://www.qnx.com/developers/articles/rel_5948_26.html update to QNX 6.6 and copied all the files to my vmware target. First i start gpu_drv and after I try to start screen -> # screen libEGL warning: no gpu support, using mesa llvm pipe unknown symbol: _ZNKSt12_String_base5_XlenEv referenced from libllvmpipe_drv.so unknown symbol: _ZNKSt12_String_base5_XranEv referenced from libllvmpipe_drv.so libEGL warning: failed to create a pipe screen for llvmpipe Memory fault (core dumped) I have selected "Accelerate 3D Graphics" from my image.. Is there anyone who has any good guess? The screen worked before this update... Mon, 15 Jan 2018 07:39:52 GMT http://community.qnx.com/sf/go/post118377 Jani Wallden(deleted) 2018-01-15T07:39:52Z post118375: Re: QNX 7 configuration for NFS, NIS, NTP and SSH http://community.qnx.com/sf/go/post118375 Thank you, Albrecht! I am doing that and it helps to make it more portable, which was one of my intentions. Thanks for the help :) Victor. Sat, 13 Jan 2018 06:08:35 GMT http://community.qnx.com/sf/go/post118375 Victor Gomez(deleted) 2018-01-13T06:08:35Z post118350: Re: QNX Architecture and drivers -reg http://community.qnx.com/sf/go/post118350 There is only one runtime environment for QNX which handles resource manager framework, libc, memory allocator etc. The BSP is just a specific way of packaging things together in a single source tree and have the binaries installed in the "install" folder tree for convenience. The only difference would be if you need to handle memory allocations inside the startup program - that is, before/while QNX boots. As long as you write a resource manager that is run after procnto is up and running you are free to choose the project type. To your second question, I'm not an expert on that but to best of my belief under QNX 6.x you could not explicitly control that. From a programmer's point of view, memory is broken down into 4K pages - that's it. It might be different under QNX 7 because the memory allocator has been reworked there. Regards, Al Tue, 09 Jan 2018 13:02:20 GMT http://community.qnx.com/sf/go/post118350 Albrecht Uhlmann 2018-01-09T13:02:20Z post118349: Re: QNX Architecture and drivers -reg http://community.qnx.com/sf/go/post118349 Hi Nicola, Query is not how to build the QNX or writing device drivers. Looking for differences as stated in my previous mail. Please advice on that. Thanks Umamahesh ________________________________ From: Nicola Vulpe <community-noreply@qnx.com> Sent: 09 January 2018 00:37:12 To: general-community@community.qnx.com Subject: Re: QNX Architecture and drivers -reg Hello UmaMahesh, Have you had a look at the following documentation? Building Embedded Systems: https://apac01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.qnx.com%2Fdevelopers%2Fdocs%2F7.0.0%2F%23com.qnx.doc.neutrino.building%2Ftopic%2Fabout.html&data=02%7C01%7Cumamahesh.y%40hcl.com%7C66c2aa3e79bc411eceec08d556cb0ec7%7C189de737c93a4f5a8b686f4ca9941912%7C0%7C1%7C636510353294275411&sdata=6hLUz8fslvNikqeKgp3OWyOfmsJXv3PWjo4JS8Ak%2F%2F8%3D&reserved=0 The chapter “Working with BSPs” may be of particular interest. Writing a Resource Manager: https://apac01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.qnx.com%2Fdevelopers%2Fdocs%2F7.0.0%2F%23com.qnx.doc.neutrino.resmgr%2Ftopic%2Fabout.html&data=02%7C01%7Cumamahesh.y%40hcl.com%7C66c2aa3e79bc411eceec08d556cb0ec7%7C189de737c93a4f5a8b686f4ca9941912%7C0%7C1%7C636510353294275411&sdata=%2Fj4w0MEJjUnqI6%2BuaJqa%2FTNfmoPbVO8gk%2BjzYwkYGg4%3D&reserved=0 Nicola From: Umamahesh Yelchuruvenkata <community-noreply@qnx.com<mailto:community-noreply@qnx.com>> Reply-To: "general-community@community.qnx.com<mailto:general-community@community.qnx.com>" <general-community@community.qnx.com<mailto:general-community@community.qnx.com>> Date: Monday, January 8, 2018 at 13:58 To: "general-community@community.qnx.com<mailto:general-community@community.qnx.com>" <general-community@community.qnx.com<mailto:general-community@community.qnx.com>> Subject: QNX Architecture and drivers -reg Hi I wanted to know the difference between writing drivers/ resource manager within BSP and external to BSP. And difference in memory allocations for resource manager within BSP and external to BSP. How can we allocate huge memory allocation for QNX drivers like huge tlbs used in Linux. Please provide suggestions. Thanks UmaMahesh ::DISCLAIMER:: -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- The contents of this e-mail and any attachment(s) are confidential and intended for the named recipient(s) only. E-mail transmission is not guaranteed to be secure or error-free as information could be intercepted, corrupted, lost, destroyed, arrive late or incomplete, or may contain viruses in transmission. The e mail and its contents (with or without referred errors) shall therefore not attach any liability on the originator or HCL or its affiliates. Views or opinions, if any, presented in this email are solely those of the author and may not necessarily reflect the views or opinions of HCL or its affiliates. Any form of reproduction, dissemination, copying, disclosure, modification, distribution and / or publication of this message without the prior written consent of authorized representative of HCL is strictly prohibited. If you have received this email in error please delete it and notify the sender immediately. Before opening any email and/or attachments, please check them for viruses and other defects. -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- _______________________________________________ General https://apac01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fcommunity.qnx.com%2Fsf%2Fgo%2Fpost118348&data=02%7C01%7Cumamahesh.y%40hcl.com%7C66c2aa3e79bc411eceec08d556cb0ec7%7C189de737c93a4f5a8b686f4ca9941912%7C0%7C0%7C636510353294275411&sdata=IjbIf3sjrdBSnXyMjNauHiwHwfRz27RdERlunQex5rw%3D&reserved=0 To cancel your subscription to this discussion, please e-mail general-community-unsubscribe@community.qnx.com Tue, 09 Jan 2018 07:36:24 GMT http://community.qnx.com/sf/go/post118349 Umamahesh Yelchuru Venkata 2018-01-09T07:36:24Z post118348: Re: QNX Architecture and drivers -reg http://community.qnx.com/sf/go/post118348 Hello UmaMahesh, Have you had a look at the following documentation? Building Embedded Systems: http://www.qnx.com/developers/docs/7.0.0/#com.qnx.doc.neutrino.building/topic/about.html The chapter “Working with BSPs” may be of particular interest. Writing a Resource Manager: http://www.qnx.com/developers/docs/7.0.0/#com.qnx.doc.neutrino.resmgr/topic/about.html Nicola From: Umamahesh Yelchuruvenkata <community-noreply@qnx.com<mailto:community-noreply@qnx.com>> Reply-To: "general-community@community.qnx.com<mailto:general-community@community.qnx.com>" <general-community@community.qnx.com<mailto:general-community@community.qnx.com>> Date: Monday, January 8, 2018 at 13:58 To: "general-community@community.qnx.com<mailto:general-community@community.qnx.com>" <general-community@community.qnx.com<mailto:general-community@community.qnx.com>> Subject: QNX Architecture and drivers -reg Hi I wanted to know the difference between writing drivers/ resource manager within BSP and external to BSP. And difference in memory allocations for resource manager within BSP and external to BSP. How can we allocate huge memory allocation for QNX drivers like huge tlbs used in Linux. Please provide suggestions. Thanks UmaMahesh ::DISCLAIMER:: -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- The contents of this e-mail and any attachment(s) are confidential and intended for the named recipient(s) only. E-mail transmission is not guaranteed to be secure or error-free as information could be intercepted, corrupted, lost, destroyed, arrive late or incomplete, or may contain viruses in transmission. The e mail and its contents (with or without referred errors) shall therefore not attach any liability on the originator or HCL or its affiliates. Views or opinions, if any, presented in this email are solely those of the author and may not necessarily reflect the views or opinions of HCL or its affiliates. Any form of reproduction, dissemination, copying, disclosure, modification, distribution and / or publication of this message without the prior written consent of authorized representative of HCL is strictly prohibited. If you have received this email in error please delete it and notify the sender immediately. Before opening any email and/or attachments, please check them for viruses and other defects. -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- Mon, 08 Jan 2018 19:28:24 GMT http://community.qnx.com/sf/go/post118348 Nicola Vulpe 2018-01-08T19:28:24Z post118347: QNX Architecture and drivers -reg http://community.qnx.com/sf/go/post118347 Hi I wanted to know the difference between writing drivers/ resource manager within BSP and external to BSP. And difference in memory allocations for resource manager within BSP and external to BSP. How can we allocate huge memory allocation for QNX drivers like huge tlbs used in Linux. Please provide suggestions. Thanks UmaMahesh ::DISCLAIMER:: -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- The contents of this e-mail and any attachment(s) are confidential and intended for the named recipient(s) only. E-mail transmission is not guaranteed to be secure or error-free as information could be intercepted, corrupted, lost, destroyed, arrive late or incomplete, or may contain viruses in transmission. The e mail and its contents (with or without referred errors) shall therefore not attach any liability on the originator or HCL or its affiliates. Views or opinions, if any, presented in this email are solely those of the author and may not necessarily reflect the views or opinions of HCL or its affiliates. Any form of reproduction, dissemination, copying, disclosure, modification, distribution and / or publication of this message without the prior written consent of authorized representative of HCL is strictly prohibited. If you have received this email in error please delete it and notify the sender immediately. Before opening any email and/or attachments, please check them for viruses and other defects. -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- Mon, 08 Jan 2018 19:19:44 GMT http://community.qnx.com/sf/go/post118347 Umamahesh Yelchuru Venkata 2018-01-08T19:19:44Z post118306: Re: QNX 7 configuration for NFS, NIS, NTP and SSH http://community.qnx.com/sf/go/post118306 Victor, You might want to put in just the name of the .so file WITHOUT the exact version number (e.g. simply type libc.so). The mkifs tool would then grab the one that is linked in your SDP installation (libc.so is always there, being a symlink to libc.so.3 under QNX 6.5 but libc.so.4 in QNX 7). mkifs will then create the correct library file (libc.so.4 in your case) in the image itself, together with libc.so as a symlink to it. That should make your build files a little more portable. Apart from that, I don't know other tricks than searching the /lib and /usr/lib folders of the SDP installation. Regards, Al Tue, 02 Jan 2018 18:03:26 GMT http://community.qnx.com/sf/go/post118306 Albrecht Uhlmann 2018-01-02T18:03:26Z post118304: Re: QNX 7 configuration for NFS, NIS, NTP and SSH http://community.qnx.com/sf/go/post118304 Thank you, Albrecht! I figured we would need to update those libraries. It is just not easy to find out which version do we need for all of them (not just the one I posted, but many more). What's the best QNX doc to find that out? I cannot find the one with this info. Thanks! Victor. Tue, 02 Jan 2018 17:55:36 GMT http://community.qnx.com/sf/go/post118304 Victor Gomez(deleted) 2018-01-02T17:55:36Z post118302: Re: Not able to change MAC of network interface using ioctl calls in QNX 6.6 http://community.qnx.com/sf/go/post118302 Which driver are you using? Thanks, Hugh. On 2017-12-29, 6:56 AM, "Giji G" <community-noreply@qnx.com> wrote: I am trying to change the MAC address of a network interface using ioctl() api in my program, but it always returns error 103 (Operation not supported). I am able to change it through the shell using command "ifconfig eth1 link 00:50:56:2e:88:1a active". I want to do the same using system APIs, but it gives error. Below is the code snippet, please suggest any other way to do the same struct ifaliasreq addreq; memset(&addreq, 0, sizeof(addreq)); strcpy(addreq.ifra_name, "eth1"); addreq.ifra_addr.sa_family = AF_LINK; bcopy(mac, addreq.ifra_addr.sa_data, 6); ioctl(s, SIOCAIFADDR, &addreq); _______________________________________________ General http://community.qnx.com/sf/go/post118297 To cancel your subscription to this discussion, please e-mail general-community-unsubscribe@community.qnx.com Tue, 02 Jan 2018 14:09:57 GMT http://community.qnx.com/sf/go/post118302 Hugh Brown 2018-01-02T14:09:57Z post118300: Re: QNX 7 configuration for NFS, NIS, NTP and SSH http://community.qnx.com/sf/go/post118300 Hi Victor, I haven't looked at this in detail but we experienced that QNX 7 is A LOT more strict about security. So just having the wrong file permissions on a single file may cause it to refuse to log you in, and so on. The error messages are very obscure in these cases, if you get any at all (which is of course alright because if it told you what was wrong this would make it much easier for an intruder to succeed). One thing I noticed is that you refer to libc.so.3 but in QNX7 really this should be libc.so.4. Version numbers of some other shared objects have changed as well. It would be helpful if you could be more precise in what is actually not working. Maybe paste some console outputs ... Regards, Al Tue, 02 Jan 2018 10:30:02 GMT http://community.qnx.com/sf/go/post118300 Albrecht Uhlmann 2018-01-02T10:30:02Z post118297: Not able to change MAC of network interface using ioctl calls in QNX 6.6 http://community.qnx.com/sf/go/post118297 I am trying to change the MAC address of a network interface using ioctl() api in my program, but it always returns error 103 (Operation not supported). I am able to change it through the shell using command "ifconfig eth1 link 00:50:56:2e:88:1a active". I want to do the same using system APIs, but it gives error. Below is the code snippet, please suggest any other way to do the same struct ifaliasreq addreq; memset(&addreq, 0, sizeof(addreq)); strcpy(addreq.ifra_name, "eth1"); addreq.ifra_addr.sa_family = AF_LINK; bcopy(mac, addreq.ifra_addr.sa_data, 6); ioctl(s, SIOCAIFADDR, &addreq); Fri, 29 Dec 2017 12:17:50 GMT http://community.qnx.com/sf/go/post118297 Giji G(deleted) 2017-12-29T12:17:50Z