Feed for discussion OSTech in project QNX Operating System.

post122733: Re: UEFI Framebuffer console

2026-09-04T13:55:31Z

Hi Elad,

> I've had a UEFI framebuffer console for a while now. I can ask the relevant

> people about releasing it publicly.

Wow, this stuff is missing since QNX 7.0.

> The only problem is that it also requires

> a new startup binary that exposes the framebuffer.

We already expose the UEFI GOP stuff to the syspage (asinfo).

Perhaps you could tell us, what your devc driver likes to see in the syspage.

Thanks

Michael

post122732: Re: UEFI Framebuffer console

2026-09-04T12:47:03Z

Reddit: https://www.reddit.com/r/QNX/ (just need a Reddit profile)

Discord: https://discord.com/invite/Jj4EkkrFTT

--Elad

post122731: Re: UEFI Framebuffer console

2026-09-04T12:43:24Z

Hi Elad, can you point us to the new Reddit/Discord chats/forums? How to access credentials?

--Albrecht

post122730: Re: UEFI Framebuffer console

2026-09-04T12:00:43Z

I've had a UEFI framebuffer console for a while now. I can ask the relevant people about releasing it publicly. The only problem is that it also requires a new startup binary that exposes the framebuffer.

--Elad

P.S.,

Moving forward, it's likely better to use Reddit or Discord for these questions - I doubt many people monitor these forums.

post122729: Re: UEFI Framebuffer console

2026-09-04T07:52:29Z

Hello all,

We would also be much interested in having something like "devc-con-uefi-hid".

Maybe QNX could initiate an open source project in the QNX Github repo and fill it initially, and people can then contribute and fork it as needed.

Regards,

Albrecht

post122728: UEFI Framebuffer console

2026-09-03T10:22:06Z

Hi all,

there is still not console driver, replacing devc-con-hid, if we boot an x86_64 target with UEFI.

Are there any plans or work in progress?

Thanks

Michael

post122720: Re: QNX 8.0.4 x86_64 platform "Haswell" system timer delay

2026-05-05T17:21:44Z

Additionally, the same machine running QNX 6.6 does not expose this issue. The reported clock cycle is 2,494,419,700, which is close to the experimental fix value I am testing under QNX 8.0 (2,494,222,800) with very slow time discrepancy (1 second per day)

post122719: Re: QNX 8.0.4 x86_64 platform "Haswell" system timer delay

2026-05-05T17:16:12Z

Can you share your lab startup-x86_64 (64-bit) so I can test it on our machine?

post122718: Re: QNX 8.0.4 x86_64 platform "Haswell" system timer delay

2026-05-05T15:55:17Z

Thanks, I was looking to see if that cpu had any *special* handling; it is pretty generic.

We have several similar machines in our lab which do not exhibit this behaviour.

post122717: Re: QNX 8.0.4 x86_64 platform "Haswell" system timer delay

2026-05-01T22:28:41Z

Correction:

MSR_PLATFORM_INFO: 0x000803df3011900, TSC multiplier: 25

LAPIC on CPU 0 (ID=0x00000000) selected for system clock on IRQ 0x80010000

post122716: Re: QNX 8.0.4 x86_64 platform "Haswell" system timer delay

2026-05-01T22:22:15Z

It does not produce the same value on each boot. For example:

0x95031584 = 2,500,007,300

0x95031c8b = 2,500,009,099

0x95024de8 = 2,499,956,200

0x95031f47 = 2,500,009,799

Based on empirical observation, the value that appears to be sufficiently accurate to keep time aligned with the wall clock is: 2494076850.

post122715: Re: QNX 8.0.4 x86_64 platform "Haswell" system timer delay

2026-05-01T22:17:50Z

Stephen, here you go :

non UEFI or UEFI+CSM boot

Hypervisor support disabled

Added /memory/lapic

pci_find_class() returned D31:F0

Added 1 IOAPIC from ACPI tables

Base CPU interrupt for APIC is 48

lapic_configure(cpu=0), lapic_id: 0x00000000

Intel IOAPIC config

Found 1 IOAPIC's.

configuring IOAPIC id:8

Autofill: 16 of requested 40 entries available for profile 6

Restored IOAPIC B:D:F to 0:31:0 from 240:31:0

IOAPIC 8: successfully configured 40 vectors from 0 to 39

MSI interrupt = 0x00000100

MSI vector no = 94 0x0000005e

MSI vec count = 161

CPU Family/Model: 0x00000006/0x00000045

MSR_PLATFORM_INFO: 0x000803df3011900, TSC multiplier: 25

LAPIC on CPU 0 (ID=0x00000000) selected for system clock on IRQ 0x00010000

**Checking smp_hwcoreid for cpu 0

found ACPI reset reg addr/value of 00000000000cf9/00000006

using reset reg addr/value of 00000000000cf9/00000006

Loading IFS...decompressing...done

apic_smp_start(1), CPU 0, cep->smp_hwcoreid = 0x00000000

apic_smp_start(1), CPU 1, cep->smp_hwcoreid = 0x00000002

apic_smp_start(1), CPU 2, cep->smp_hwcoreid = 0x00000001

apic_smp_start(1), CPU 3, cep->smp_hwcoreid = 0x00000003

No low memory for AP start-up; using bootloader

apstart_init(0000000000000680, 00000000004018c43) [size=0x000000b6]

**Checking smp_hwcoreid for cpu 1

lapic_configure(cpu=1), lapic_id: 0x00000002

**Checking smp_hwcoreid for cpu 2

lapic_configure(cpu=2), lapic_id: 0x00000001

**Checking smp_hwcoreid for cpu 3

lapic_configure(cpu=3), lapic_id: 0x00000003

System page at phys:00000000001c000 user:fffff808000003000 kern:fffff808000007000

Starting next program at vffff80800004609e

overriding mask for controller 2, vector_base 0

Exar's devc-xrserpcie QNX-module ver 0.2 - x86_64-bits

16 Exar ports found.

post122714: Re: QNX 8.0.4 x86_64 platform "Haswell" system timer delay

2026-05-01T21:29:33Z

Can you post the output of `startup -v` please ?

post122713: Re: QNX 8.0.4 x86_64 platform "Haswell" system timer delay

2026-05-01T10:24:23Z

Yes, I am aware of what it does. What I am saying is that you can find empirically a correct value for your board and pass it with the -f function to startup. It would be interesting to know why that value is not what the calibration loop comes up with.

By the way, does it produce the same value on every boot?

--Elad

post122712: Re: QNX 8.0.4 x86_64 platform "Haswell" system timer delay

2026-05-01T01:49:40Z

The calibration is executed as part of the startup sequence, prior to kernel initialization. The code snippet below shows the implementation. That is part of QNX 8.0 BSP.

/**

* Calibrate the frequency of TSC in Hz, using the default timer

* @return TSC cycles per second (Hz)

*/

uint64_t calibrate_tsc(unsigned long ns)

{

unsigned long ticks;

unsigned start_tick;

uint64_t init_diff;

uint64_t tick_diff;

uint64_t start_tsc;

uint64_t end_tsc;

uint64_t elapsed_time_nano;

uint64_t cycles_per_sec;

unsigned factor;

unsigned scale_factor;

ticks = timer_ns2tick(ns);

start_tick = timer_start();

/* preparation: wait for the beginning of a tick to sync with rdtsc */

do {

init_diff = timer_diff(start_tick);

} while (init_diff == 0);

ticks += init_diff;

/* actual benchmark */

rdtsc_ordered(&start_tsc);

__asm__ __volatile__ (".align 16");

do {

tick_diff = timer_diff(start_tick);

} while (tick_diff < ticks);

rdtsc_ordered(&end_tsc);

/* calculation based on end_tsc, start_tsc and tick_diff */

tick_diff -= init_diff; /* init_diff is measured prior to the beginning of benchmark */

/* Please, refer to [A Note About Using qtime::timer_rate And qtime::timer_scale]

* in services/system/doc/clock.txt and services/system/ker/nano_clock.c:clock_start()

* and jiffy_to_ns() for the detail

*/

    if (lsp.qtime.p->timer_scale < NANO_SCALE) {

        factor = (unsigned)(NANO_SCALE - lsp.qtime.p->timer_scale);

    } else {

        factor = (unsigned)(lsp.qtime.p->timer_scale - NANO_SCALE);

    }

    scale_factor = 1;

    while (factor != 0) {

        scale_factor *= 10;

        --factor;

    }

if (lsp.qtime.p->timer_scale < NANO_SCALE) { /* e.g. if nano_conversion_scale is -6, it means 'timer_scale' is femto */

elapsed_time_nano = ((tick_diff * (lsp.qtime.p->timer_period)) + (scale_factor >> 1)) / scale_factor; /* to nanoseconds */

} else { /* e.g if nano_conversion_scale is 3, it means 'timer_scale' is micro */

elapsed_time_nano = (tick_diff * (lsp.qtime.p->timer_period)) * scale_factor; /* to nanoseconds */

}

cycles_per_sec = ((end_tsc - start_tsc) * 1000000000) / elapsed_time_nano;

return cycles_per_sec;

}

post122711: Re: QNX 8.0.4 x86_64 platform "Haswell" system timer delay

2026-04-30T10:33:07Z

I meant set a better value for this board in startup. See set_cycles_per_sec() in the startup library. You can specify a different value from the startup command line with the -f option, and also look into why calibration doesn't produce a value that's correct for the board.

--Elad

post122710: Re: QNX 8.0.4 x86_64 platform "Haswell" system timer delay

2026-04-30T02:29:25Z

Thank you for your comments. The target platform is an Advantech SOM‑6884 COM Express module based on an Intel® Core™ i7 processor. Given this hardware configuration, I do not believe that any practical clock‑rate “adjustment” or correction is possible after the startup initialization phase. Once the system has completed early boot and the timer source has been selected, there appears to be no viable mechanism to compensate for the observed time drift at runtime.

Janusz

post122709: Re: QNX 8.0.4 x86_64 platform "Haswell" system timer delay

2026-04-30T02:12:31Z

QNX 8 requires a per-processor timer. On x86 this is the LAPIC timer - there is no other choice.

This drift is indeed significant - is it a simple matter of adjusting the value of cycles per second to match this particular board?

--Elad

post122708: QNX 8.0.4 x86_64 platform "Haswell" system timer delay

2026-04-30T01:05:12Z

The QNX 8.0.4 Intel BSP startup code is configured to use the LAPIC timer. HPET is disabled, and the legacy 8254 timer is not used. We are observing significant system time drift under this configuration. For example, the system clock falls behind by approximately -2.52 seconds over a 15-minute period.

We would appreciate any comments, recommended solutions, or information about known issues or limitations in the QNX implementation related to LAPIC timer usage.

Regards,

Janusz

post122698: Software bill of materials (SBOM) question

2025-11-27T15:56:14Z

I am working on a software bill of materials project for an automotive ECU that uses a QNX operating system.

Does QNX publish, or make available upon request, a mapping between its internal package identifiers and the name, version, and upstream source for open source software components?

For example, the QNX 7.0 SDP offers an OpenSSL package. The name and QNX version are: QNX® SDP 7.0 Networking - OpenSSL / 7.0 BuildID 5426 - September 24, 2019. The one I happen to be looking at has a package ID of com.qnx.sdp.target.net.openssl/7.0.5426.S201909241315. I can find approximate versions of OpenSSL by digging through the provided release notes at https://www.qnx.com/developers/articles/rel_6726_0.html. I might also be able to fish out more specific version information by looking at strings in the OpenSSL shared libraries, but this is labor-intensive and error prone.

Is there a way for me to get a simple mapping of QNX package ID --> OSS project name / upstream source / upstream version from QNX?

Karl

post122695: Re: Tracking dynamic memory allocation for a given process

2025-10-29T14:45:56Z

The problem with only looking at heap functions is that this actually misses the case of dynamic memory allocations that don't use the C library heap. Any code can invoke mmap() and get more memory to manage outside the primary heap.

It is not clear what safety requirement the original question pertains to. Is it really trying to lock the memory usage of the process, or is it trying to avoid standard library calls to the heap?

--Elad

post122694: Re: Tracking dynamic memory allocation for a given process

2025-10-29T14:39:15Z

You would need own implementations of all heap-related functions (malloc, realloc, free, strdup, ...) in a dedicated shared object, that you then LD_PRELOAD. This should capture all heap operations, even from external libs - as long as they are not statically linked against libc.

This is how the memory analysis tools work.

Besides, even the standard heap allocator does have some instrumentation, maybe this is already sufficient, it must be possible to read that from inside via mallopt(). (is that still available in QNX 8?)

Regards,

Albrecht

post122693: Re: Tracking dynamic memory allocation for a given process

2025-10-29T14:38:58Z

stubs in your own code, or stubs in a preload library that is loaded by LD_PRELOAD?

Even calls from other libraries will use the stubs in a preload library.

https://www.qnx.com/developers/docs/8.0/com.qnx.doc.neutrino.sys_arch/topic/dll_SYMBOLNAME.html

post122692: Re: Tracking dynamic memory allocation for a given process

2025-10-29T14:28:20Z

Yes, we thought about using stubs to "disable" malloc operations after the end of our application initialization, but we 're using other libraries which may also allocate memory...

Thanks anyway.

Regards.

Jean-Michel

post122691: Re: Tracking dynamic memory allocation for a given process

2025-10-29T14:13:38Z

> For example, if my process allocates some memory after the end of its

> initialization phase, the OS can potentially use the remaining unused memory

> in mapped pages, without having to map a new memory page.

> And, in this specific case, parsing "as_stats.rss" field will not indicate

> that memory has been allocated after the init phase end.

If you want to say that a malloc() or free() call will not necessarily change the number of mapped pages, you are right.

What about a preload library with stubs for malloc() and free().

You could count them and check then number by dumping them in a signal handler.

Maybe you can also reset the counters in a signal handler after the init phase and check if new calls are made later.

Not sure however, if this is an acceptable approach for your certification process.

post122690: Re: Tracking dynamic memory allocation for a given process

2025-10-29T13:07:37Z

> Hello,

>

> OK, sorry. Let me try to clarify my question:

>

> First, I'm using QNX 8.0.

> For a certification process, I need to prove that a given program won't

> allocate any more memory after a given point: So, no more malloc() or

> equivalent after a given point (End of initialization phase).

> Analyzing the code by code review could be an option, but I wanted to automate

>  this par inspecting this program from an external C application.

As I wrote, I don't believe that can work.

> I wrote a C routine which parses the  "as_stats.rss" field from "/proc/%d/

> vmstat" file.

> This returns me the numbers of pages mapped by the process, and I could

> multiply rss * _SC_PAGESIZE to obtain the size of the memory mapped by the

> process.

> But what I would really need is the size of the memory currently used by the

> process.

There is no distinction from the POV of the OS between "mapped" and "in use"  (with the exception of lazy mapping, which I think you're not talking about, and which we currently don't support in QNX 8) by a process. Also, mappings happen on per-page basis, you can't go smaller than that.

> For example, if my process allocates some memory after the end of its

> initialization phase, the OS can potentially use the remaining unused memory

> in mapped pages, without having to map a new memory page.

This doesn't make much sense to me, sorry. Perhaps other can follow better.

> And, in this specific case, parsing "as_stats.rss" field will not indicate

> that memory has been allocated after the init phase end.

>

> Hoping this is clearer now.

erm... not really (to me at least)

Michael

>

> Thanks.

> Regards

> Jean-Michel

post122689: Re: Tracking dynamic memory allocation for a given process

2025-10-29T12:41:47Z

Hello,

OK, sorry. Let me try to clarify my question:

First, I'm using QNX 8.0.

For a certification process, I need to prove that a given program won't allocate any more memory after a given point: So, no more malloc() or equivalent after a given point (End of initialization phase).

Analyzing the code by code review could be an option, but I wanted to automate this par inspecting this program from an external C application.

I wrote a C routine which parses the "as_stats.rss" field from "/proc/%d/vmstat" file.

This returns me the numbers of pages mapped by the process, and I could multiply rss * _SC_PAGESIZE to obtain the size of the memory mapped by the process.

But what I would really need is the size of the memory currently used by the process.

For example, if my process allocates some memory after the end of its initialization phase, the OS can potentially use the remaining unused memory in mapped pages, without having to map a new memory page.

And, in this specific case, parsing "as_stats.rss" field will not indicate that memory has been allocated after the init phase end.

Hoping this is clearer now.

Thanks.

Regards

Jean-Michel

post122688: Re: Tracking dynamic memory allocation for a given process

2025-10-29T09:08:26Z

and are you aiming to verify from within the process or by looking externally at a process?

post122687: Re: Tracking dynamic memory allocation for a given process

2025-10-29T09:05:21Z

Which version of QNX, 7.1 or 8.0?

post122686: Re: Tracking dynamic memory allocation for a given process

2025-10-29T05:50:05Z

> Hello,

>

> I'm looking for a way to verify that a given process no longer allocates

> memory after having completed its initialization phase.

What problem are you trying to solve?

IMO, the only way you can be even moderately sure that a given program won't allocate any more memory after a given point is to analyse the code ... just observing its allocation pattern from "outside" says nothing about future behaviour.

Having said that, in addition to what Elad wrote, you can use /proc/PID/pmap to find out what process with pid PID has mapped *at that instant*, and even do diffs between consecutive runs, but as I said above, that's no guarantee.

You can read that data like any text file, but since it's a pseudo-file generated by the system on the fly, you need to close and reopen it for consecutive runs.

HTH

Michael

post122685: Re: Tracking dynamic memory allocation for a given process

2025-10-28T23:57:31Z

From the system's point of view. the number of pages used by the process is the amount of memory allocated (there are subtleties, like accounting for shared mappings). It's not clear what metric you are looking for.

--Elad

post122684: Tracking dynamic memory allocation for a given process

2025-10-28T15:33:33Z

Hello,

I'm looking for a way to verify that a given process no longer allocates memory after having completed its initialization phase.

So I need a piece of C code to read the current memory allocated by a given process.

What would be the best option to implement this?

I see that "/proc/%d/vmstat" could be parsed, but it seems to me that it provides number of mapped pages, while I would need the exact allocated memory size.

Any idea?

Thanks.

post122679: Re: QNX 8 : ClockPeriod() can no longer be used to set clock period

2025-09-11T07:17:52Z

Hi all,

just played around with the high resolution  timers.

With explicit timers  it is working, as expected. e.g.:

SIGEV_UNBLOCK_INIT(&sigEvent);

id = TimerCreate(.... &sigEvent);

time_in.nsec = 1;

time_in.interval_nsec =0;

TimerSetTime(...TIMER_TOLERANCE....);

time_in.nsec = 10000000;  // 10 ms

time_in.interval_nsec = 0;

TimerSetTime(...TIMER_PRECISE....);

sleep( VERY_LONG);

We wake up after 10 ms  with a tolerance  of  around 14 ...20 us  on an Ultrascale+ CPU;

Perfect.

My simple approach with an implicit timer does not use the  high resolution at all. e.g.:

nsTime = 1;

rc = TimerTimeout( CLOCK_MONOTONIC,   TIMER_TOLERANCE,   NULL,   &nsTime,  NULL );

nsTime  = 10000000;  //10 ms

rc =  TimerTimeout( CLOCK_MONOTONIC,   _NTO_TIMEOUT_NANOSLEEP | TIMER_PRECISE,   NULL,   &nsTime,    NULL );

We wake up after 10 ms + 1 * ticksize;

I s  this a know issue?

--  Michael

> Default timers are still tick-aligned, to avoid excessive interrupts. Even

> though there is no tick per se, the timer hardware is configured to the next

> expiration time rounded up to what would be the next tick value (1ms by

> default). You can use high-resolution timers if you really need that, at the

> expense of extra interrupts in the system.

>

> --Elad

post122677: Re: QNX 8.0.2 Intel x86_64 haswell drm-intel buffer mapping to the user space

2025-07-31T08:40:13Z

Hi Michael,

Thank you very much for a comment. That was exactly what i was missing.

Janusz

post122676: Re: QNX 8.0.2 Intel x86_64 haswell drm-intel buffer mapping to the user space

2025-07-30T13:48:22Z

Hi,

as far as I remember, the drm_mmap() of the QNX port  calls mmap directly.

Do not use it. Change your code, like this:

ret = drmIoctl(bo->fd, DRM_IOCTL_MODE_MAP_DUMB, &arg);

  if (ret)

          return ret;

#ifdef __QNXNTO__

        map = arg.cvaddr;

#else

        map = drm_mmap(0, bo->size, PROT_READ | PROT_WRITE, MAP_SHARED,

                       bo->fd, arg.offset);

#endif

-Michael

post122675: Re: QNX 8.0.2 Intel x86_64 haswell drm-intel buffer mapping to the user space

2025-07-30T10:24:19Z

I ran into the same issue when trying to use X11 with intel-drm. From what I know (and I'm not an expert on the subject), the QNX port of intel-drm is incomplete, and is (consciously) only sufficient for servicing Screen. If you try to use it as though it is a complete port you can run into unimplemented parts, such as the direct mmap() assertion.

--Elad

post122674: Re: QNX 8.0.2 Intel x86_64 haswell drm-intel buffer mapping to the user space

2025-07-30T09:54:59Z

Hi,

looks like, you are trying to mmap directly against the file descriptor, opened against the drm-intel server.

The last drm-intel source code, I saw, simply calls abort(); if you try that.

Would be interesting to see, what your test program is trying to do.

Do you really use the normal drm API, provided by libdrm.so?

-Michael

post122673: QNX 8.0.2 Intel x86_64 haswell drm-intel buffer mapping to the user space

2025-07-29T23:27:30Z

I am writing a short test program to connect to the drm-intel server and finding that the server is crashing with the error :

[errno:3 @ io_mmap():1418] mmap() is called for DRM process directly, aborting execution!

after trying to map the frame buffer to the user space.

The test sequence of drm calls to to created the buffer is per DRM spec.

Any comments from the group would be appreciated. The test source code could be provided if needed.

Regards,

Janusz

post122672: Re: lighttpd 1.4.79 on QNX throws write() 8: Resource deadlock avoided

2025-07-01T17:44:55Z

procnto is not a command - it's the kernel executable. Do you build your own image? If so, in the build file for the image file system (IFS) there is a line near the top that has procnto-smp-instr (or whatever variant of procnto-* your system uses). You add -mL and rebuild the image.

Any reason you need to use such an old version of QNX?

--Elad

post122671: Re: lighttpd 1.4.79 on QNX throws write() 8: Resource deadlock avoided

2025-07-01T16:13:35Z

My QNX version is 7.0.4.

Unfortunately, the procnto command is not available on my system.

post122670: Re: lighttpd 1.4.79 on QNX throws write() 8: Resource deadlock avoided

2025-07-01T15:24:19Z

What version of QNX are you using? If this is 7.x, try turning on superlocking (-mL on the procnto command-line). The EDEADLK on mmap() can be the result of a circular dependency, where a page fault occurs on a message pass to a server, and the server is also the one that has to handle the page fault. There are ways to avoid this, but it can get quite subtle.

Note that 8.0 does not support recoverable page faults at all, so you should not see this behaviour. If you still do, then this may be a different issue.

--Elad

post122669: lighttpd 1.4.79 on QNX throws write() 8: Resource deadlock avoided

2025-07-01T13:53:53Z

I was trying to deploy my JavaScript web application using lighttpd on my embedded system with QNX and noticed that my 1 M of .chunk.js, which should be called and get rendered by index.html would only get transferred 307kB in network in devtools.

There was also an error message, "CONTENT_LENGTH_MISMATCH." As a result, my webpage would not get rendered properly and show a blank page. Refreshing constantly over 10 times would finally get me to the webpage.

So, I checked the lighttpd_error.log and it says "write() 8: Resourced deadlock avoided."

I tried different ways to resolve this issue, but no luck.

so, I reached out to lighttpd support and gstrauss helped me resolve this issue.

He suggested two different ways:

1. disabling MMAP

2. recompile version 1.4.73 (QNX lighttpd upstream.)

Luckily, disable MMAP resolved this issue.

What gstrauss wonders is why mmap() is returning EDEADLK and if there was some alignment restriction on QNX that lighttpd was not applying properly on QNX.

He also thinks that the behavior I've seen might come from the commit you made here: https://git.lighttpd.net/lighttpd/lighttpd1.4/commit/7d2c009bb1310933d56f20b2c86fe8c24d3f5195

He will be adding this fix to the next lighttpd release.

Here is the link to the chat on lighttpd support regarding this issue:

https://redmine.lighttpd.net/boards/2/topics/11987?r=12007

post122667: How to load our lsm packet filtering module to io-sock?

2025-06-26T11:53:34Z

In QNX7.0 and 7.1, the network arch is base on io-pkt and we can implement our lsm pf module to io-pkt to accept or drop network packets.

Currently, we would like to migrate to QNX 7.1/8.0 io-sock arch, but from the development doc, I can't find the way or any interface description about how to load my lsm pf module to io-sock.

Is there anyone know how to do this?

Thanks.

post122665: Re: TraceEvent got permission denied during trace buffer allocation (QNX 8.0)

2025-06-17T06:54:29Z

Thank you for your reply!!

I have finally integrate the TraceEvent() on QNX 8.0 successfully!

For more people can reference, here is the summary of the total change from 7.0 to 8.0:

- **Proactive Tracing**: Registration of the trace event process with the kernel is required using `_NTO_TRACE_LOGGER_ATTACH`.

  - IO and interrupt privileges are no longer necessary for trace event operations.

- **Buffer Management**: Use `_NTO_TRACE_WAITBUFFER` to check for buffer availability. Each CPU now has its own dedicated buffer set.

  - `InterruptHookTrace` is deprecated for trace event interrupts.

  - The second parameter of `_NTO_TRACE_ALLOCBUFFER` now specifies per-CPU buffer count instead of total buffer count.

- **Filtering Capabilities**: Dynamic rule filtering is no longer supported.

  - Only static rule filters and post-processing filters are available.

- **Simplified Buffer Allocation**:

  - `_NTO_TRACE_ALLOCBUFFER` now returns a direct pointer to user space memory.

  - Manual memory mapping of the returned address is no longer required.

post122664: Re: TraceEvent got permission denied during trace buffer allocation (QNX 8.0)

2025-06-16T12:14:02Z

You'll need to call:

TraceEvent(_NTO_TRACE_LOGGER_ATTACH, NULL, NULL);

(though the last two parameters can be sigevents if you require the events).

You no longer need IO privilege.

There are also other changes. You need to have a thread bound to each core that calls TraceEvent(_NTO_TRACE_WAITBUFFER, &index) (where index will contain the next buffer index with events).

post122663: TraceEvent got permission denied during trace buffer allocation (QNX 8.0)

2025-06-13T11:24:22Z

About the system call I use here: TraceEvent(_NTO_TRACE_ALLOCBUFFER, bufnum, paddr);

The issue is that it always return error `errno==EPERM`. I have check my TraceEvent call is working find int QNX 7.0 and 7.1 version, but it fails on QNX 8.0.

Before the TraceEvent call, I have make sure the following are all satisfied:

- run as root

- disable secpol with --secpol=no

- (tested w/ and w/o) still give it `PROCMGR_AID_TRACE` by `procmgr_ability(0, PROCMGR_ADN_ROOT | PROCMGR_AOP_ALLOW | PROCMGR_AID_TRACE, PROCMGR_AID_EOL)`

- (tested w/ and w/o) set IO priv with `ThreadCtl(_NTO_TCTL_IO, 0)` and `ThreadCtl(_NTO_TCTL_IO_LEVEL, reinterpret_cast<void *>(_NTO_IO_LEVEL_2 | _NTO_TCTL_IO_LEVEL_INHERIT))`

- make sure there are no existing running instance of TraceEvent.. called `TraceEvent(_NTO_TRACE_STOP);`

My traceevent code is basically reference the document here: https://www.qnx.com/developers/docs/8.0/com.qnx.doc.sat/topic/datacapture_Buffer_management_TraceEvent.html

But always failed at `TraceEvent(_NTO_TRACE_ALLOCBUFFER, bufnum, paddr);` with EPERM error.

Does anyone have experience about TraceEvent usage in QNX8.0 can help?

Thanks in advanced. :)

post122662: Re: How to use the secpolmonitor to monitor security violation event?

2025-06-09T09:51:42Z

> No you can't use secpolmonitor and a program that is using libsecpolev at the

> same time since they both use the trace system. There are are a few uses that

> appear to violate this, for example you can use tracelogger and libsecpolev

> while you're using secpolgenerate. However, in the case of tracelogger,

> secpolgenerate temporarily disconnects from the trace system while traceloger

> is running and in the case of libsecpolev, libsecpolev is able to get events

> from secpolgenerate.

Thanks for the information.

Our module also use the trace event mechanism to trace some API events.

It seems like we will not able to run both secpolmonitor and the process for tracing event at the same time.

We need to adjust this. Thanks.

post122661: Re: Mount lsm module(packet filtering) to io-pkt on QNX 7.1

2025-06-09T08:40:41Z

Here is an update from my tracing process.

By checking the memory stack of io-pkt-v6-hc, I find on QNX 7.0,

the io-pkt-v6-hc is normal. It just loads some needed .so files.

but on QNX 7.1, the additional library libsecpol.so.1 is also loaded by io-pkt-v6-hc.

It seems like even I didn't enalbe the security policy on QNX 7.1, the io-pkt-v6-hc always loads the libsecpol.so?

So the failure message "Operation not permitted" when loading my lsm module might be caused by the new io-pkt-v6-hc arch?

It might be forced to apply the security policy?

Anyone has comment for this? Thanks.

post122660: Mount lsm module(packet filtering) to io-pkt on QNX 7.1

2025-06-05T10:41:38Z

Hi, is there anyone try to mount your lsm module (packet filtering module)  to the io-pkt stack?

I implement a lsm-pf module and I can mount it by using the following command to enable it on QNX 7.0.

$ mount -T io-pkt /path/to/lsm-pf-my.so

I also try to send some packets to validate.  It works on QNX 7.0.

But, on QNX 7.1, the same command doesn't work.  I get an error message from console as:

mount: Can't mount / (type io-pkt)

mount: Possible reason: Operation not permitted

Then, I try to mount the system's default lsm module : lsm-pf-v6.so by using the same command

$ mount -T io-pkt /path/to/lsm-pf-v6.so

I find it can mount successfully.

I don't know what is the difference between two versions of QNX?

Any suggestion is appreciated.  Thanks.

post122659: statvfs first call takes 4-5 seconds and subsequent calls taking less than 100 ms

2025-06-04T08:44:39Z

Operation to be performed:

- Need to check the free size of 1GB of SD card connected to the Hardware. If we don't have free space of 1GB, keep on deleting the files from the SD card to make 1GB free.

- This checking of free space we are calling at every file creation on SD card.

- Using the following call to check the free space memory of SD Card:

bool checkSDCardFreeSpace(char *path, unsigned long long space)

{

    struct statvfs diskData;

    unsigned long long freeDiskSpace = 0;

    memset(&diskData, 0, sizeof(struct statvfs));

    if(statvfs(path, &diskData) == -1)

    {

return false;

    }

    else

    {

        freeDiskSpace = (unsigned long long)diskData.f_bavail * diskData.f_bsize;

        if(freeDiskSpace >= space)

        {

printf("Demanded memory is free on %s\n", path);

            return true;

        }

        else

        {

printf("Demanded memory is not available on %s\n", path);

return false;

        }

    }

}

- after first call of checkSDCardFreeSpace it takes 4-5 seconds to finish it's execution and next all calls of checkSDCardFreeSpace only takes less than 100 milisecs.

- Why this behaviour is there I am not able to figure out. I understood one thing - first call of checkSDCardFreeSpace cache out the filesystem details in RAM. Therefore it takes 4-5 seconds in first call and in subsequent call of checkSDCardFreeSpace uses cache data so it takes less amount of time.

- Actually, we are 3 seconds of watchdog refresh window - because of first call of checkSDCardFreeSpace takes 4-5 seconds resetting the microcontroller because of 3 seconds watchdog window.

- What is the problem happening here, why it is taking 4-5 seconds for first call?

- What we can do to mitigate this problem with 3 second watchdog window?

Note: QNX 6.5 we are using

post122657: Re: How to use the secpolmonitor to monitor security violation event?

2025-05-22T13:13:56Z

Secpolgenerate generates policy rules by observing what a program actually does. But a program such as secpolmonitor cannot operate while secpolgenerate is running since they both need the trace system. Since secpolmonitor cannot run properly, secpolgenerate can't observe it and generate the necessary rules.

To determine abilities required by secpolgenerate, I've used the following technique. Run it multiple times with a single ability denied and see if it starts, a similar approach can be taken with secpolmonitor.

for able in spawn_setuid spawn_setgid setuid setgid getid pathspace reboot cpumode runstate confset rsrcdbmgr session umask event rlimit mem_add mem_phys mem_special mem_global mem_peer mem_lock spawn fork prot_exec wait msg_queue clockset interrupt io trace priority connection schedule signal timer pgrp map_fixed path_trust swap rconstraint child_newapp public_channel aps_root able_create runstate_burst default_timer_tolerance xprocess_query chroot power prot_write_and_exec srandom hyp rlimit_peer; do

    on -A deny,all,$able secpolgenerate -N >/dev/null 2>&1

    if slay -f secpolgenerate; then

        echo "    $able"

    else

        while ! slay -pf secpolgenerate >/dev/null; do

            sleep 0.1

        done

    fi

done

post122656: Re: How to use the secpolmonitor to monitor security violation event?

2025-05-22T11:58:43Z

No you can't use secpolmonitor and a program that is using libsecpolev at the same time since they both use the trace system. There are are a few uses that appear to violate this, for example you can use tracelogger and libsecpolev while you're using secpolgenerate. However, in the case of tracelogger, secpolgenerate temporarily disconnects from the trace system while traceloger is running and in the case of libsecpolev, libsecpolev is able to get events from secpolgenerate.

post122655: Re: How to use the secpolmonitor to monitor security violation event?

2025-05-22T10:02:52Z

>

> E.g.,

> $ on -T secpol_t secpolmonitor -a

> The error message is:

> tracelog_monitor likely failed to attach to path /dev/name/local/_tracelog:

> Permission denied

>

Here is a update, I already find the root cause and fix it already.

It seems like the path and ability setting are needed to adjust, although I still don't know why the secpolgenerate can' show the errors or suggested policy in errors/policy file correctly. :(

post122654: Re: How to use the secpolmonitor to monitor security violation event?

2025-05-22T04:29:47Z

>

> Note, that if you are intending to use this for production, it is important

> that you're not using secpolgenerate's -u or -t options and that you are using

>  libsecpol.so.1, not libsepol-gen.so.1. And I might note that it is not safety

>  certified, though provided a safety-certified library, libsecpolev.so as part

>  of QOS 2.2.7 that can be used for monitoring.

According to your comment, here is a question.

Do you know if I implement an application that is based on the library  libsecpolev.so to monitor the events, could I also use secpolmonitor to monitor the event at the same time?

Would each of them block another?  Becasue accoding my current understanding, it seems like the monitor application(no wheather it is implemented by myself or by system) will access same file?  And if one is running, it would block another one?

Is it right?

Thanks.

post122653: Re: How to use the secpolmonitor to monitor security violation event?

2025-05-22T04:10:07Z

> I presume you're still running secpolenerate. Both it and secpolmonitor can't

> be used at the same time as they both make use of the kernel trace system and

> only one process can use it at a tine, However, secpolgenerate will provide

> all the information. Any attempts to use abilities etc that are not permitted

> will show up in /dev/secpolgenerate/errors.

>

> Note, that if you are intending to use this for production, it is important

> that you're not using secpolgenerate's -u or -t options and that you are using

>  libsecpol.so.1, not libsepol-gen.so.1. And I might note that it is not safety

>  certified, though provided a safety-certified library, libsecpolev.so as part

>  of QOS 2.2.7 that can be used for monitoring.

Yes, you are right.  I forget to update my testing.

In the inital stage, I try to run under secure open/develop mode (in this mode, it will show the policy violated message to console or files).

And after refining the security policy, I apply it to secure mode (in this mode, it will check the policy and also block if violate the policy).

And then I try to run the secpolmonitor base on the policy type I defined, it is still bocked in accessing the file.

E.g.,

$ on -T secpol_t secpolmonitor -a

The error message is:

tracelog_monitor likely failed to attach to path /dev/name/local/_tracelog: Permission denied

I already set the path to allow_attach and allow_link for secpol_t, but it is not working.

And except this error message, there is no other error can query.

I just guess the tracelog_monitor is runned as some security type, not secpol_t???  But I don't know what is the tracelog_monitor means and where I can set for it?

Any suggestion?

Thanks.

post122652: Re: How to use the secpolmonitor to monitor security violation event?

2025-05-20T10:43:06Z

I presume you're still running secpolenerate. Both it and secpolmonitor can't be used at the same time as they both make use of the kernel trace system and only one process can use it at a tine, However, secpolgenerate will provide all the information. Any attempts to use abilities etc that are not permitted will show up in /dev/secpolgenerate/errors.

Note, that if you are intending to use this for production, it is important that you're not using secpolgenerate's -u or -t options and that you are using libsecpol.so.1, not libsepol-gen.so.1. And I might note that it is not safety certified, though provided a safety-certified library, libsecpolev.so as part of QOS 2.2.7 that can be used for monitoring.

post122651: How to use the secpolmonitor to monitor security violation event?

2025-05-20T09:10:03Z

Hi all,

I am try to define a security policy for my QNX environment.

I use secpolgenerate to generate a policy and deploy it to the environment.

But after I try to start up the environment and try to run the secpolmonitor to monitor the event, it always shows an error:

"tracelog_monitor likely failed to attach to path /dev/name/local/_tracelog: File exists"

Is there any can tell me how to fix this issue?

Thanks.

post122643: Re: QNX7.1 unable to link libfreetype.so library: invalid string offset

2024-12-13T15:24:46Z

Oh, but it's a warning, not an error. The test code still builds.

--Elad

post122642: Re: QNX7.1 unable to link libfreetype.so library: invalid string offset

2024-12-13T14:58:04Z

I can reproduce with a trivial example. It works for aarch64le, but reports these strtab errors for ARMv7.

--Elad

post122641: Re: QNX7.1 unable to link libfreetype.so library: invalid string offset

2024-12-13T13:04:25Z

Is the library inside an IFS? In theory, this could be caused by mkifs stripping the binary. If the library is in an IFS, try specifying it with the [+raw] attribute.

Kind regards,

Thomas

post122640: QNX7.1 unable to link libfreetype.so library: invalid string offset

2024-12-12T10:46:01Z

Hi, I'm try to build a application under QNX7.1 (armle-v7), using the free type library but it seems that the binary in the QNX7.1 installation

is not correct: it is a QNX's release bug? has anyone used this library ?

Thanks in advance,

M. Sangalli

qnx710\target\qnx7\armle-v7\usr\lib

this is the error message:

\qnx710\host\win64\x86_64\usr\bin\arm-unknown-nto-qnx7.1.0eabi-ld: /qnx710/target/qnx7/armle-v7/usr/lib/libfreetype.so: invalid string offset 4920 >= 4259 for section `.strtab'

post122636: Re: Identifying processes which are writing "too much"

2024-11-07T15:37:55Z

Update: I decided on using the inotify approach, even though it doesn't provide information about which process is doing the writing. I'll have to deduce process information from the paths that are being written to. A file system resource manager would give me the process information, but the risks of that approach far outweigh the convenience of having the process information.

post122635: Re: Adaptive Partitioning Scheduler availability in QNX 8.0 ?

2024-11-04T17:58:00Z

If you are not sure which build file in the HLOS you should look at, you should perhaps talk to Qualcomm.

The documentation I shared are not specific to BSP and there is no other documentation for APS specific to the SDP

post122634: Re: Adaptive Partitioning Scheduler availability in QNX 8.0 ?

2024-10-28T09:16:02Z

Hi Gerd Wetzel,

Firstly, sorry for delay in response.

Actually, we are building new BSP for Qualcomm Snapdragon Ride platform. I am novice to this task.

I assume the steps mentioned in the below applicable only for BSP and not to SDP.

[https://www.qnx.com/developers/docs/7.1/index.html#com.qnx.doc.adaptivepartitioning.userguide/topic/about_howtouseguide_.html]

In fact, there are hundreds of ". build" files in HLOS 4.5.6 folder that we received from Qualcomm. Could you please share if there is document/URL

specific to SDP?

Thanks a lot

post122633: Identifying processes which are writing "too much"

2024-10-23T14:53:39Z

Hi all,

To help identify processes which are writing excessively to flash storage (and therefore contributing to premature failure), I've been tasked with developing a utility which can report on a per-process basis the number of bytes written during a given boot cycle. I am considering a few options:

1. Use QNX's profiling tools. From what I know of them, I don't think I can get what I need from them (i.e., total # of bytes written by every process), but maybe I'm wrong about that?

2. Implement a file system pass-through resource manager to keep track of every write in a given path. This approach would provide all the information I need, but it seems like a lot of work with some nasty corner cases.

3. Use inotify to monitor files & directories in a given path. This seems like a non-starter because I don't see a way to correlate writes to the process that is performing them.

A few general points:

* Performance isn't an issue as long as the system can still function somewhat normally. This utility would not be part of a normal running system.

* I'm using SDP 7.1.

Does anyone have any thoughts about whether any of the options I've listed could be viable or suggestions for other approaches I haven't mentioned? Thanks in advance for any help!

Paul Kerchen

post122632: Re: Adaptive Partitioning Scheduler availability in QNX 8.0 ?

2024-10-23T11:59:32Z

Please check out the full chapter about APS. There is also a sample build file, that might give you an idea.

https://www.qnx.com/developers/docs/7.1/index.html#com.qnx.doc.adaptivepartitioning.userguide/topic/about_howtouseguide_.html

The build file is not part of the SDP, it is part of the BSP.

https://www.qnx.com/developers/docs/7.1/index.html#com.qnx.doc.neutrino.building/topic/bsp/bsp_structure.html

post122631: Re: Adaptive Partitioning Scheduler availability in QNX 8.0 ?

2024-10-23T11:59:26Z

Did you read the manual? It's quite detailed.

post122630: Re: Adaptive Partitioning Scheduler availability in QNX 8.0 ?

2024-10-23T09:33:04Z

Hi Team,

From the QNX 7.1.0 documentation it is mentioned as like "Go to the directory that contains the buildfile for your system's boot image." , to enable Adaptive partition feature.

https://www.qnx.com/developers/docs/7.1/index.html#com.qnx.doc.adaptivepartitioning.userguide/topic/quickstart_Base_.html

Could you provide where this build file located ? Adding "[module=aps] " is enough or any additional steps needed , please provide details ?

post122629: Re: Adaptive Partitioning Scheduler availability in QNX 8.0 ?

2024-10-23T09:21:30Z

> APS is not available in 8.0. There are a few reasons for that, but the primary

> one is that it doesn't fit with the new scheduler design, which guarantees

> constant time, low-latency, scheduling.

> We have been looking at alternatives, but frankly it has been hard to get good

> requirements (other than "I want APS"). Seems like the only real use case is

> to prevent high-priority threads from going rogue, which can be achieved

> through other means available in SDP 8 (sporadic scheduling, per-thread

> runtime clocks).

>

> --Elad

Hi Team,

Could you please let me know which QNX version has adaptive partitioning feature is available ? Also really appreciate if you could share/refer any documentation on how to enable this feature ?

Thanks

post122622: Re: QNX 8 : ClockPeriod() can no longer be used to set clock period

2024-10-10T11:44:33Z

Thanks.

My bad... Indeed, it works better with:

int ret = procmgr_ability(0, PROCMGR_AID_HIGH_RESOLUTION_TIMER | PROCMGR_AOP_ALLOW | PROCMGR_AID_EOL);

Thanks,

Regards.

post122621: Re: QNX 8 : ClockPeriod() can no longer be used to set clock period

2024-10-10T11:16:47Z

There are a few things wrong with this call.

First, you must terminate the list of abilities with PROCMGR_AID_EOL. This is likely the cause of the SIGSEGV, as the variadic function looks for the next ability in the list.

Second, you need to specify the operation on that ability (allow/deny) and the domain on which it works (root/non-root).

Finally, this call cannot be used to gain an ability your process doesn't have, or abilities wouldn't be very useful. It is typically used either to drop abilities your process doesn't need, or to retain an existing ability before dropping root privileges. In a properly-secured system, abilities are not governed by such calls but rather by security policies.

See the documentation for procmgr_ability()

--Elad

post122620: Re: QNX 8 : ClockPeriod() can no longer be used to set clock period

2024-10-10T08:13:28Z

Hello,

To be able to adjust the timer tolerance between 0 and the clock period, I read that I need to set the PROCMGR_AID_HIGH_RESOLUTION_TIMER ability.

So, on my test board (Raspberry Pi4), I tried:

int ret = procmgr_ability(0, PROCMGR_AID_HIGH_RESOLUTION_TIMER);

But my process is getting an exception:

terminated SIGSEGV code=1 fltno=11 ip=00000058f817990c mapaddr=000000000006090c ref=0000003292315000

Did I missed something?

Thanks.

post122618: Re: QNX 8 : ClockPeriod() can no longer be used to set clock period

2024-10-07T15:50:17Z

Yes, we removed the run-time option because it ended up complicating the code for no good reason. You pick a value for the system and stick to it.

I fully understand that different systems can have different characteristics. We just needed to pick a default value, and 1ms still seems like a reasonable default.

For 8.0, if you have interrupt latency requirements that are in the microseconds, then you can set the IST even above the clock handler, as long as you don't need the IST itself to use software timers.

--Elad

post122617: Re: QNX 8 : ClockPeriod() can no longer be used to set clock period

2024-10-07T14:19:19Z

Found it: procnto -C 10000.

I assume, it is no longer possible, to change this during runtime, right?

Well, on the first view, this looks OK: < 10 us.

But every n sampling ticks, I get a jitter of 100 us, I assume, because of a rounding in the kernel.

-Michael

post122616: Re: QNX 8 : ClockPeriod() can no longer be used to set clock period

2024-10-07T13:54:16Z

Hi Elad,

your clarification explains, why my latency/jitter tests, I made with every QNX version since 6.3, produces a very big jitter under QNX 8.

e.g.:

For hard real time sampling controller software I use code like this:

loop:

...

TimerTimeout(CLOCK_MONOTONIC, _NTO_TIMEOUT_NANOSLEEP | TIMER_ABSTIME, NULL, &nsTime, NULL);

nsTime += nsec_sampling_period

...

goto loop

nsec_sampling_period has to be a multiple of the clock period of the system, to get rid of rounding jitters.

With this approach, I measure a worst case jitter < 10 us, sampling at the highest thread prio in the system.

BTW. on nowadays fast embedded systems a clock period of 100 us is no problem.

e.g. Our EtherCAT Stack is sometimes used with a 200us cycle for high speed motion controllers in the real world.

To get a low jitter < 10 us under QNX 8, I have to use a sampling period > ca. 3000 us at the moment.

How is it possible, to reduce this 1 ms default, you mentioned, to a lower value, e.g. 100 us ?

Thanks

Michael

post122615: Re: QNX 8 : ClockPeriod() can no longer be used to set clock period

2024-10-07T11:34:18Z

Default timers are still tick-aligned, to avoid excessive interrupts. Even though there is no tick per se, the timer hardware is configured to the next expiration time rounded up to what would be the next tick value (1ms by default). You can use high-resolution timers if you really need that, at the expense of extra interrupts in the system.

--Elad

post122614: Re: QNX 8 : ClockPeriod() can no longer be used to set clock period

2024-10-07T09:02:57Z

Hello,

Many thanks, I missed that important point.

I need a clarification: If I have a thread which calls:

clock_nanosleep(CLOCK_MONOTONIC, TIMER_ABSTIME, &wakeup_time, NULL);

With a tickless system, I would assume that a timer is configured to expire at "wakeup_time".

Am I right?

Will the calling thread be rescheduled exactly at "wakeup_time"? (assuming that there is no higher priority threads in the system)

Thanks,

Regards.

post122613: Re: QNX 8 : ClockPeriod() can no longer be used to set clock period

2024-10-03T15:27:36Z

Keep in mind that QNX 8 is fully tickless, and uses per-core timers. The only thing this setting affects is the alignment of normal-resolution software timers. It may not be worth changing.

--Elad

post122612: Re: QNX 8 : ClockPeriod() can no longer be used to set clock period

2024-10-03T14:46:15Z

Great!

Thanks.

post122611: Re: QNX 8 : ClockPeriod() can no longer be used to set clock period

2024-10-03T14:16:23Z

See the -C option for procnto.

https://www.qnx.com/developers/docs/8.0/com.qnx.doc.neutrino.utilities/topic/p/procnto.html

For docs on migrating from 7.1 to 8, see https://www.qnx.com/developers/docs/8.0/com.qnx.doc.qnxsdp.migration/topic/about.html .

post122610: QNX 8 : ClockPeriod() can no longer be used to set clock period

2024-10-03T13:41:45Z

Hello,

I noticed that in QNX 8, ClockPeriod() can no longer be used to set a clock period (See https://www.qnx.com/developers/docs/8.0/com.qnx.doc.neutrino.lib_ref/topic/c/clockperiod.html).

While it seems that this was possible in QNX 7.1 (See https://www.qnx.com/developers/docs/7.1/index.html#com.qnx.doc.neutrino.lib_ref/topic/c/clockperiod.html).

So, my question is: Is there another way to change the clock period for example from 1msec to 0.5msec ?

Thanks,

Regards.

post122596: QNX 8.0.0 on Intel x86 64 bits start up and BIOS interrupt call

2024-08-12T17:15:15Z

In which stage of the start up initialization (x86 64 bits target) would be possible to call BIOS interupt 10 (to initialize video chip graphics mode)? Is it possible? Please comment on it .

Thanks

Janusz

post122595: Re: MsgSendvs Returning 34

2024-08-08T18:17:11Z

Walter, as Elad is pointing out, the server can send two things back when replying.

MsgReply(rcvid, status, &reply_msg, sizeof(reply_msg)

In the above, that's the status and the reply_msg. The status sets the return value for MsgSendvs(), provided the MsgSendvs() doesn't fail.

So for...

rc = MsgSendvs(...)

rc seems to be 34 in your case. i.e., the server is doing something like...

MsgReply(rcvid, 34, &reply_msg, sizeof(reply_msg)

To find out what the server is expected to send back, what 34 represents, you need to check the server code or check with whomever wrote the server code or often there's a common header file that both the client and server include that describes the message protocol.

We recommend that the server use a value >= 0 for the status, negative values can be confusing for the client.

post122594: Re: MsgSendvs Returning 34

2024-08-08T17:45:43Z

This is basic message passing in QNX, which I sure hope is covered by the documentation.

Client:

rc = MsgSend(coid, &msg, sizeof(msg), &reply_buf, sizeof(reply_buf));

Server:

rcvid = MsgReceive(chid, &buf, sizeof(buf), &info);

// Do work

MsgReply(rcvid, status, &reply, sizeof(reply));

Client now returns with the value of "status" in "rc", a copy of the server's reply in "reply_buf".

An error is returned if one of the following occurs:

1. MsgSend() fails to send the message to the server

2. The server indicates an error by using MsgError() instead of MsgReply()

3. The server fails on its MsgReply() call

--Elad

post122593: Re: MsgSendvs Returning 34

2024-08-08T17:18:31Z

What exactly do you mean by “returns the value passed by MsgReply*() in its status argument”? We don’t understand what this means.

What return value should we check for MsgSendvs()?

Should we check if MsgSendvs() != 0 and then examine errno in that case?

We thought based on the documentation that we could do:

if( MsgSendvs() == -1 ) {

// check errno and handle error

}

Is that not correct?

post122592: Re: MsgSendvs Returning 34

2024-08-08T16:41:08Z

1. MsgSend*() (in all its variants) returns the value passed by MsgReply*() in its status argument. The semantics of this value is whatever the replying server says they are. For example, a file system reply to a read request will set the status to the number of bytes returned in the reply.

2. A return value of -1 for the MsgSend*() (non _r variants) or a negative value (for the _r variant) indicate an error. Unfortunately QNX does not provide a mechanism to distinguish between errors returned by the call itself (e.g., EBADF because the connection is not established) and errors returned by the server via MsgError(). A truly misbehaving server can also reply with a status that looks like an error.

3. errno is only valid if a non _r variant is used AND MsgSend*() returned -1. Otherwise its value is stale from some previous call.

--Elad

post122591: Re: MsgSendvs Returning 34

2024-08-08T16:33:50Z

Forgot to add that MsgSendvs set errno to 2 "No such file or directory"

post122590: MsgSendvs Returning 34

2024-08-08T16:08:14Z

My team uses QNX version 7.1.0 and we're having trouble using the MsgSendvs system call. We have identified a case in which MsgSendvs returns 34 but according to our understanding of the documentation that is not possible.

The documentation says MsgSendvs should return -1 on error or the status of MsgReply, which should only be EOK or -1.

We need help understanding documentation. How's it possible that MsgReply is returning a value of 34? What is meant by the "status of MsgReply"?

Docs:

https://www.qnx.com/developers/docs/7.1/#com.qnx.doc.neutrino.lib_ref/topic/m/msgsendvs.html

https://www.qnx.com/developers/docs/7.1/#com.qnx.doc.neutrino.lib_ref/topic/m/msgreply.html

post122587: Re: Shutdown Message isn't printed in console on QNX 7.0

2024-08-06T18:13:46Z

If you have an ISR, and it faults, then the fault will be caught, the kernel will display the shutdown message and invoke the reboot callout.

One more reason not to use ISRs...

--Elad

post122586: Re: Shutdown Message isn't printed in console on QNX 7.0

2024-08-06T18:01:14Z

> If the hardware stops functioning (such as in the case of a bus lockup) then

> there is nothing the kernel can do to detect this problem, let alone to

> rectify it. The kernel needs the hardware in order to execute - it's not

> special in this sense. Cases like these require specialized debug facilities

> such as JTAG and/or an embedded trace buffer (ETB).

>

> --Elad

thanks Elad,

In the case of segmentation fault on an interruption, what´s the kernell behavior?

post122585: Re: Shutdown Message isn't printed in console on QNX 7.0

2024-08-06T17:52:26Z

If the hardware stops functioning (such as in the case of a bus lockup) then there is nothing the kernel can do to detect this problem, let alone to rectify it. The kernel needs the hardware in order to execute - it's not special in this sense. Cases like these require specialized debug facilities such as JTAG and/or an embedded trace buffer (ETB).

--Elad

post122584: Re: Shutdown Message isn't printed in console on QNX 7.0

2024-08-06T17:41:20Z

> You only get a shutdown message if the processor raises an exception while the

> kernel is executing. If you just get the hardware into a bad state there is

> no guarantee that such an exception will occur. That's what watchdogs are for.

>

>

> --Elad

but, for example if you rise a "data abort exception" in a process (user space), the process is kill and the core dump file is generated but the QNX scheduler keeps working, now we found in our system a condition unknow for us at the moment where QNX stop scheduling and the system freeze, how can we related this condition to an microcontroller exception (like bus lockup, or segmentation fault)?

what about exceptions on kernell space?

how can we debug this condition?

thanks

post122583: Re: Shutdown Message isn't printed in console on QNX 7.0

2024-08-06T17:25:57Z

You only get a shutdown message if the processor raises an exception while the kernel is executing. If you just get the hardware into a bad state there is no guarantee that such an exception will occur. That's what watchdogs are for.

--Elad

post122582: Re: Shutdown Message isn't printed in console on QNX 7.0

2024-08-06T17:17:50Z

> Sorry, I misunderstood. Thought you said it was a watchdog reset.

> What do you mean by writing an invalid address through mmap()? I assume you

> were mapping some physical memory and trying to crash the system that way, but

> it really depends on what address was used. For example, writing to a bank

> that's not powered will often result in a bus lockup.

>

> --Elad

Exactly , we write invalid address (trying to force a bus lockup, segmentation fault, etc) until QNX scheduler stop working (system freeze, no software or hardware reset) , base on https://www.qnx.com/developers/docs/7.1/#com.qnx.doc.neutrino.technotes/topic/proc_dump.html , a shutdown message should be printed on serial console, but in this case qnx freeze without any message or information.

post122581: Re: Shutdown Message isn't printed in console on QNX 7.0

2024-08-06T14:42:42Z

Sorry, I misunderstood. Thought you said it was a watchdog reset.

What do you mean by writing an invalid address through mmap()? I assume you were mapping some physical memory and trying to crash the system that way, but it really depends on what address was used. For example, writing to a bank that's not powered will often result in a bus lockup.

--Elad

post122580: Re: Shutdown Message isn't printed in console on QNX 7.0

2024-08-06T14:37:30Z

> There wouldn't be any message if it's a watchdog reset. The hardware resets

> the processor without involving the OS at all.

> If the board supports it you can install a watchdog interrupt handler, though

> that still won't (by itself) cause a shutdown message.

>

> --Elad

Hi Elad,

The watchdog is disabled, we crash the system forcing a segmentation fault (writing invalid address throw mmap function), the qnx kernell stop scheduling but no shutdown message is printed.

post122578: Re: Shutdown Message isn't printed in console on QNX 7.0

2024-08-06T12:25:27Z

There wouldn't be any message if it's a watchdog reset. The hardware resets the processor without involving the OS at all.

If the board supports it you can install a watchdog interrupt handler, though that still won't (by itself) cause a shutdown message.

--Elad

post122577: Shutdown Message isn't printed in console on QNX 7.0

2024-08-06T12:23:06Z

we try with the following configuration and wdt disable and there wasn´t any dump or trace on serial console

[image=0x10800000]

[virtual=armle-v7,raw +compress] .bootstrap = {

startup-imx6x-apalis -m -vvvvv

[+keeplinked]

kdumper

PATH=/proc/boot:/bin:/usr/bin:/opt/bin/sbin:/usr/sbin LD_LIBRARY_PATH=/proc/boot:/lib:/usr/lib:/lib/dll:/lib/dll/pci

:/opt/lib procnto-smp-instr -v

}

thanks.

post122575: Re: how to gather for watchdog reset debug

2024-08-05T15:45:40Z

thanks Alexander ,

we try with the following configuration and wdt disable and there wasn´t any dump or trace on serial console

[image=0x10800000]

[virtual=armle-v7,raw +compress] .bootstrap = {

startup-imx6x-apalis -m -vvvvv

[+keeplinked]

kdumper

PATH=/proc/boot:/bin:/usr/bin:/opt/bin/sbin:/usr/sbin LD_LIBRARY_PATH=/proc/boot:/lib:/usr/lib:/lib/dll:/lib/dll/pci:/opt/lib procnto-smp-instr -v

}

Is any config in startup* that print the state of registers before hot boot?

thanks

post122574: Re: how to gather for watchdog reset debug

2024-07-30T16:10:29Z

A kernel shutdown message usually will be written to a serial port. You can force one for test purpose by triggering a page fault in an ISR. See also "Reading a Shutdown Message" technote: https://www.qnx.com/developers/docs/7.1/#com.qnx.doc.neutrino.technotes/topic/proc_dump.html

post122573: how to gather for watchdog reset debug

2024-07-30T13:29:52Z

On a qnx 7.0 system. Randomly the system reboot by the hardware watchdog configured for 30 sec timeout. (we are able to read reset cause register from arm uC the indicates hardware wdt ).

It looks like the OS crash, so stop refreshing wdt process.

The system is not in laboratory environment so information must be save in files to gather after the incident is reported.

This happened very rarely and I need to gather information.

So:

* how a kernel crash, hang or shutdown can be force? (for test purposes)

* what is the kernel shutdown message standard output? how can be configure to write into a file?

* What tools do you recommend using in these cases?

post122570: Re: Adaptive Partitioning Scheduler availability in QNX 8.0 ?

2024-07-23T09:28:53Z

APS is not available in 8.0. There are a few reasons for that, but the primary one is that it doesn't fit with the new scheduler design, which guarantees constant time, low-latency, scheduling.

We have been looking at alternatives, but frankly it has been hard to get good requirements (other than "I want APS"). Seems like the only real use case is to prevent high-priority threads from going rogue, which can be achieved through other means available in SDP 8 (sporadic scheduling, per-thread runtime clocks).

--Elad

post122569: Adaptive Partitioning Scheduler availability in QNX 8.0 ?

2024-07-23T06:41:43Z

Hello,

I did not find any references to APS (Adaptive Partitioning Scheduler) in QNX 8.0 documents.

Does it mean that this feature is no longer supported?

If yes, why?

And is there a plan to deliver something similar?

Thanks,

Regards.

post122565: Re: Thread blocks on sem after creation

2024-07-12T15:57:38Z

Somehow the log needs to contain information about which processes and threads exist and what states they're in at the beginning of the log. Instead of just containing a list of that information, the beginning of the log contains a bunch of manufactured events that create processes and threads and put the threads in the states they need to be in at the beginning of the log.

Judging by the small Event numbers you gave, 88-92, that's what this is. So at the time the log was captured, at the beginning of logging, the thread with thread id 2 in process 1015814 was semaphore blocked. If you load the log up into the IDE and look at it in the System Profiler perspective's Timeline pane, you'll see that that's the initial state of that thread.

So yes, it's normal. It's not a transition, it's an initial state aka the current state of the thread at the time the log was starting to be captured.

post122564: Thread blocks on sem after creation

2024-07-12T10:53:14Z

Event:88, Time:0.000.119us, Cycle:3cd772c1f7, CPU:4, Class:THREAD, Type:THCREATE pid:1015814 tid:1

Event:89, Time:0.000.120us, Cycle:3cd772c20f, CPU:4, Class:THREAD, Type:THRECEIVE pid:1015814 tid:1

Event:90, Time:0.000.121us, Cycle:3cd772c22c, CPU:4, Class:THREAD, Type:THCREATE pid:1015814 tid:2

Event:91, Time:0.000.122us, Cycle:3cd772c243, CPU:4, Class:THREAD, Type:THSEM pid:1015814 tid:2

Event:92, Time:0.000.124us, Cycle:3cd772c28b, CPU:4, Class:PROCESS, Type:PROCTHREAD_NAME

Can someone explain me if this is normal transition?

Cheers,

NM

post122561: QNX 6.6.0 file system encryption , locked domain files are not encrypted

2024-06-14T17:03:02Z

The x86 platform with Patch id 4277 installed and locked domain files are not encrypted.

I am attaching sequence of  commands to test FS encryption. After the domain is locked i am still able to read the content of the file in that domain. My quess is that the sequence of event  of my test is not correct.

The sequence of  command is listed below:

-------------------------------------------------------

# fdisk /dev/hd1 add -t 178 -p 100

# mount  -e /dev/hd1

# mkqnx6fs -E /dev/hd1t178

mkqnx6fs: filesystem block size must be 4k when file data encryption is enabled

# mkqnx6fs -E -b 4096 /dev/hd1t178

All files on /dev/hd1t178 will be lost!

Confirm filesystem re-format (y) or (n): y

Format fs-qnx6: 3863620 blocks, 120768 inodes, 8 groups

# mount -vvvv -t qnx6 -ocrypto=enable /dev/hd1t178  /enc2

Parsed: mount from [/dev/hd1t178] mount on [/enc2] type [qnx6]

exec: mount_qnx6 -o crypto=enable /dev/hd1t178 /enc2

Using internal mount (mount_qnx6 not found)

Type    [qnx6] Flags 0x00000000

Device  [/dev/hd1t178] Directory [/enc2]

Options [crypto=enable]

# fsencrypt -vv -c check -p /enc1

Logging verbosity set to 2

# fsencrypt -vv -c check -p /enc2

Logging verbosity set to 2

ENCRYPTION_CHECK(Path:'/enc2') INTERNAL NOTICE: (12) - 'Supported'

# fsencrypt -vv -c create -r -t1 -d20 -p/enc2 -k+password

Logging verbosity set to 2

CREATE_DOMAIN(Path:'/enc2', Domain:20, Type:1) SUCCESS

UNLOCK_DOMAIN(Path:'/enc2', Domain:20) SUCCESS

OK

# touch /enc2/test1

# touch /enc2/test2

# fsencrypt -vv -c setup -k:20:1:0::/enc2

Logging verbosity set to 2

SUCCESS

# touch /enc2/test3

# echo "test4" > /enc2/test4

# fsencrypt -vv -c lock -d20 -p/enc2

Logging verbosity set to 2

LOCK_DOMAIN(Path:'/enc2', Domain:20) SUCCESS

# cat /enc2/test

test1  test2  test3  test4

# cat /enc2/test4

test4

-------------------------------------------------------------------

Please advice

Janusz

post122559: Re: Passing custom data from startup-x86 to QNX environment

2024-06-07T07:50:49Z

Hi Janusz,

there is no special mechanism for accessing the reserved RAM during startup.

Well, you need a startup mapping for your area, created by startup_memory_map( ).

Regards

Michael

post122558: Samba/CIFS file system support on QNX 8.0.0

2024-06-06T23:50:33Z

I am looking for cifs file system support on QNX 8.0. Any recomendation or known 3rd party support on that matter available at QNX community?

Regards,

Janusz

post122537: Re: Passing custom data from startup-x86 to QNX environment

2024-05-27T01:46:11Z

Thank you, Michael, and Elad for all comments.

The keys to make the simple reserved memory access program working are:

1. startup-x86 -R 4096,4096,GOP

        the alin – parameter must be in a size of system page size.

2. open a reserved memory with POSIX_TYPED_MEM_ALLOCATE_CONTIG flag.

       ………………..

     int fd = posix_typed_mem_open("GOP", O_RDWR, POSIX_TYPED_MEM_ALLOCATE_CONTIG );

     if (fd == -1) {

         printf("Error: %s\n", strerror(errno));

     }

        void * buff = mmap(NULL, 10, PROT_READ | PROT_WRITE , MAP_PRIVATE, fd, 0);

        if (buff == MAP_FAILED) {

                printf("map failed: %s\n", strerror(errno));

        }

        else {

                unsigned char *c = buff;

                printf("%c %c %c \n", c[0], c[1],c[2]);

       }

      …………………

So, I am able to reserve a memory block and access it later on from QNX environment. It is OK to use a direct-physical mapping in my since it is going to be used in closed system.

I am having additional difficulty which is initialization (write into it a data which will be used later from qnx environment) of that reserved memory block. Any time I try to write into that block of memory the system reboots which implies that reboot callout is called.

What is proper mechanism to write into that reserved memory block from startup and in which step of startup initialization would be possible.

I have tried to use copy_memory function from startup library but that also cause system reboot.

Any advice is greatly appreciated.

Janusz

post122533: Re: Passing custom data from startup-x86 to QNX environment

2024-05-24T09:09:13Z

The problem is with the use of POSIX_TYPED_MEM_MAP_ALLOCATABLE. It's an unfortunate issue that I wanted to get to in a very long time but haven't had the chance. The semantics of this flag is that it does not allocate memory, but rather causes a mmap() to create a direct mapping of the physical range.

There are two problems with that:

1. You need to pass the physical address in the last argument to mmap(), and it must be within the range of the typed memory object. Ideally this argument would have been a logical offset into the object, and 0 would suffice, but it isn't.

2. Direct-physical mappings are really dangerous. Probably not an issue in your case, as I assume no other program will ever map that object.

I suggest using POSIX_TYPED_MEM_ALLOC_CONTIG instead.

--Elad

post122532: Re: Passing custom data from startup-x86 to QNX environment

2024-05-24T08:15:36Z

Hi Janusz,

I do not see a real problem in your code. Perhaps next time, you additionally attach the output of your program to see for example the exact errno values.

As you only want to read the region, perhaps you do not need the PROT_WRITE.

Do you have a permission problem?

I assume your process needs the "PROCMGR_AID_MEM_PHYS" ability.

Regards

Michael

post122530: Re: Passing custom data from startup-x86 to QNX environment

2024-05-23T14:07:55Z

Hi Michale,

    Thank you for sharing. I started to discover that solution too with  -R option for startup-x86 -R 1024,8,GOP to let the system allocate small chunk of memory and exclude it from general system use.

In the application i want to map that memory and read the content of it but i am experiencing mapping failure.

.......

#include <stdint.h>

#include <sys/mman.h>

#include <sys/mman.h>

#include <fcntl.h>

int main(void)

{

    struct posix_typed_mem_info info;

    int fd = posix_typed_mem_open("/memory/ram/GOP", O_RDWR, POSIX_TYPED_MEM_MAP_ALLOCATABLE);



    if (fd == -1) {

        printf("Error %s\n", strerror(errno));

    }

    else

    {

        int i = posix_typed_mem_get_info(fd, &info);

        if (i == 0)

        {

            printf("Max alloc %u  total %u fd %u\n", info.posix_tmi_length, info.__posix_tmi_total, fd);



            void * buff = mmap(NULL, 10,PROT_READ | PROT_WRITE , MAP_SHARED, fd, 0);



            if (buff == MAP_FAILED) {

                printf("map failed %s\n", strerror(errno));

            }

            else

            {

                unsigned char *c = buff;

                printf("%c %c %c \n", c[0], c[1],c[2]);

            }

        }

        else

            printf("info error\n");

    }

}

................................

mmap failes regardles of the posix_typed_mem_open  mapped parameter.

I am testing it under QNX 8.0.0 64 bits on x86 hardware.

Could you share your thoughts?

Regards,

Janusz

post122529: Re: Passing custom data from startup-x86 to QNX environment

2024-05-23T10:16:44Z

Hi,

simply reserve a small part of physical RAM.

I use that for example to pass the environment vars of a boot-monitor to the QNX environment:

...

kprintf("U-Boot env found at 0x%x\n", uboot_env );

alloc_ram(uboot_env, UBOOT_ENV_SIZE, 0);

as_add_containing(uboot_env, uboot_env - 1 + UBOOT_ENV_SIZE, AS_ATTR_RAM, "uboot-env", "memory");

...

The as_add_containing() is needed, to pass the physical base address and range to the system-page.

If you reserve RAM at a fixed physical address, the as_add_containing() is not really needed, but I would suggest it, because you can check the existence of your reserved RAM.

Regards

Michael

post122526: Passing custom data from startup-x86 to QNX environment

2024-05-22T15:22:52Z

The scenario is:

Platform : x86 , UEFI boot

the start up BSP is updated such the EFI graphics capabilities (modes) are check.

The question is how to make that modes information (lets say list of modes) available to the run QNX environment.

I was thinking to add private structure to the system page block but i think that is going to break concept of system page.

I am looking for any suggestion from experts.

Regards,

Janusz

post122515: QXN 7.0 Screen Does Not Working on R-Car

2024-04-01T11:50:18Z

Hello,

I have Renesas R-Car M3W board. I installed screen graphics from QNX Software Center for SDP 7.0 and I used default graphics build file. The board working but screen does not work. I saw this error on slog2info:

```

Jan 01 00:00:02.090 screen.77843 slog* 300 screen: starting up...

Jan 01 00:00:02.090 screen.77843 slog 300 screen: Configuration file: /usr/lib/graphics/rcarm3/graphics.conf

Jan 01 00:00:02.094 screen.77843 slog 200 [rcardu]ERR : Did not detect a supported revision of chip: 5220

```

My chip revision is:

```

NOTICE: PPR is R-Car M3 Ver.3.0

```

How can I resolve this issue?

Best Regards,

Faruk

post122514: Read from and write to I/O registers and memory

2024-03-28T19:44:08Z

Hello all,

BACKGROUND:

--------------------------------

I am working on a project that is using QNX 7.1.0 2023/07/14-18:28:39EDT NXP_i.MX8QXP_CPU_Board aarch64le

I am currently working on features related to IFS authentication, and will eventually want to program the OTP memory with public keys to allow authentication to proceed with correctly signed IFSs. Before burning the OTP fuses, I would like to test that my pki/signing/authentication are functioning correctly. For this reason, I'd like to leverage the i.MX8QXP shadow registers to simulate writing/reading the OTP memory. As per page 194, section 7.1.2 of the reference manual, this should be possible:

"If not locked then it can be read sensed and programmed and the shadow registers can be overwritten (to allow emulation of programming without actually blowing fuses)."

QUESTION:

----------------

I am unable to use QNX utilities like `io` or even `dd` to read from these shadow registers. For example, I have tried to read the default (unprogrammed) UNIQUE_ID value from shadow register 0x0900 with the following commands as root user:

# io b 0x0900

# dd if=/dev/mem skip=$((0x0900)) bs=16 count=1

Both commands fail. I have attached the error output for both commands to this forum post. Any ideas about what I might be misunderstanding/overlooking would be greatly appreciated!

post122512: Re: How to get performance metrics from API

2024-03-20T12:35:20Z

You're right, there isn't a universally portable C API for monitoring process memory and CPU utilization. However, for Linux you can definitely leverage the /proc filesystem.

Here's how to monitor your process's memory utilization and CPU utilization on Linux using /proc:

1. Memory Utilization:

    a. Read the contents of the virtual memory statistic file /proc/self/statm. This file contains information about the memory usage of the process.

2. CPU Utilization:

    a. You can't access your process's specific CPU utilization from /proc. However, you can get system-wide CPU usage statistics by reading files like /proc/stat or /proc/loadavg.

Monitor Linux Process Memory Usage Using C/C++: https://stackoverflow.com/questions/669438/how-to-get-memory-usage-at-runtime-using-c

For a more comprehensive approach that might involve fetching data from various sources and platforms, consider using B2B data providers and their APIs. B2B data providers offer business data that can be integrated into your application using APIs (Application Programming Interfaces).  This data can include business contact information, firmography data, and even industry trends, depending on the provider.  By leveraging B2B data APIs, you can enrich your application with valuable business insights and potentially improve your application's functionality.  See this article for more details on using B2B data integration APIs: B2B Data Integration APIs for Your App: https://www.globaldatabase.com/why-use-b2b-data-providers-apis-when-building-your-app

post122508: Re: QNX 6.5 setrlimit not working and allocating more than 2Gig seems impossible

2024-03-12T08:16:12Z

The available user address space on a 32bit system on qnx depends on the architecture.

see http://www.qnx.com/developers/docs/6.6.0_anm11_wf10/#com.qnx.doc.neutrino.user_guide/topic/limits_PlatformSpecific.html

so having 2/3.5g available user address space doesn't mean you are able to do a contiguous virtual address space allocation of that size.

There is space also used for the stack, heap, executable, libs, etc...

you can use something like pidin mem to see the memory layout in the process.

http://www.qnx.com/developers/docs/7.0.0/#com.qnx.doc.neutrino.utilities/topic/p/pidin.html

post122507: Re: QNX 6.5 setrlimit not working and allocating more than 2Gig seems impossible

2024-03-12T06:16:49Z

> I've been working with a client who has some 16Gig 6.6 machines and they want

6.5 or 6.6? (confusion between Subject and text here)

> to use all of the memory and be able to allocate the maximum amount for the

> address space.  Somewhere I read that this is 3.5Gig.

>

> We are using -x on startup-* and we see the memory.

> We start test programs with "on -P".  This works.  We can allocate all the

> memory, just not more than 2Gig per process.

>

> We've try to use setrlimit(RLIMIT_AS, ...) and it doesn't work.  We read after

>  writing the limit and it doesn't change.

can you describe in detail how you're testing this? From what you write, it seems you're assuming that this will change the size of the process's address space right away ... is that the case?

> Mysteriously "ulimit -a" show that memory is unlimited.

>

> We've tried allocating using malloc() which will only handle 2Gig at a time

> and mmap() with the same results.

post122506: QNX 6.5 setrlimit not working and allocating more than 2Gig seems impossible

2024-03-12T02:14:53Z

I've been working with a client who has some 16Gig 6.6 machines and they want to use all of the memory and be able to allocate the maximum amount for the address space.  Somewhere I read that this is 3.5Gig.

We are using -x on startup-* and we see the memory.

We start test programs with "on -P".  This works.  We can allocate all the memory, just not more than 2Gig per process.

We've try to use setrlimit(RLIMIT_AS, ...) and it doesn't work.  We read after writing the limit and it doesn't change.

Mysteriously "ulimit -a" show that memory is unlimited.

We've tried allocating using malloc() which will only handle 2Gig at a time and mmap() with the same results.

post122505: Re: PSelect Getting Blocked For A Long Time

2024-03-04T10:11:59Z

>

> Hi Michael Schuster ,

>

> I have provided the details. Is this sufficient for you to narrow down the

> issue.

no, you provided code snippets.

Code that compiles and runs and demonstrates what you claim to see is something different.

In addition to actual runnable code, show how to run it to reproduce the behaviour.

regards

> Please let us know .

>

> Thanks

> Sayooj Mandodi

>

post122504: Re: PSelect Getting Blocked For A Long Time

2024-03-04T09:49:34Z

Hi Michael Schuster ,

I have provided the details. Is this sufficient for you to narrow down the issue.

Please let us know .

Thanks

Sayooj Mandodi

post122503: Re: Video decode on RPi4

2024-03-03T18:38:26Z

No luck so far. Seems like video decoding plugins exist for x86 and i.MX8, but have not been successful seeing how to do this on the pi. If anyone has gstreamer libs working, that would be awesome. The kmscube example running on Raspian works well for video decode and it uses the gstreamer pipeline (which I realize is quite involved).

post122501: Re: PSelect Getting Blocked For A Long Time

2024-02-29T12:39:55Z

> we had printed FD value... in case of issue, FD was less than 255.

I mean, FD was coming random value , which was always less than 255 .

post122500: Re: PSelect Getting Blocked For A Long Time

2024-02-29T12:33:32Z

we had printed FD value... in case of issue, FD was less than 255.

post122499: Virtio shmem

2024-02-27T15:15:06Z

Hello everyone , I am having a difficulty to implement the virito shmem between guest and host.

I have done the configuraiton part in the VM qvmconf file and issued the commands guest-shmem with same address and interrupt number that are in the configuration file.

The problem is in the host i can see the share area created under /dev/shmem/SHMEM_GUEST but when i try to cd or do any operation i can`t do it.

How can i write to that area from either host or guest and read it back ?

post122498: Re: sdmmc driver on rpi4 version

2024-02-27T14:30:18Z

> Do you specify the file system type when mounting?

> QNX6FS is the default, other file systems must be specified at the mount

> command, e.g. "-t dos"

Ok, I think I was mislead by the documentation. The utility reference of mount says:

If you don't specify the filesystem, mount tries to determine which to use. If it can't figure out which to use, it uses qnx6.

Mounting with -t dos makes the partition accessible I can see the files.

Many thanks guys, fantastic support (both info and speed)!

post122497: Re: Video decode on RPi4

2024-02-27T14:23:03Z

Did you get anywhere with that? My naive assumption is that if both screen and mm-renderer work on the platform, then there is no reason why video wouldn't.

--Elad

post122496: Re: sdmmc driver on rpi4 version

2024-02-27T14:20:01Z

Silly question - are you sure your mount command is correct for a FAT partition? Can you share it?

--Elad

post122495: Re: sdmmc driver on rpi4 version

2024-02-27T14:19:27Z

Do you specify the file system type when mounting?

QNX6FS is the default, other file systems must be specified at the mount command, e.g. "-t dos"

post122494: Re: sdmmc driver on rpi4 version

2024-02-27T14:17:40Z

If you got this far then the SD card clearly works properly. The second problem I mentioned results in not being able to mount any partition.

There's a chkdosfs utility in the SDP. Perhaps it can shed some light on what's wrong with the FAT partition.

--Elad

post122493: Re: sdmmc driver on rpi4 version

2024-02-27T14:13:30Z

> There are two known issues with the SD card driver:

>

> 1. Newer revision boards (silently) changed the DMA range for the hardware.

> You probably have the C0 version. We have recently fixed that so that the

> driver now detects things automatically. For now just dropping that option

> from the command line should be fine (unless you are building an image that

> needs to support both hardware versions).

> 2. Not all SD cards work properly. I have no idea why, but then again I'm not

> a hardware/driver guy. I have had no issues with SanDisk cards, but many

> people have had issues with some other brands.

>

> Finally, you may want to use a more robust file system than FAT.

>

> I love Raspberry Pi - it's a technological marvel in terms of price/

> performance. But the foundation does a really lousy job at publishing

> information about the hardware.

>

> --Elad

Thanks Elad for the quick follow-up.

I am just dropping the option for now, I do not need to support other HW, so that works.

About file systems: I've tried to create two additional partitions, one FAT32 (type 14) and one qnx6fs (type 179).

Here are my observations:

- both partitions created via the QNX host and persist in the partition table after a reboot

- both partitions formatted with their respective formatting tool (mkdosfs and mkqnx6fs)

- both partitions mount

- the qnx6 one can be accessed fine after mounting

- the fat32 says "Corrupted file system detected"

I am also checking the card with GParted on my Ubuntu PC, I can see all three partitions (the FAT32 with the IFS, and the two created by the QNX host). The second one shows up with "unknown" file system, as expected, and the third one is recognized as FAT32.

It seems like everything is working fine except actually reading the file system.

The preference towards FAT32 is motivated by a need: I would like to be able to copy files to this "data" partitions using a Windows machine...

Should I just buy more SD cards and hope for the best? I would really like to understand at least what's wrong. The HW should be ok as the partitions are created as expected, it is really only just accessing them after mounting...

post122492: Re: sdmmc driver on rpi4 version

2024-02-27T00:38:29Z

There are two known issues with the SD card driver:

1. Newer revision boards (silently) changed the DMA range for the hardware. You probably have the C0 version. We have recently fixed that so that the driver now detects things automatically. For now just dropping that option from the command line should be fine (unless you are building an image that needs to support both hardware versions).

2. Not all SD cards work properly. I have no idea why, but then again I'm not a hardware/driver guy. I have had no issues with SanDisk cards, but many people have had issues with some other brands.

Finally, you may want to use a more robust file system than FAT.

I love Raspberry Pi - it's a technological marvel in terms of price/performance. But the foundation does a really lousy job at publishing information about the hardware.

--Elad

post122491: Re: sdmmc driver on rpi4 version

2024-02-26T22:38:12Z

I am attaching the slog for the build without the "bs=bmstr_base=0xc0000000 "

I can immediately see a difference under the SD SW CAPS portion:

Not working, bmstr_base present:

slog   1800  SD SW CAPS:

slog   1800    bus mode 0x0, cmd sys 0x0

slog   1800    drv type 0x0, curr limit 0x0

slog   1800    dtr 0

slog   1800  CFG:  Timing LS, DTR 25000000, Bus Width 1 bit

Somewhat working, bmstr_base removed:

slog   1800  SD SW CAPS:

slog   1800    bus mode 0x3, cmd sys 0x1

slog   1800    drv type 0x1, curr limit 0x1

slog   1800    dtr 50000000

slog   1800  CFG:  Timing HS, DTR 50000000, Bus Width 4 bit

post122490: Re: sdmmc driver on rpi4 version

2024-02-26T21:54:17Z

Hi guys, new to the forum,

I am having the same issue with the RPi4 BSP.

The driver is started with:

devb-sdmmc-bcm2711 cam pnp,verbose mem name=below1G sdio addr=0xfe340000,irq=158,bs=bmstr_base=0xc0000000, verbose=4 sdmmc verbose=4 disk name=sd

sd0 shows up in /dev but no partitions, fdisk confirms.

Interestingly, if I remove the busmaster base option, I can see the partitionts (sd0t11 and sd0t12 as expected, two FAT32 partitions) but upon mounting and accessing them, it still complains about corrupted file system.

I am attaching the slog. Any help would be greatly appreciated.

RPi4 8GB, SD card is a 64GB Samsung. First partition ~650MB (contains the IFS), second partition 1GB.

post122479: Video decode on RPi4

2024-02-11T00:56:02Z

I've got mm-renderer working on the Pi (QNX 7.1) and can playback audio from various media (including video files). Works well. But as of now it seems there is no video playback supported on the Pi - is that right? (The system reports no decoder found, and I see the hardware decoder plugins for some platforms, but not the VideoCore that's on the Pi.)

Thanks!

post122478: Re: PCI/PCIe interrupts don't work as expected

2024-02-05T13:19:16Z

HI, I tried the InterruptQuery() function and it showed that the source was masked more than once sometimes.

However, it shows the same for PCI and PCIe devices and PCIe devices do work.

I made a mistake in saying that one of the Optilex's worked. I tested it again today and it didn't. However I found a

computer in which all devices (PCI/PCIe) seem to work correctly even when interrupts are shared. Maybe it's an

issue with the hardware (DELL Optiplex 9010, Intel(R) 7 Series/C216 Chipset) or the BSP is not fully configured.

For now this works for me. Thanks for your help.

post122477: Re: PCI/PCIe interrupts don't work as expected

2024-02-02T13:05:17Z

I am not a PCI expert, but one thing to watch out for when sharing interrupts is that the source will remain masked as long as at least one attached handler has it masked.

You can use the new InterruptQuery() call to see if the source is masked while your driver is waiting for it.

--Elad

post122476: PCI/PCIe interrupts don't work as expected

2024-02-02T12:52:35Z

Hi,

I am currently porting a device driver from QNX7.1 to QNX8.0 and am observing

weird behavior (maybe a bug?) when it comes to PCI/PCIe interrupts.

When I only use PCIe devices, the interrupt handling using InterruptAttachThread()

or InterruptAttachEvent() and InterruptWait() works like expected.

When I add a PCI device to this combination, this device will stay inside

InterruptWait() and not return anymore.

I am using the x86_64 BSP and I tried it on two DELL Optiplex 9010.

Using only a single PCI device (no PCIe) in those PC's also shows different

results. In one of them it worked as expected, in the other it also stayed inside

InterruptWait().

Flags used for InterruptAttachThread/Event: _NTO_INTR_FLAGS_NO_UNMASK | _NTO_INTR_FLAGS_END.

Flags used for InterruptWait: _NTO_INTR_WAIT_FLAGS_UNMASK | _NTO_INTR_WAIT_FLAGS_FAST.

The devices use legacy interrupts, not MSI.

I attached the output of pci-tool for the working (pcie_only) and failing (pcie_and_pci)

environment. The only thing I see is, that they share an interrupt. The devices

have the vid 15cf and use IRQ 16 & 18. There is also an Intel USB Controller

that uses IRQ 16.

Are there any known PCI/PCIe issues for specific CPU/chipsets?

Does somebody know a way I could debug/resolve this issue?

post122475: Re: PSelect Getting Blocked For A Long Time

2024-02-01T12:57:53Z

That's not what I asked. What is the numerical value of the fd? select() has an upper limit of 255.

post122474: Re: PSelect Getting Blocked For A Long Time

2024-02-01T12:54:56Z

We have verified that during issue scenario correct FD is being passed to pselect.

Same doubt was raised and when pselect was getting blocked we printed the FD and made sure its valid one .

post122473: Re: PSelect Getting Blocked For A Long Time

2024-02-01T12:04:06Z

What is the highest fd in this case? Note that select() uses a fixed value for the fd set, and is generally considered as a bad interface as a result. If the highest fd is greater than 255 then you need to re-define FD_SETSIZE. Better yet, switch to poll().

--Elad

post122472: Re: PSelect Getting Blocked For A Long Time

2024-02-01T11:56:59Z

we have a use case where multiple clients are writing data to same socket which is receiver end.

Socket type used is SOCK_DGRAM

Operating System: QNX 7

Platform: Qualcomm 6145

setsockopt BUFFER_SIZE: 246000

We encountered no buffer exception in our code. Below is the syntax for pselect system call.. and we are using send/recv apis to send and received the data.

pselect((maxFd + 1), &mFdSet, NULL, NULL, NULL, NULL)

send(mFd,buffer,uiSize, MSG_WAITALL);

recv(fd, buffer,uiSize,MSG_WAITALL);

when multiple clients were trying to write the data, send api was returning "no buffer" exception.

when we checked in detail and added log before and after pselect system call, we observed that initially when we were pushing data before and after pselect prints were coming

and then suddenly "after pselect" print stopped coming although data was being pushed from client side, after some time when socket buffer becomes full, clinets started getting "no buffer".

post122471: Re: PSelect Getting Blocked For A Long Time

2024-02-01T06:47:51Z

Hi,

side note: one message would have been quite enough :-)

> Facing one issue where PSELECT system call is getting blocked.. although data

> is being pushed continuously from one end , However PSELECT is not getting

> unblocked. After some time we see socket buffer gets completely filled and it

> starts throwing no buffer exception.

>

> As a recovery , we added timeout,

> We would like to know if there is any such known issue with PSELECT.

I'd suggest you try to create a minimal reproduction case that clearly demonstrates the behaviour you're describing. Also make sure to add information about version of QNX and the platform you're using.

HTH

Michael

post122470: Re: PSELECT System Call Getting Blocked Forever

2024-02-01T06:16:14Z

Facing one issue where PSELECT system call is getting blocked.. although data is being pushed continuously from one end , However PSELECT is not getting unblocked. After some time we see socket buffer gets completely filled and it starts throwing no buffer exception.

As a recovery , we added timeout,

We would like to know if there is any such known issue with PSELECT.

post122469: PSelect Getting Blocked For A Long Time

2024-02-01T06:13:07Z

post122467: RPi4+screen with two displays

2024-01-27T18:31:25Z

I see in the release notes that the driver seems to support two outputs and I see the firmware loaded (the gradient colored square) if I plug two in. Any pointers for setting up the config file to support two pipelines? I'm just trying to see gles2-gears appear on the second display (using the -display= option).

And if anyone could verify if the eglSwapBuffers() actually waits for the vertical sync (or if screen_wait_vsync() works on the RPi), I'd be most appreciative. Trying to get good timing on display refreshes, but can't quite get that working.

Thanks!

post122447: Re: to get cpu percentage for each threads, not process

2024-01-08T10:28:48Z

Hi，there

I'm encountering an issue: at time t1, let t1_cpu = debug_thread_t.sutime, and at time t2, t2_cpu = debug_thread_t.sutime, with t2 - t1 = 1 being a constant value. Simultaneously, Δt_cpu is also a stable value. However, when I invoke settimeofday() to modify the system time, Δt_cpu immediately becomes a relatively small value. Could you please help me with the following questions: 1) What is the relationship between debug_thread_t.sutime and the system time, and why is it influenced by changes in the system time? 2) Are there any methods to obtain thread execution time that remains unaffected by changes in the system time?

post122442: Production System protection - QNX 7.1

2023-11-29T04:33:44Z

Hello,

We are now getting to the stage where we need to consider what protection mechanisms we want (or need) to employ with our system that will within the next few months (hopefully) enter production phase. I am very aware of the unique features provided by QNX to lock down the system (such as encrypted IFS, read-only IFS, procmgr abilities, etc). In our case we have an additional "security" mechanism and that is on our Xilinx (ARM64le) system the SD card is read-only. Despite our attempts to rectify it using guidance provided in the ZCU-104 release notes (another story). FYI, only the ZCU-102 allows us to write to SDMMC. Also, we are intending to use an Enclustra XU1 Mercury MP-SoC which is basically identical to the Xilinx products. (We need to use these expensive products because we have rather hefty FPGA requirements).

I am actually not too upset about this as ordinarily I would be happy for no writable mass storage device to be employed (by the production system). Except for one case scenario.

What is a generally accepted approach taken to lock down modern QNX systems that ordinarily require no write to non-volatile storage capability except when updating "firmware"?

While (as I said) I would ordinarily be content with a read-only SD based file system, for this purpose I think we really need it to be writable in certain but controlled circumstances (such as system updates). But the intent would be for it to be normally read-only. As a result we need to get these SD cards writable and we're working on that. But I am concerned that by doing so we open up a possible "back door".

We have tried to get eMMC working but like the SDMMC we can't write to it. We ran into all sorts of problems actually so we dropped that idea.

Should we be looking at employing QSPI (FLASH)? If so, how easy is it to provide a procedure for customers to use in order to update system firmware/software (whatever)? I'm not sure if providing JTAG capability and instructions would be a good idea. I haven't tried using QSPI before and am not sure how the IPL gets to find it and run the IFS from it. As I understand things there is no need to copy the IFS into memory - just the startup code.

So what is the recommended approach in this situation? If necessary, if QSPI is deemed to be the way forward we can look at that (it has certain attractions as at least it can't be removed for nefarious purposes)! The IPL provided in the BSP makes it easy to boot from SDMMC but I'm not sure what would need to be done to run from QSPI.

Thanks, and Cheers,

Geoff.

post122441: Re: Video Play Error

2023-11-27T11:10:31Z

You have various errors in the log, the first, AFAICT, being a SCSI I/O error, which usually points to trouble with HW.

-- Michael

post122440: Video Play Error

2023-11-27T06:09:09Z

Hello,

I have Salvator-XS board(m3n processor) and I try play .mp4 video on this board. I installed below package on qnxsoftware:

- QNX SDP 7.1 Multimedia - Encode and Casting

- QNX SDP 7.1 Multimedia - Media Renderer API

- QNX SDP 7.1 Multimedia - MP4 Container Support

- QNX SDP 7.1 Multimedia - MP4 Muxer Support

- QNX SDP 7.1 Multimedia - Playback

- QNX SDP 7.1 Multimedia - Resource Arbiter

- QNX SDP 7.1 Multimedia - RTP Input Support

- QNX SDP 7.1 Multimedia - RTP Output Support

- QNX SDP 7.1 Multimedia - RTSP Input Support

- QNX SDP 7.1 Multimedia - Screen Output Support

- QNX SDP 7.1 Multimedia - Stream Buffering Support

- QNX SDP 7.1 Multimedia - Stream Reading Support

- QNX SDP 7.1 Multimedia - Stream and Casting Server

- QNX SDP 7.1 Multimedia - Video Thumbnail Output Support

And I added .scripts on this site to my .build file

https://www.qnx.com/developers/docs/7.1/index.html#com.qnx.doc.mm.target_images/topic/script.html

Also I added code lines on this site to my .build file:

https://www.qnx.com/developers/docs/7.1/index.html#com.qnx.doc.mm.target_images/topic/contents.html

After I copied test.mp4 file to USB-Flash and and I mounted flash this command:

'mount -t dos /dev/hd0t11 /tmp/'

And go to /tmp folder. Run this command:

'mmrplay -a "" -v screen: /tmp/test.mp4'

Board return this:

'/tmp/test.mp4: error 5 "MMR_ERROR_UNSUPPORTED_MEDIA_TYPE" (mmf#4047,"Can't build graph")'

Any suggestion?

Best Regards,

Serhat

post122431: Re: Binding QNET to ip using QNX7.1

2023-11-07T22:15:14Z

Hi Mario,

I got diverted away from my IP binding problem for a few days. A couple of hours at it yesterday did not bear fruit so I have raised a ticket with the support folks.

Thanks for your input!

Geoff.

post122422: Re: Legacy MSI without Per Vector Masking (PVM) support

2023-11-03T03:36:58Z

Tried on real hardware PCM-26D2CA PCIe CAN device, Advantech iDoor Module: 2-Ports Isolated CANBus mPCIe, DB9

Same result, the PCI 0x05 capability functions report Per Vector Masking (PVM) is not supported.

With such hardware, what is the usual practice? Do you just ignore masking/unmasking the MSI interrupts? Or is there some other way to mask/unmask?

post122420: Re: Legacy MSI without Per Vector Masking (PVM) support

2023-11-01T06:20:17Z

Re: https://github.com/Deniz-Eren/dev-can-linux/blob/main/src/pci-capability.c#L264

post122419: Re: Legacy MSI without Per Vector Masking (PVM) support

2023-11-01T06:17:50Z

For clarrity, to test MSI even though error PCI_ERR_ENOTSUP is reported, I have commented out our check for PVM support. As said, from a send/receive perspective, in QEmu VM, it seems to be working. I just need validation this is a valid way forwards, or do we need an alternative mask/unmask besides the MSI API?

if (capid == CAPID_MSI) {

    cap_msi_mask_t mask;



    r = cap_msi_get_irq_mask(dev->hdl, dev->msi_cap, &mask);



    if (r == PCI_ERR_ENOTSUP) {

        log_err("capability 0x%02x (MSI) Per Vector Masking (PVM) not "

                "supported\n", capid);



        //msix_uninit(dev);

        //return r;

    }

    else if (r != PCI_ERR_OK) {

        log_err("cap_msi_get_irq_mask error; %s\n", pci_strerror(r));



        msix_uninit(dev);

        return r;

    }

}

post122418: Legacy MSI without Per Vector Masking (PVM) support

2023-11-01T06:10:54Z

I have a public open-source project that aims to porting of Linux CAN-bus drivers to QNX.

Repository: https://github.com/Deniz-Eren/dev-can-linux

I have a question regarding PCI capability 0x05 (MSI) usage when Per Vector Masking (PVM) isn't supported by legacy devices.

Calling function cap_msi_get_irq_mask() returns PCI_ERR_ENOTSUP as per the MSI API documentation: https://www.qnx.com/developers/docs/7.1/#com.qnx.doc.pci_server/topic/module_msi.html

Quote: "The following APIs retrieve the interrupt pending/mask values, respectively, if Per Vector Masking (PVM) is supported"

This fine, however the question that comes next, if I'm dealing with a legacy PCI device, which has MSI support, however does NOT support Per Vector Masking (PVM), then how do I mask and unmask MSI vectors? Is it OK to just not mask at all?

I haven't tested with real hardware yet, this pending, however, I have tested with QEmu, by implementing support for such a device (https://github.com/Deniz-Eren/qemu/tree/feature/can-sja100-pci-msi-support). This test is effectively done without masking and unmasking; the driver seems to work correctly. Well to elaborate more, the driver is still calling the masking API functions and printing error messages "error: Requested Operation Is Not Supported [(PCI_ERR_ENOTSUP)]" from pci_strerror().

So summarize, do you recommend doing any other type of masking than the MSI API functions when using this type of legacy device that has MSI but does NOT support Per Vector Masking (PVM)?

post122417: Re: Binding QNET to ip using QNX7.1

2023-10-31T07:37:45Z

Hi, Geoffrey, standard support is Ok, they will support You well.

BTW I suspect the trouble is in the dns option: probably the name of the target is not

registered or You do not have a dns in touch....

maybe You can try just with the ip ecapslulation:

mount -T io-pkt -o bind=genet0,bind=ip lsm-qnet.so

good work

Mario

post122416: Re: Binding QNET to ip using QNX7.1

2023-10-31T02:39:57Z

Hi Mario,

Following your instructions I'm not having much luck. As you will see I'm employing your 2nd mount option (no "mount:-").

The scenario is as follows:

Two RP4's connected to each other via a network switch.

One has the hostname "rpi4-teg" with the IP address 192.168.15.213 and the other "rpi4-ndldev" with the IP address 192.168.15.209. /etc/hosts file below.

When QNET is started as follows both (and a couple of other QNX machines) become visible in /net and everything works fine:

mount -T io-pkt -o bind=genet0 lsm-qnet.so

However, when QNET is started, attempting to bind to IP, as follows only the hostname shows in /net.

mount -T io-pkt -o bind=genet0,bind=ip,resolve=dns lsm-qnet.so

I don't expect the other two QNX7.1 machines on the network to remain visible as they are "pure" QNET - no IP encapsulation. But I would have expected the two that are intended to have IP encapsulation to appear in each ones /net directory. For example:

ls /net

/rpi4-teg   /rpi4-ndldev

But only one appears - the name of the RPi4 issuing the command.

I have tried changing various timeout and retry options to no avail. Certainly, my lsm-qnet.so setup in QNX6.5 doesn't work! :-)

The intent is to not have a switch but instead for each to be connected point-to-point using Ubiquiti NanoStation M5's that of course can route only IP. These are both configured with IP addresses on the same network as 192.168.15.20 and 192.168.15.21 respectively.

With rpi4-ndldev physically connected ONLY to the Ubiquiti (no switch connection) I am able to ping rpi4-teg (using the serial terminal). Likewise from an SSH terminal on rpi4-teg I can ping rpi4-ndldev. This proves that the wireless system and IP is working.

The syslog entries start showing "bad layer 2" messages (as shown below). I don't know what these mean or why they occur. Any help with this much appreciated! (BTW, we do have a standard support agreement but I thought I'd try the forum first as I figure - and am hoping - that this will be real easy to resolve)!

Anyway, following is how I am configuring both Pi's :

Thanks for your attention! :-)

Geoff.

--------------------------------------------------------------------------

// The network driver is started in ifs-rpi4.bin (IFS)



    #######################################################################

    ## Network driver

    #######################################################################

    display_msg Starting Network driver...

    io-pkt-v6-hc

    mount -T io-pkt /lib/dll/devnp-genet.so

    if_up -p genet0

    /lib/dll/lsm-qnet.so=lsm-qnet.so

--------------------------------------------------------------------------

// output of slog2info - filtered to include io-pkt related entries. Note that the RTC is not read until after the mount -T io-pkt -o bind=genet,bind=ip... call

Jan 01 12:00:00.372                    iopkt.65549          main_buffer*     0  tcpip starting

Jan 01 12:00:00.372                    iopkt.65549          main_buffer      0  smmu support is disabled

Jan 01 12:00:00.374                    iopkt.65549          main_buffer      0  initializing IPsec...

Jan 01 12:00:00.374                    iopkt.65549          main_buffer      0   done

Jan 01 12:00:00.374                    iopkt.65549          main_buffer      0  IPsec: Initialized Security Association Processing.

// this is presumably from the following in the IFS

  io-pkt-v6-hc

  mount -T io-pkt /lib/dll/devnp-genet.so

Jan 01 12:00:00.376                    iopkt.65549          main_buffer      0  /lib/dll/devnp-genet.so (null)

Jan 01 12:00:00.376                    iopkt.65549          main_buffer      0  genet0

Jan 01 12:00:00.478             io_pkt_v6_hc.65549                 slog*     0  genet:genet_ext_phy_init():309: Detected PHY vendor OUI:0x180361.

Jan 01 12:00:00.488             io_pkt_v6_hc.65549                 slog      0  genet:genet_init():621: MAC: e4:5f:01:fd:eb:c4

Jan 01 12:00:00.488             io_pkt_v6_hc.65549                 slog      0  genet:genet_init():630: Attaching interrupt(189).

Jan 01 12:00:00.699             io_pkt_v6_hc.65549                 slog      0  genet:genet_init():621: MAC: e4:5f:01:fd:eb:c4

--------------------------------------------------------------------------



// /etc/rc.d/rc.local then executes the following :

ifconfig genet0 192.168.15.213 netmask 255.255.255.0 up

mount -T io-pkt -o bind=genet0,bind=ip,resolve=dns lsm-qnet.so

--------------------------------------------------------------------------

// this resulting from the mount -T io-pkt -o bind=genet0,bind=ip,...

Jan 01 12:00:01.248                    iopkt.65549          main_buffer      0  lsm-qnet.so bind=genet0,bind=ip,resolve=dns

Jan 01 12:00:01.248             io_pkt_v6_hc.65549                 slog      0  qnet(L4): qnet_birth(): qnet_init() - calling

Jan 01 12:00:01.248             io_pkt_v6_hc.65549                 slog      0  qnet(kif): mac_load(): security policy not being used

Jan 01 12:00:01.249             io_pkt_v6_hc.65549                 slog      0  qnet(L4): try_ifp(): new interface: genet0: index 0 mac addr E4:5F:01:FD:EB:C4

Jan 01 12:00:01.249             io_pkt_v6_hc.65549                 slog      0  qnet(QOS): nd_change_notify(): Node Up:   nd 0 rpi4-teg.rtts

Jan 01 12:00:01.250             io_pkt_v6_hc.65549                 slog      0  qnet(L4): qnet_birth(): qnet_init() - complete

// RTC has now been read [from within rc.local] so we have "real" time set

Oct 31 13:29:39.513             io_pkt_v6_hc.65549                 slog      0  genet:genet_mdi_callback():233: if=genet0: Link up (100 BaseT Full Duplex)

// What do these "bad layer" entries mean?

Oct 31 13:29:54.277             io_pkt_v6_hc.65549                 slog      0  qnet(QOS): rx_user_data(): bad layer 2 rxd from nd 0

Oct 31 13:29:57.301             io_pkt_v6_hc.65549                 slog      0  qnet(QOS): rx_user_data(): bad layer 2 rxd from nd 0

Oct 31 13:30:24.274             io_pkt_v6_hc.65549                 slog      0  qnet(QOS): rx_user_data(): bad layer 2 rxd from nd 0

Oct 31 13:30:27.299             io_pkt_v6_hc.65549                 slog      0  qnet(QOS): rx_user_data(): bad layer 2 rxd from nd 0

Oct 31 13:30:54.271             io_pkt_v6_hc.65549                 slog      0  qnet(QOS): rx_user_data(): bad layer 2 rxd from nd 0

Oct 31 13:30:57.296             io_pkt_v6_hc.65549                 slog      0  qnet(QOS): rx_user_data(): bad layer 2 rxd from nd 0

Oct 31 13:31:24.268             io_pkt_v6_hc.65549                 slog      0  qnet(QOS): rx_user_data(): bad layer 2 rxd from nd 0

Oct 31 13:31:27.293             io_pkt_v6_hc.65549                 slog      0  qnet(QOS): rx_user_data(): bad layer 2 rxd from nd 0

Oct 31 13:31:54.266             io_pkt_v6_hc.65549                 slog      0  qnet(QOS): rx_user_data(): bad layer 2 rxd from nd 0

Oct 31 13:31:57.291             io_pkt_v6_hc.65549                 slog      0  qnet(QOS): rx_user_data(): bad layer 2 rxd from nd 0

Oct 31 13:32:24.263             io_pkt_v6_hc.65549                 slog      0  qnet(QOS): rx_user_data(): bad layer 2 rxd from nd 0

Oct 31 13:32:27.288             io_pkt_v6_hc.65549                 slog      0  qnet(QOS): rx_user_data(): bad layer 2 rxd from nd 0

--------------------------------------------------------------------------

/etc/hosts on both RPi4 units are the same:

#

# Host Database

#

127.1 localhost.localdomain localhost

::1 localhost.localdomain localhost

192.168.15.20 ub_teg

192.168.15.21 ub_ndldev

192.168.15.213 rpi4-teg

192.168.15.209 rpi4-ndldev

post122415: Re: pci-server RPi4 [solved]

2023-10-28T19:07:19Z

So some searching through qnx software manager made led me to the newer version of pci_hw-bcm2711-rpi4.so.3.0 in the PCI HW Module, which I had installed. The problem was that I had a pci folder in my BSP working directory that was being used to pull in 2.0. This is not in the newer release of the BSP from what I can tell, but I still had the folder around. Once I got rid of it, the version from the target/qnx7/aarch64/lib/dll/pci was used.

Sorry for wasted bandwidth!

-David

post122414: Re: pci-server RPi4

2023-10-28T01:46:46Z

Of course I should have looked in slog, which clearly indicates the pci_hw-bcm2711-rpi4.so is incompatible:

Dec 31 19:14:21.262              pci_server.372761              pci_log      0  ERROR,0,-2,5 [372761:1]: Module /lib/dll/pci/pci_hw-bcm2711-rpi4.so, v2.0 failed to load, err: Module Is Incompatible With Current PCI Server or Library Version [(PCI_ERR_MOD_COMPAT)]

Dec 31 19:14:21.262           pci_server.372761..0              pci_dbg      0  DEBUG,1,2,5 [372761:1]: probe for B0:D0:F0  failed, vid = 0x2035, Module Does Not Exist Or Could Not Be Loaded [(PCI_ERR_NO_MODULE)]

Dec 31 19:14:21.262              pci_server.372761              pci_log      0  ERROR,0,0,5 [372761:1]: ** Enumeration Aborted, Module Does Not Exist Or Could Not Be Loaded [(PCI_ERR_NO_MODULE)]

Dec 31 19:14:21.262              pci_server.372761              pci_log      0  INFO ,1,0,5 [372761:1]: pci_max_bus = -1

Dec 31 19:14:21.262              pci_server.372761              pci_log      0  INFO ,1,1,5 [372761:1]: enumerate_bus_hierarchy(), Module Does Not Exist Or Could Not Be Loaded [(PCI_ERR_NO_MODULE)]

Dec 31 19:14:21.262              pci_server.372761              pci_log      0  INFO ,1,0,5 [372761:1]: ++ enumeration only complete, status Module Does Not Exist Or Could Not Be Loaded [(PCI_ERR_NO_MODULE)] ++

Dec 31 19:14:21.262              pci_server.372761              pci_log      0  INFO ,1,-10,5 [372761:1]: + PCI Server v3.0 init complete, Module Does Not Exist Or Could Not Be Loaded [(PCI_ERR_NO_MODULE)] +

Dec 31 19:14:21.262              pci_server.372761              pci_log      0  INFO ,1,-10,5 [372761:1]:

Is there a newer version of this available that I might have missed?

post122413: pci-server RPi4

2023-10-28T01:33:41Z

I have rebuilt our OS image for RPi4 using updated qnxsoftware components, but version 3.0 of pci-server doesn't seem to work with my RPi4 BSP (no /dev/pci is found).

I see the Release History which says:

"This component is incompatible with all pre v3.x PCI components"

My new image has libpci.so linked to libpci.so.3.0 but perhaps there is something I should change in the build file for the OS image?

Any suggestions welcome!

David Sheinberg

post122411: Re: Binding QNET to ip using QNX7.1

2023-10-27T06:58:49Z

Hi Geoffrey, qnet is documented in many places, but You can get some usefull info

about the dll options using this command:

use lsm-qnet.so

Try to use this command:

mount -Tio-pkt -o"mount=:",bind=fec0,bind=ip,resolve=dns lsm-qnet.so &

or:

mount -Tio-pkt -o bind=fec0,bind=ip,resolve=dns lsm-qnet.so &

Mount options is this one:

mount=directory[:[.]domain]*

     A network directory. Default directory is "/net".

     Default domain is either the hostname domain if

     it has one, or the directory with the slashes changed

     to dots and reversed. i.e. "/net/outside/canada" would

     have a domain of "canada.outside.net".

     The first mount is the default directory and domain

     that the local hostname will resolve through.

I have specified the default options, so You can also omit the mount (it's just a my preference)

You have to specify two bind options, one for interface (fec0 or en0 or any other You have)

and one to bind the ip : it is not indented to be a OR option :-)

>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>

Oct 27 08:44:43.600                   iopkt.274462          main_buffer      0  lsm-qnet.so mount=:,bind=fec0,bind=ip,resolve=dns

Oct 27 08:44:43.601            io_pkt_v6_hc.274462                 slog      0  qnet(L4): qnet_birth(): qnet_init() - calling

Oct 27 08:44:43.602            io_pkt_v6_hc.274462                 slog      0  qnet(kif): mac_load(): security policy not being used

Oct 27 08:44:43.604            io_pkt_v6_hc.274462                 slog      0  qnet(L4): try_ifp(): new interface: fec0: index 0 mac addr 20:0A:0D:70:1C:46

Oct 27 08:44:43.604            io_pkt_v6_hc.274462                 slog      0  qnet(QOS): nd_change_notify(): Node Up:   nd 0 tec-cpucoms.net.intra

Oct 27 08:44:43.605            io_pkt_v6_hc.274462                 slog      0  qnet(L4): qnet_birth(): qnet_init() - complete

Oct 27 08:44:43.804            io_pkt_v6_hc.274462                 slog      0  qnet(L4): lr_verify_my_name_and_domain(): set _CS_DOMAIN

Oct 27 08:44:44.003            io_pkt_v6_hc.274462                 slog      0  qnet(L4): lr_verify_my_name_and_domain(): starting resolution of our hostname tec-cpucoms.net.intra

to ensure unique

Oct 27 08:44:44.329                   iopkt.274462          main_buffer      0  mx6q_mii_callback(): link up lan 0 idx 0 (1000 BaseT Full Duplex)

Oct 27 08:44:44.403            io_pkt_v6_hc.274462                 slog      0  qnet(L4): lr_verify_my_name_and_domain(): qnet going online

Oct 27 08:44:44.604            io_pkt_v6_hc.274462                 slog      0  qnet(L4): lr_inbound(): rxd pkt type 2 with duplicate name/domain, staying online

>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>

post122410: Re: Binding QNET to ip using QNX7.1

2023-10-27T02:35:56Z

Hi Mario,

Thanks for responding.

Where is all this documented? I have never seen the -o "mount=:" notation and can't find any other reference to it.Can you explain it a bit please?

QNET works fine for all nodes that DON'T attempt to encapsulate the QNET packets inside IP. In other words, when I add the following mount command:

mount -T io-pkt -o bind=ip0,resolve=dns lsm-qnet.so /net becomes empty.

I figure the that "ip0" means use teh IP encapsulation on the network interface "0" - for example en0 or genet0, or even fec0. But I might be wrong as the documentation for lsm-qnet.so simply quotes "bind=ip" with no numerical indicator. But in the past (with QNX6.5) it was always ip0 -> en0 or ip1 -> en1. I am assuming that on the RPi4 bind=ip0 will/should use genet0.

The documentation is quite clear in stating that when binding to ip, the resolver MUST be dns. I presume that means the IP addresses need to be in /etc/host mapping to the node name (hostname)

I won't be back in my office until Tuesday (Eastern Australia time) so I won't be able to play much until then.

Cheers,

Geoff.

> Hi Geoffrey , i've try on my board (QNX7.1/ARM) to run qnet with the following

>  options:

>   mount -Tio-pkt -o"mount=:" lsm-qnet.so &

> (autoresolve)

>   mount -Tio-pkt -o"mount=:",bind=fec0 lsm-qnet.so &

>   mount -Tio-pkt -o"mount=:",bind=fec0,resolve=dns lsm-qnet.so &

>

> All works ok and I've the /net directoty populated.

> Have You verified that network is up and running?

> You can try to specify the  mount point explicitly in the arguments (mount=:)

>

> Mario

>

>

post122408: Re: Binding QNET to ip using QNX7.1

2023-10-26T07:26:26Z

Hi Geoffrey , i've try on my board (QNX7.1/ARM) to run qnet with the following options:

  mount -Tio-pkt -o"mount=:" lsm-qnet.so &                                  (autoresolve)

  mount -Tio-pkt -o"mount=:",bind=fec0 lsm-qnet.so &

  mount -Tio-pkt -o"mount=:",bind=fec0,resolve=dns lsm-qnet.so &

All works ok and I've the /net directoty populated.

Have You verified that network is up and running?

You can try to specify the  mount point explicitly in the arguments (mount=:)

Mario

post122407: Binding QNET to ip using QNX7.1

2023-10-26T05:54:59Z

Hello,

With QNX 6.5 on an x86 platform I was able to bind QNET to IP using mount as follows:

mount -T io-pkt -o bind=ip0,resolve=dns /lib/dll/lsm-qnet.so

The interface was en0 (or en1). I had a few extra arguments to do with timing and retries but they don't seem to help me here.

I am trying to do the same thing with QNX 7.1 on Raspberry Pi4's.

The command above creates /net but it remains empty. Note that I'm doing this with both Pi's and there is a pair of Ubiquiti Nanostation 5M wifi modems between them.

I modified the genet shared object to set up the interfaces as en0 instead of genet0 but this doesn't help. Fine with IP but not QNET.

The node names are in /etc/host.

Is there something I'm missing? Is this facility available in 7.1? (the documentation describes how to use lsm-qnet.so so I presume it's available in 7.1). There are no examples.

Could it be something to do with gns? (the global name server) Each is started as follows:

gns -s <hostname>

Any hints/ideas welcome and appreciated!

Geoff.

post122404: Re: Concerns with offset parameter of pci_device_cfg_rd() and pci_device_cfg_wr() series of functions

2023-10-18T22:35:17Z

Thank you Elad.

At least this gives us the confidence our implementation has done the correct thing.

post122403: Re: Concerns with offset parameter of pci_device_cfg_rd() and pci_device_cfg_wr() series of functions

2023-10-18T14:28:00Z

The offset is absolute and starts at 0. These functions will return an

error if the offset is below 0x40.

I agree the comment can be made clearer.

--Elad

On Tue, 2023-10-17 at 02:07 -0400, Deniz Eren wrote:

> I have a public open-source project that aims to porting of Linux

> CAN-bus drivers to QNX.

> Repository: https://github.com/Deniz-Eren/dev-can-linux

>

> I have question regarding the offset input parameter of

> pci_device_cfg_rd*() and pci_device_cfg_wr*() series of functions.

>

> Looking at QNX library file: qnx710/target/qnx7/usr/include/pci/pci.h

> We see comment: "The following functions provide read access to the

> device dependent portion of the 256/4096 byte PCI/PCIe configuration

> space from 0x40 to 0xFF/0xFFF."

>

> This sounds like the offset input parameter of pci_device_cfg_rd*()

> and pci_device_cfg_wr*() series of functions means offset=0x00 refers

> to the first byte of the configuration space that starts at 0x40 and

> goes through to to 0xFF/0xFFF. However, in practice one of our

> community members found that when they were testing with the

> peak_pci.c driver, that these pci_device_cfg_rd*() and

> pci_device_cfg_wr*() series of functions do not start at 0x40 but

> start at 0x00. So to access the configuration space at 0x40 to

> 0xFF/0xFFF we had to add 0x40 to the address offset to get equivalent

> behaviour as that of the same code running on Linux.

>

> This peak_pci.c, is one of the drivers we have ported from Linux and

> it's the Peak driver:

> https://github.com/Deniz-Eren/dev-can-linux/blob/main/src/kernel/drivers/net/can/sja1000/peak_pci.c

>

> At line 590 you see:

>     err = pci_read_config_word(pdev, 0x2e, &sub_sys_id);

>     if (err)

>             goto failure_release_regions;

>

> At line 597 you see:

>     err = pci_write_config_word(pdev, 0x44, 0);

>     if (err)

>             goto failure_release_regions;

>

> This peak_pci.c have been taken from the Linux kernel source code as-

> is (https://github.com/torvalds/linux). To interface to QNX we have

> implemented the Linux functions pci_write_config_word() and

> pci_read_config_word() as

> https://github.com/Deniz-Eren/dev-can-linux/blob/main/src/pci.c

>

> As you can see, in our implementation we had to call

> pci_device_cfg_rd*() and pci_device_cfg_wr*() with a +0x40 for the

> peak_pci.c driver to work properly.

>

> This means, either the comment block for pci_device_cfg_rd*() and

> pci_device_cfg_wr*() series of functions in file

> qnx710/target/qnx7/usr/include/pci/pci.h is misleading or incorrect

> and it should say 0x00 to 0xFF/0xFFF. Otherwise, the implementation

> of these functions are incorrect and they need to be updated to

> actually give access to 0x40 to 0xFF/0xFFF.

>

> Any comments?

>

>

>

> _______________________________________________

>

> OSTech

> http://community.qnx.com/sf/go/post122397

> To cancel your subscription to this discussion, please e-mail

> ostech-core_os-unsubscribe@community.qnx.com

post122397: Concerns with offset parameter of pci_device_cfg_rd() and pci_device_cfg_wr() series of functions

2023-10-17T06:07:35Z

I have a public open-source project that aims to porting of Linux CAN-bus drivers to QNX.

Repository: https://github.com/Deniz-Eren/dev-can-linux

I have question regarding the offset input parameter of pci_device_cfg_rd*() and pci_device_cfg_wr*() series of functions.

Looking at QNX library file: qnx710/target/qnx7/usr/include/pci/pci.h

We see comment: "The following functions provide read access to the device dependent portion of the 256/4096 byte PCI/PCIe configuration space from 0x40 to 0xFF/0xFFF."

This sounds like the offset input parameter of pci_device_cfg_rd*() and pci_device_cfg_wr*() series of functions means offset=0x00 refers to the first byte of the configuration space that starts at 0x40 and goes through to to 0xFF/0xFFF. However, in practice one of our community members found that when they were testing with the peak_pci.c driver, that these pci_device_cfg_rd*() and pci_device_cfg_wr*() series of functions do not start at 0x40 but start at 0x00. So to access the configuration space at 0x40 to 0xFF/0xFFF we had to add 0x40 to the address offset to get equivalent behaviour as that of the same code running on Linux.

This peak_pci.c, is one of the drivers we have ported from Linux and it's the Peak driver: https://github.com/Deniz-Eren/dev-can-linux/blob/main/src/kernel/drivers/net/can/sja1000/peak_pci.c

At line 590 you see:

    err = pci_read_config_word(pdev, 0x2e, &sub_sys_id);

    if (err)

            goto failure_release_regions;

At line 597 you see:

    err = pci_write_config_word(pdev, 0x44, 0);

    if (err)

            goto failure_release_regions;

This peak_pci.c have been taken from the Linux kernel source code as-is (https://github.com/torvalds/linux). To interface to QNX we have implemented the Linux functions pci_write_config_word() and pci_read_config_word() as https://github.com/Deniz-Eren/dev-can-linux/blob/main/src/pci.c

As you can see, in our implementation we had to call pci_device_cfg_rd*() and pci_device_cfg_wr*() with a +0x40 for the peak_pci.c driver to work properly.

This means, either the comment block for pci_device_cfg_rd*() and pci_device_cfg_wr*() series of functions in file qnx710/target/qnx7/usr/include/pci/pci.h is misleading or incorrect and it should say 0x00 to 0xFF/0xFFF. Otherwise, the implementation of these functions are incorrect and they need to be updated to actually give access to 0x40 to 0xFF/0xFFF.

Any comments?

post122371: Re: emulate linux kernel api

2023-09-11T15:45:00Z

> seems already have an similar project: https://os.inf.tu-dresden.de/ddekit/

Seems to be very old and was used to run Linux UIO-drivers only, if I understand that approach right.

post122370: Re: emulate linux kernel api

2023-09-11T15:40:05Z

> It's possible and an good idea to emulate linux kernel api, that will make

> port linux driver to qnx more easy.

Linux kernel API? I have never seen one.

Or do you mean the sum of all functions and macros, a special Linux Kernel configuration provides?

Well, since hardware is not documented any more and chip makers patch their stuff in the Linux Kernel only, driver developers need to be creative.

To answer your question, using unchanged Linux Kernel driver code is already done under QNX.

Actually Intel Graphics needs the drm-intel resource manager, emulating half of the Linux-Kernel, to use a million of unchanged lines of Linux Driver Code from Intel.

# drm-intel -v

i915/DRM Linux kernel 4.14.14

#

If you like to use that emulation code, simply ask Blackberry for the source of drm-intel.

From my point of view this approach is very ugly, but indeed a cool demonstration of the QNX mircokernel architecture, allowing to hide a Linux Kernel in one resource manager process and for example a NetBSD Kernel in an other process to realize a TCP/IP stack.

> freebsd and netbsd have an linux emulator, but that seems mainly for run linux

> application directly.

freebsd and netbsd utilize a Linux binary compatible trap-Interface. Yes, this is for using Linux userland stuff.

So you can bootstrap a GNU/Linux OS, like debian, normally using a Linux-Kernel, without a Linux Kernel.

post122369: Re: emulate linux kernel api

2023-09-09T03:39:58Z

seems already have an similar project: https://os.inf.tu-dresden.de/ddekit/

post122368: Re: emulate linux kernel api

2023-09-08T01:32:26Z

opposite, because qnx is microkernel, all device is on userspace that make it possible to emulate core linux kernel program api(lkpi) and linux device driver module api, and maximum extent, reuse linux device driver

this maybe an reusable device driver framework for all microkernel.

post122367: Re: emulate linux kernel api

2023-09-07T05:49:02Z

Since QNX system architecture (microkernel) is quite different from Linux (monolith), I wonder how far that would get you ...

-- Michael

________________________________

From: lin xiang <community-noreply@qnx.com>

Sent: Thursday, September 7, 2023 05:53

To: ostech-core_os

Subject: emulate linux kernel api

It's possible and an good idea to emulate linux kernel api, that will make port linux driver to qnx more easy.

freebsd and netbsd have an linux emulator, but that seems mainly for run linux application directly.

_______________________________________________

OSTech

http://community.qnx.com/sf/go/post122366

To cancel your subscription to this discussion, please e-mail ostech-core_os-unsubscribe@community.qnx.com

post122366: emulate linux kernel api

2023-09-07T03:53:09Z

It's possible and an good idea to emulate linux kernel api, that will make port linux driver to qnx more easy.

freebsd and netbsd have an linux emulator, but that seems mainly for run linux application directly.

post122354: Re: Unable to launch QNX at Vbox

2023-08-02T08:38:26Z

Thank you so much! Now it is working fine after those changes.

post122353: Re: Unable to launch QNX at Vbox

2023-08-02T08:26:39Z

Hi Roger Thank You very much for the help!

I've just place these libraries in the hos/common/mkqnximage/snippets/if_files.buildin

lib/libpci.so.2.0

lib/libpci.so.2.3

lib/libpci.so.3.0

Rebuilding a new vm and now all works well.

I've changed the template instate of the /local/snippets as You suggested in order to

create new machine from scratch with these library (maybe it not the rigth place, but

it works for me)

For Victor:

I've build also a VM for virtual box (Ver 7.0.6 r155176) and now it works like the vmware image

(Ver 17.0.2 build-21581411)

I works with 7.1 release updated with PCI v3 libraries and all other stuffs using Software Center.

Thank again for support,

Mario

post122352: Re: Unable to launch QNX at Vbox

2023-08-02T05:14:39Z

Hello Roger,

I've been trying this way but still don't work. The error at screen is the same as it was.

Thank you so much for your support.

post122351: Re: Unable to launch QNX at Vbox

2023-08-01T16:18:06Z

Actually I was mistaken about the setfacl command. It might be important but only if you're using the --secpol option.

My guess is that the issue is that the PCIv3 update has changed the soversion of libpci to libpci.so.3.0 but all the existing PCI clients expect libpci.so.2.0

I believe there is a variant of libpci.so.2.0 that supports older clients with the newer version of PCI (in a PCI shim library package).

So, quite possibly if you update the file local/snippets/ifs_files.custom and add:

lib/libpci.so.2.0

and rebuild your VM then it might work.

post122350: Re: Unable to launch QNX at Vbox

2023-08-01T15:27:00Z

Hi, Roget, I've search in my qnx710 instalation and I've not found any reference to /dev/shmem/pci_* in any files...

however, it's a good suggestion, there might be some template file hiding the pci setting somewhere...

Thanks,

Mario

post122349: Re: Unable to launch QNX at Vbox

2023-08-01T14:45:58Z

Regarding the PCI issue when using mkqnximage if the problem is networking it might be due to the location of the PCI database changing with the PCIv3 release.

You could try changing host/common/mkqnximage/inputs/startup.sh

There's a invocation of setfacl to change ACLs for /dev/shmem/pci_*. The path should be changed to /dev/shmem/pci/pci_*.

post122348: Re: Unable to launch QNX at Vbox

2023-08-01T07:52:23Z

Hi, I've the same problem on a vmware machine.

For me it is related to the new PCIv3 Experimental Update : after the update all virtual machines

have stopped to works, also after they where rebuilded from scratch.

I' ve dig into host/common/mkqnximage files but I've not found anything that justify this error:

maybe some missing/wrong library?

Return back to previous PCI release will fix the problem.

Any idea how to fix this with PCIv3 ?

And is this update working on a true target ?

Regards,

Mario

post122346: Re: Unable to launch QNX at Vbox

2023-07-25T06:32:39Z

Thank you so much for your answer.

I've been testing the 6.x version of Vbox but still not working.

It seems that the image lost some dependencies, and symbol _ITM_registerTMCloneTable is missed.

Regards,

Víctor

post122345: Re: Unable to launch QNX at Vbox

2023-07-24T21:44:13Z

You could try the latest VirtualBox from the 6.x stream rather than 7.x.

VirtualBox appear to break things every so often, the e1000 interface was broken for months and was subsequently fixed. I know there are issues running QNX with 7.x though I don't recall what they are.

post122341: Memory Partition 2023

2023-07-18T06:24:12Z

Hello!

Is the APM reliased now.

http://community.qnx.com/sf/wiki/do/viewPage/projects.core_os/wiki/Memory_Partitioning_Technology

post122340: Unable to launch QNX at Vbox

2023-07-17T12:26:14Z

Hi all,

I am unable to launch QNX 7.1 on Vbox as x86_64 emulator. I am using Windows 10, QNX 7.10 on evaluation license with momentics 7.1.2.v202203081633, and Vbox Versión 7.0.8 r156879 (Qt5.15.2).

My issue is as follows:

I can create properly the Virtual machine, but when it is started the network cannot be configured and following message is shown: ifconfig: getifaddrs: address family not supported by protocol family.

I was trying to deal with this issue using the QNX documentation (https://www.qnx.com/developers/docs/7.1/#com.qnx.doc.neutrino.utilities/topic/m/mkqnximage.html) but I can not get a solution.

Thanks in advance.

post122338: Re: Post pandemic Raspberry Pi4's don't seem to work.

2023-07-06T08:12:11Z

We have managed to figure out how to write to the SD card in teh post-pandemic RPi4's by starting the SDMMC driver as follows:

devb-sdmmc-bcm2711 mem name=below1G sdio addr=0xfe340000,irq=158 disk name=sd blk mntperms=755

We notice a small loss of read/write performance but it's acceptable. It works for us!

Geoff.

post122337: Re: Post pandemic Raspberry Pi4's don't seem to work.

2023-07-06T02:52:59Z

In regards to our inability to write to the SD card using post-pandemic RPi4's, my colleague here has managed to resolve it. We can now write to any partition type (in our case 12 and 177). The following works for us with only a slight loss of read/write performance.

devb-sdmmc-bcm2711 mem name=below1G sdio addr=0xfe340000,irq=158 disk name=sd blk mntperms=755

Basically, he removed everything to do with the bus master.

Geoff.

post122330: Re: access() not behaving as expected

2023-06-21T06:26:18Z

Thanks for the detailed explanation!

Indeed, after denying the ability everything works as expected.

We also tried another solution: temporarily dropping privileges to open the file. That works always as expected. And in fact that's the more secure solution anyway (no race condition between permission check/using file), so we should have done that first.

post122329: Re: access() not behaving as expected

2023-06-20T22:04:16Z

You will find that if you check W_OK instead if R_OK it will behave as you expect (and the same as Linux).

The reason that R_OK behaves differently is due to procmgr abilities. There is an ability iofunc/read that allows read access to files denied by POSIX permissions. Testing of this ability is always based on effective user ID. By default root has this ability so when you call access(R_OK) with the setuid root executable, it fails the POSIX access checks but gets overridden by the ability.

If you deny the ability in the shell:

ability deny,all,inherit,able=iofunc/read

you will now find it behaves as you expect.

This could be considered a bug, probably everything in the call to access() should be based on real ID. The workaround is to deny the ability. There are few legitimate uses for the ability irrespective of this issue we'd recommend denying the ability since it tends to mask file system permission issues. I will however log it as a bug.

post122327: access() not behaving as expected

2023-06-20T09:26:09Z

The POSIX call access() seems to behave not as expected on QNX. According to the doc, access() uses the *real* user ID to check if a file can be accessed. The Linux call effectively does this. But on QNX, it seems to use the *effective* user ID.

Test environment: QNX 7.1.0

Setup (a file only readable by root, 2 versions of the tool readable, one suid, one not) (the tool readable is the example from the access() documentation with some printf() statements for the different IDs):

$ ls -al

total 55

drwxr-xr-x   2 root      root           4096 Jun 12 01:36 .

drwxr-xr-x   6 root      root           4096 Jun 12 01:36 ..

-rw-------   1 root      root             74 Jun 12 01:36 data

-rwxr-xr-x   1 root      root           9696 Jun 12 01:31 readable

-rwsr-xr-x   1 root      root           9696 Jun 12 01:35 readable_suid

Test output:

$ ./readable data

geteuid(): 1000 - effective user ID

getegid(): 4004 - effective group ID

getuid():  1000 - user ID

getgid():  4004 - group ID

data: Permission denied

=> as expected

$ ./readable_suid data

geteuid(): 0 - effective user ID

getegid(): 4004 - effective group ID

getuid():  1000 - user ID

getgid():  4004 - group ID

ok to read data

=> The last response ("ok to read data") is unexpected because the code is running with real user ID 1000. When doing a similar test on Linux, I get "permission denied".

Is my understanding of access() wrong, or is this a bug in QNX or my configuration?

post122247: Controlling the CPU Frequency in a QNX 7.1 system

2023-05-03T08:57:10Z

Hello.

I am trying to control the CPU frequency of a system and want to know the best way to do it. I have looked online on my own and found 3 ways of doing the same. I want to set it to a specific number and avoid Intel Speed stepping taking it beyond this limit.

1) Using the Startup BIOS command. (I don't have access to test it out currently) (https://www.qnx.com/developers/docs/6.5.0SP1.update/com.qnx.doc.neutrino_utilities/s/startup-bios.html)

2) Using DVFS drivers (If you could please give me an example of how to use this)(http://www.qnx.com/developers/docs/6.6.0_anm11_wf10/#com.qnx.doc.neutrino.technotes/topic/set_cpu_freq.html)

3) Using the "cpufreq" command.(For some reason this is not working on my system. Any help on this would also be great)(http://www.qnx.com/developers/docs/7.1/#com.qnx.doc.neutrino.utilities/topic/c/cpufreq.html)

Apart from this if there is any other easier way to do the same would also help a ton.

Thanks In Advance

post122246: QNX 7.1.0 x86_64 lpd, lpr, etc

2023-05-03T03:22:47Z

Does QNX 7.1.0 intel 64 bits platform provide BSD printing mechanism? (lpd, lpc, lpq, lpr, lprm, etc) Have anybody ported it to QNX 7.1.0 x86_64?

Regards,

Janusz

post122234: QNX 7.1 on BeaglePlay (TI AM625)

2023-04-26T22:52:05Z

We've had great success using the RPi4 to control experiments in our research lab, but given the shortage, I've been eyeing the TI products, which seem to be in healthy supply. I know there's a BSP for the AM62X, but would be particularly interested in success folks have with the new BeaglePlay - of course with the general stuff (ethernet, USB, etc.) but also with interrupt driven GPIO (and A/D support, if possible, as I haven't seen an SPI driver?).

Any info appreciated!

David

post122229: Qnx 7.0 crashes on x86_64 platforn

2023-04-21T11:43:17Z

Hi,

The Qnx 7.0 is crashing while trying to boot on x86_64 bit platform. My build file starts with

[virtual=x86_64,bios +compress] boot = {

startup-x86 -v

PATH=/proc/boot:/bin:/usr/bin LD_LIBRARY_PATH=/proc/boot:/lib:/usr/lib:/lib/dll procnto-smp-instr -v

}

can you please let me know what is the issue.

post122214: Raspberry Pi4 PL011 UARTs

2023-04-18T02:09:34Z

Hello,

Has anyone been able to squeeze out any extra serial ports on a Pi4? If so, what's the trick?

I have /dev/ser3 working fine at address 0xfe201600 using IRQ 153. But I can't get any of the others that reside at addresses 0xfe201000, 0xfe201400, 0xfe201800, or 0xfe201a00. It seems they all want to share IRQ 153 but if I do this for any address other than 0xfe201600 the call to InterruptAttach() (in devc/serpl011/intr.c) results in the kernel gong into ga ga land and a subsequent reboot (presumably the watchdog kicks in).

Am I missing something? I feel like I'm so close after pouring over as many of the RPi4B docs that I can find.

Is it true that all the UART's need to attach to IRQ 153?

Thanks,

Geoff.

post122213: Re: shared memeory objects

2023-04-18T02:01:00Z

I do this quite a lot. Works for me! This is on 7.1.

Geoff.

post122211: Zero copy issue regarding camera data

2023-04-14T03:27:24Z

Hello,I am currently running the QNX system on Qualcomm's chip and have obtained camera data. My goal is to transfer this data to OPENGL in zero-copy format, but I have encountered an error.

To illustrate, I have created a new screen_buffer_t and pointed it to the memory address of the camera data. However, when attempting to display it on the screen, I keep receiving an "invalid parameter" error.

The code is as follows:

qcarcam_ret = qcarcam_get_frame(qcarcam_context, &frame_info, 1000000 * 1000, 0);

screen_buffer_t screenbuf;

screen_create_buffer(&screenbuf);

int err = screen_set_buffer_property_iv(screenbuf, SCREEN_PROPERTY_FORMAT, (const int[]) { SCREEN_FORMAT_UYVY });

int rect[4] = { 0, 0, 1600, 1300 };

int dims[2] = { 1600, 1300 };

err = screen_set_buffer_property_iv(screenbuf, SCREEN_PROPERTY_BUFFER_SIZE, rect);

screen_set_buffer_property_iv(screenbuf, SCREEN_PROPERTY_SIZE, dims);

int stride = 1600 * 1300;

screen_set_buffer_property_iv(screenbuf, SCREEN_PROPERTY_STRIDE, &stride);

err = screen_set_buffer_property_pv(screenbuf, SCREEN_PROPERTY_POINTER, &vir_buffer[frame_info.idx]);

err = screen_blit(screen_context, screen_buf, screenbuf, NULL);

What is the issue with the code above, and where can I find examples or information about zero-copy?

post122209: shared memeory objects

2023-04-13T15:38:34Z

the use of shared memory objects - created by mmap - between processes is not working!!

Is this created by design or is it a faulty implementation ?

post122194: Re: [RUST compilation for QNX]

2023-04-03T09:22:35Z

Dear Stephen,

is there any way for us to recompile GCC to newer versions and backends for QNX? This might enable gccrs (the Gnu implementation).

post122180: python2.7 on QNX6.5 armv7

2023-03-31T07:40:11Z

How can I get python2.7 pre-built binary package or compile it self on QNX6.5 armv7?

post122179: Re: devc-serusb and supported USB/Serial devices

2023-03-30T02:05:35Z

Thanks David,

We have ordered 12 of these to see me through while we're sorting out "real" serial ports that emulate 16550 UART's within the FPGA fabric of a Xilinx MP-SoC.

I'll have to shorten the cables however (6 feet is a bit long) but that's OK. At least I'll be able to get six or so working serial ports to play with.

Geoff.

> These have worked for us:

>

> https://www.amazon.com/gp/product/B0759HSLP1/ref=ppx_yo_dt_b_search_asin_title

> ?ie=UTF8&psc=1

>

> I use them to drive an external midi synthesizer for sound without any issue.

> Had been using a UART to RS232 but realized this was even simpler!

post122177: Re: devc-serusb and supported USB/Serial devices

2023-03-22T21:49:52Z

These have worked for us:

https://www.amazon.com/gp/product/B0759HSLP1/ref=ppx_yo_dt_b_search_asin_title?ie=UTF8&psc=1

I use them to drive an external midi synthesizer for sound without any issue. Had been using a UART to RS232 but realized this was even simpler!

post122176: devc-serusb and supported USB/Serial devices

2023-03-21T21:35:30Z

Hello,

I want to experiment with devc-serusb and intend to purchase the appropriate USB/Serial hardware (RS232). Does anyone here have any recommendations on which ones (brand/model) work with this driver?

Thanks,

Geoff.

post122175: usblauncher_otg

2023-03-21T21:31:16Z

Hello,

I'm trying to get auto-mounting of USB devices (mainly umass) working on the RPi4 and Xilinx MP-SOC's (both aarch64le). With the help of the QNX support guy I managed to start pps and provide the correct arguments to usblauncher_otg and have it create entries in /dev. It started devb-umass and when I insert a simple thumbdrive (either with a t12 or t177 partition) it simply cretes /dev/umass0, /dev/umass1, and /dev/umass2. Using fdisk, only the umass2 shows a valid (support) filesystem partition (12 and 177 respectively). I start usblauncher_otg as follows:

usblauncher_otg -vvv -E -e -0 -m /pps

I am not seeing anything in the output log indicating anything wrong. It sees the thumbdrives being inserted and removed - it simply won't mount any partition (under /fs or anywhere else).

I'm using the supplied rules.lua and rules.mnt files but it simply won;t mount either of these partition types to produce /fs/usb0, /fs/usb1, etx.

I am wondering is this is because there are no /dev/umass2t12 or /dev/umasst177 entries?

If so, who/what actually does this. Is it devb-umass that looks into the umass device to see what partitions are there and create/mount them so that a later mount will work? The arguments provided to devb-umass are quite numerous and are based (I think) on what is in the rules.lua file.

Apparently I should see in the usblauncher_otg output log entries referring to do_mount_fsys. But I don't. And I can't find out why - this stuff doesn't seem to be documented much - or if it is it's hard to find.

The other mystery with this is why I see /dev/umass0 and /dev/umass2 - neither of which relate it seems to any supported partition type. I don't see this when I manually and mionimally start devb-umass cam pnp name=umass.

Can someone provide some enlightenment please? I'm struggling a bit with this one! :-)

Thanks,

Geoff.

post122174: Re: Post pandemic Raspberry Pi4's don't seem to work.

2023-03-21T21:14:45Z

Hi David,

I might be interested in how you do this but right now I am grappling with usblauncher_otg on the RPi4 and I'm hoping you can help as you indicated earlier on that you had this working. I will create a new thread for this however.

Geoff.

> One update is that I used the Raspberry Pi Imager to burn a new boot loader

> for the Pi4 that allows it to boot from USB (and then try the SD). This works

> well so with the formatted USB stick I put the EFI partition followed by my

> qnx6 partitions and works like a charm - no need for the SD card.

>

> Also intrigued by the network boot possibilities :-)

post122172: Re: Post pandemic Raspberry Pi4's don't seem to work.

2023-03-17T16:09:22Z

One update is that I used the Raspberry Pi Imager to burn a new boot loader for the Pi4 that allows it to boot from USB (and then try the SD). This works well so with the formatted USB stick I put the EFI partition followed by my qnx6 partitions and works like a charm - no need for the SD card.

Also intrigued by the network boot possibilities :-)

post122168: Re: Resource Busy

2023-03-16T01:00:50Z

Thanks John. It sort of makes sense now!

Geoff.

> In these cases you will normally see that the procnto still had a fd open to

> the file in questions for the mappings.

>

> even after the process has been exited the procnto will keep the mapping

> references around for a short period of time.

> Or for up to 60 seconds if you have the sticky bit set on the file. This is to

> facilitate quicker reloading of the binary should you decode to restart it.

> http://www.qnx.com/developers/docs/7.0.0/#com.qnx.doc.neutrino.user_guide/

> topic/files_Sticky.html

>

> The correct approach to replacing a binary in place it to unlink/rm the old

> one and then copy the new one to the same location.

post122167: Re: Resource Busy

2023-03-14T22:44:41Z

In these cases you will normally see that the procnto still had a fd open to the file in questions for the mappings.

even after the process has been exited the procnto will keep the mapping references around for a short period of time.

Or for up to 60 seconds if you have the sticky bit set on the file. This is to facilitate quicker reloading of the binary should you decode to restart it.

http://www.qnx.com/developers/docs/7.0.0/#com.qnx.doc.neutrino.user_guide/topic/files_Sticky.html

The correct approach to replacing a binary in place it to unlink/rm the old one and then copy the new one to the same location.

post122166: Resource Busy

2023-03-14T20:54:43Z

Hello,

For some years I have encountered the message "Resource Busy" when I try to copy an executable file to a name of one that's currently running. This is often the case when I have modified a program and simply want to replace the one that's running. It hasn't really been a problem - more of a nuisance but one that I could live with.

But recently, I have been getting this message when the file simply exists - regardless of whether it is running or not. I have to remove the file (rm) before I can copy a new one over it. Although sometimes this doesn't occur more often than not it does and I am somewhat confused by what is actually happening. I'm using the most recent release of 7.1 but this message was apparent back in the 6.x days.

So my question is: what is the criteria that governs when this "Resource Busy" is issued requiring either the running process to be stopped or the destination file to be removed?

I guess to date I have considered it to be simply one of life's little mystery's.

Geoff.

post122162: Re: Post pandemic Raspberry Pi4's don't seem to work.

2023-03-12T15:56:31Z

Got it, thanks! Without the sync=ignore option I was unable to mount the qnx6 partitions. I also continue to be puzzled about the below1G name?! I substituted devb-ustor in place of devb-umass because it seems like that might manage high speed flash?

Regardless, at least we have an approach that will let us work around the sdmmc issues!

Thanks again for the help.

-David

post122161: Re: Post pandemic Raspberry Pi4's don't seem to work.

2023-03-11T23:49:08Z

The following works for me. In the build file (of the BSP) and assuming the usb_start.sh routine has successfully started io-usb-otg:

devb-umass cam pnp mem name=below1G disk name=usb

waitfor /dev/usb0t177 5

mount -t qnx6 -o sync=ignore /dev/usb0t177 /

waitfor /

I put this between the qconn and [+session] ksh & commands  (in the section called "Remote Debug".

I actually comment out the [+session ] ksh & command and instead run /etc/rc.d/rc.local so that some other stuff gets started from outside of the IFS. Eventually, if I want it, the shell gets started on /dev/ser1. I generally ssh in via the network and rarely use the serial port terminal connection.

I hope this helps!

Geoff.

> Figured I would try to just mount the USB stick instead of the sd cards on the

>  newer pis, but I'm not sure I have the options right for the io-usb-otg /

> devb-mass (or ustor?) drivers.  Any pointers for making sure I load these

> correctly?

>

> In some cases, I can enumerate the partitions, and can mount my efi (dos)

> partition.  I can't mount qnx6 partitions though.  And should fdisk /dev/hd0

> actually work for a USB drive?

>

> Thanks!

post122160: Re: Post pandemic Raspberry Pi4's don't seem to work.

2023-03-11T22:26:04Z

Figured I would try to just mount the USB stick instead of the sd cards on the newer pis, but I'm not sure I have the options right for the io-usb-otg / devb-mass (or ustor?) drivers. Any pointers for making sure I load these correctly?

In some cases, I can enumerate the partitions, and can mount my efi (dos) partition. I can't mount qnx6 partitions though. And should fdisk /dev/hd0 actually work for a USB drive?

Thanks!

post122154: Re: Post pandemic Raspberry Pi4's don't seem to work.

2023-02-28T23:03:00Z

Hi Elad,

I tried it. Instead of complaining with the error message "xpt_configure: No sdmmc interfaces found" it returns "xpt_configure: sdmmc SIM attach failure"

I haven't had a chance to delve further into this myself. Beside I don't know anything about SDMMC drivers so I'll leave this to experts!

Geoff.

> Geoff, David ,

>

> You can try this one little trick SD device drivers really hate: comment out

> lines 607-609 in src/hardware/devb/sdmmc/sdiodi/sd.c and rebuild devb-sdmmc.

> These are the lines in question:

>

>     if( ( status = sd_switch( dev, SD_SF_MODE_SET, SD_SF_GRP_BUS_SPD,

>                 1, sw_status ) ) == EOK ) {

> //        if( ( sw_status[16] & 0xF ) != 0x1 ) {

> //            status = EIO;

> //        }

>     }

>

> Let me know if it fixes the problem (though if it does it would be a hack and

> not a real solution).

>

> --Elad

post122153: Re: Post pandemic Raspberry Pi4's don't seem to work.

2023-02-28T11:24:52Z

Geoff, David ,

You can try this one little trick SD device drivers really hate: comment out lines 607-609 in src/hardware/devb/sdmmc/sdiodi/sd.c and rebuild devb-sdmmc. These are the lines in question:

    if( ( status = sd_switch( dev, SD_SF_MODE_SET, SD_SF_GRP_BUS_SPD,

                1, sw_status ) ) == EOK ) {

//        if( ( sw_status[16] & 0xF ) != 0x1 ) {

//            status = EIO;

//        }

    }

Let me know if it fixes the problem (though if it does it would be a hack and not a real solution).

--Elad

post122152: Re: Post pandemic Raspberry Pi4's don't seem to work.

2023-02-28T05:50:55Z

> We too have been struggling with this.  It's hit or miss with the sd driver,

> which is frustrating to be sure.  If there were cards that (nearly?) always

> worked, it would be great to know which ones!  In our case, we are actually

> mounting NFS drives for some shared data, and makes me think it would be

> safest to just mount root filesystem specifically for each Pi across the

> network (sort of like our QNX4 nodes did to their host)?

This is pretty much what I do. QNET is an absolute secret weapon that saves me so much time that it's not funny! But sadly the intention is for QNET to be removed from QNX after close to 40 years of use across QNX2/3, 4, 6, and 7. I have four Raspberry Pi's - along with a couple of Xilinx and x86_64 - all networked so that I can quickly and easily copy files around across all of them (if need be). When I get back to my Linux environment it's often "bugger"! Back to SCP that doesn't seem to deal with things like soft links and file modes very well.

>

> To answer a question earlier in the thread - these machines all seem to work

> find with raspian/linux installs from the SD cards.

I think we're very lucky to have QNX 7.1 working on the RPi4. I don't know who put the BSP together but I sure do appreciate it! Sure, some things don't seem to work quite right but being able to develop ARM code on a cheap platform instead of the very expensive Xilinx board has been a godsend for me personally. Being able to simply mount a QNX6 USB and adopt/mount it as root has saved my bacon this week. Along with QNET. I guess one day the SD card issues will be resolved.

Geoff.

post122151: Proper way to wait for DHCP assignment?

2023-02-27T23:56:34Z

I have some drivers that I'd like to start on boot which depend on the network address being assigned by DHCP (actually ntpdate is one of these, too). Is there a "waitfor" command I can use that will wait until the socket interface is configured? If I insert a sleep with a sufficiently long pause, this will work, but I was hoping for a cleaner solution...

Thanks!

David

post122150: Re: Post pandemic Raspberry Pi4's don't seem to work.

2023-02-27T23:52:49Z

We too have been struggling with this. It's hit or miss with the sd driver, which is frustrating to be sure. If there were cards that (nearly?) always worked, it would be great to know which ones! In our case, we are actually mounting NFS drives for some shared data, and makes me think it would be safest to just mount root filesystem specifically for each Pi across the network (sort of like our QNX4 nodes did to their host)?

To answer a question earlier in the thread - these machines all seem to work find with raspian/linux installs from the SD cards.

post122149: Re: Post pandemic Raspberry Pi4's don't seem to work.

2023-02-24T05:10:11Z

Hi Elad,

I generally use SanDisk's as that's what the local shop mainly stocks. I haven't to date had any problems with them.

Anyway, I have managed to get a viable workaround going by formatting up a mini USB "thumbdrive", shoving some relevant files onto it, and after configuring the USB system in the IFS to find it, simply mount it as root. From thereonin the SD card is effectively bypassed and the USB drive become the primary. Not the way I'd run an airline but it lets me keep going.

The production target system (not a Pi) will eventually not have any writable filesystem on it at all.

BTW, the Pi's cost us about US$200 just for the boards. These had 8Gb memory installed. They used to cost us about US$80

Many thanks Roger! Without you pointing me in the right direction I would have hit a brick wall today!

Cheers,

Geoff.

> You may want to try a few different SD card brands, if you have any around. We

> found that some work and some don't.

>

> --Elad

post122148: Re: Post pandemic Raspberry Pi4's don't seem to work.

2023-02-24T00:01:35Z

You may want to try a few different SD card brands, if you have any around. We found that some work and some don't.

--Elad

post122147: Re: Post pandemic Raspberry Pi4's don't seem to work.

2023-02-23T23:15:58Z

I am not sure what prompted me to compare the checksums of the ifs-bin files but I did. And discovered they were different! Somehow the copy (using cp on the FAT32 partition) didn't do the job properly.

So I repeated the process and now ifs-qnx is loading. But I have the problem Elad mentioned where the sdmmc driver can't find the hardware. I have seen this before with the Compute Module 4.

I may be able to find a workaround for this using a USB thumbdrive that hopefully I can mount as / like I do with the Xilinx boards I have. For which the SD cards are read-only.

Geoff.

> Hi Elad, Roger,

>

> Thanks for your responses.

>

> I brought a suitable USB/serial cable into work today and using the firmware

> files Roger pointed me to was able to see the RPi trying to get started. I

> have attached a screenshot of the terminal output.

>

> From startup where the first line is "MMU: 16-bit ASID..." it gets to the

> final line where it says"All ClockCycles offsets within tolerance", pauses for

> a couple of seconds, and then repeats from the MMU: line. Just keeps going

> around and around.

>

> I don't think it's getting to where it wants to load the IFS file. I looked

> into the BSP for "All ClockCycles" and couldn't find anything like that.

>

> I am not sure if I'm using the very latest BSP (as the one I'm using has up

> until now been very stable) so when I can I'll check that out and see what

> happens. But as I said, I don't think it's getting to load the IPL.

>

> Geoff.

post122146: Re: Post pandemic Raspberry Pi4's don't seem to work.

2023-02-23T22:55:34Z

Hi Elad, Roger,

Thanks for your responses.

I brought a suitable USB/serial cable into work today and using the firmware files Roger pointed me to was able to see the RPi trying to get started. I have attached a screenshot of the terminal output.

From startup where the first line is "MMU: 16-bit ASID..." it gets to the final line where it says"All ClockCycles offsets within tolerance", pauses for a couple of seconds, and then repeats from the MMU: line. Just keeps going around and around.

I don't think it's getting to where it wants to load the IFS file. I looked into the BSP for "All ClockCycles" and couldn't find anything like that.

I am not sure if I'm using the very latest BSP (as the one I'm using has up until now been very stable) so when I can I'll check that out and see what happens. But as I said, I don't think it's getting to load the IPL.

Geoff.

post122145: Re: Post pandemic Raspberry Pi4's don't seem to work.

2023-02-23T13:10:18Z

You may want to make sure you get up to date firmware. I've seen cases where older Pi's will boot but newer ones wouldn't until the firmware was updated.

The latest can be obtained from https://github.com/raspberrypi/firmware.

Currently only three files are required. These can be obtained using:

wget https://github.com/raspberrypi/firmware/raw/master/boot/bcm2711-rpi-4-b.dtb

wget https://github.com/raspberrypi/firmware/raw/master/boot/start4.elf

wget https://github.com/raspberrypi/firmware/raw/master/boot/fixup4.dat

post122144: Re: When do you actually responds

2023-02-23T12:38:52Z

This is a community forum. No one is under any obligation to respond. Very few people from QNX monitor this forum, let alone reply.

As you seem to be working for a QNX customer, please use the proper support channels.

--Elad

post122143: Re: Post pandemic Raspberry Pi4's don't seem to work.

2023-02-23T12:31:58Z

> We managed to get our hands on three RPi4 model B's from Amazon

I feel your pain. They are not cheap on Amazon. Somebody is getting rich off these.

> To our dismay they won't start when the pre pandemic SD cards are inserted

Can you be more specific about what doesn't work? I know that the SD card is not recognized in some variant of RPi4. We haven't managed to figure out what is different on this variant and why. That said, it only prevents the file system on the card from being mounted by devb-sdmmc but the board does boot and the IFS works.

Does raspbian boot on these?

--Elad

post122142: When do you actually responds

2023-02-23T12:31:53Z

CAUTION - This email is from an external source. Please be cautious with links and attachments. (go/taginfo)

Hi!

If I post a topic for discussion, about when will you answer?

I also have a question, which tool can you use from QNX that can show the dynamic allocation of the heap memory?

showmem is not supported .. I cant run that tool atleast on qnx7

--------------------------------------------------------------------------------

Best regards/Med vänliga hälsningar

Hung Nguyen

email: hnyugyen@volvocars.com

phone: +46(0)709326784

adress: Serenadgatan 16, 21572 Malmö

team: SWECS-I

post122141: Post pandemic Raspberry Pi4's don't seem to work.

2023-02-23T05:17:20Z

Hi,

We managed to get our hands on three RPi4 model B's from Amazon. To our dismay they won't start when the pre pandemic SD cards are inserted (that we know work fine).

Has anyone else found this?

I'm going to bring the 5V/3.3V USB/serial cable into work tomorrow and see if I can see anything meaningful on the terminal. I imagine that something has changed slightly in the architecture preventing them from starting.

Hopefully we can get these things working without too much bother. Maybe a tweak of the config.txt file? I've still got about four pre pandemic Pi's that I will be extra careful with!

Geoff.

post122140: make sense of Pidin, Hogs, Top

2023-02-22T16:18:38Z

Hi

I am trying to analyse the memory usage of each processes with the utlities provided by QNX, somehow the showmem util is gone.

Anyway when I run pidin mem, hogs, or top, the memory data I see makes no sense these doesnt sum up.

Probably because I dont understand what I am looking at.

Can you guys explain a bit how I can best use these tools for following purposes.

I want to list all processes, see a snapshot every 10 seconds, how much heap (dynamic allocation) and stack allocation they have used

Then all the shared libs/mems, how much of that is part of the memory a specific process is used. Which is the pdin -m option you get all these memory but shall sum everything and add that to get the total memory a process uses?

I still do not know how to analyse the dynamic heap usage yet by each process.

I tried to get some inspiration from your own memory analysis tool. But those data should be part of the data you get from pidin... except the heap part.

Or do you have any other strategy, I basically would like to gather these snapshots and save them as a file and parse them later on another tool. Since I cant directly use your graphical memory analysis tool. I need to automate this.

post122139: Monitor the memory usage of each process with pidin

2023-02-22T11:08:12Z

Hi I have a couple of questions related to pidin. Also some general question about calculating the total memory usage of a process

1. when I run "pdin mem" and "pidin pmem" it gives me different values of code memory and data memory. What is the differences here?

Here is the result for each command for a specific process with 8 threads, that is why we see 8 lines for that process

with pidin pmem

7372K 6788K  512K(516K)*

7372K 6788K  512K(516K)

7372K 6788K  512K(516K)

7372K 6788K  512K(516K)

7372K 6788K  512K(516K)

7372K 6788K  512K(516K)

7372K 6788K  512K(516K)

7372K 6788K  512K(516K)

With pidin mem

0 6612K  512K(516K)*

0 6612K  512K(516K)

0 6612K  512K(516K)

0 6612K  512K(516K)

0 6612K  512K(516K)

0 6612K  512K(516K)

0 6612K  512K(516K)

0 6612K  512K(516K)

2. I would like to use pidin utility to monitor a process memory usage over time is that possible with pidin mem or pidin pmem?

3. In the list from pidin mem I also see text as following:

10r CONDVAR             0 6612K  512K(516K)*

0r SIGWAITINFO         0 6612K  512K(516K)

10r CONDVAR             0 6612K  512K(516K)

10r REPLY               0 6612K  512K(516K)

10r RECEIVE             0 6612K  512K(516K)

10r RECEIVE             0 6612K  512K(516K)

19r RECEIVE             0 6612K  512K(516K)

10r RECEIVE             0 6612K  512K(516K)

some_lib  @        100c8000             268K   12K

some_lib          @         1000000             620K   24K

some_lib      @        78000000              92K  4096

some_lib @        78029000             132K  4096

some_lib @        7805c000             140K  4096

some_lib @        78092000             104K  4096

some_lib @        780be000             132K  4096

some_lib @        780f8000            1076K  4096

some_lib @        78226000             300K  4096

some_lib @        78285000             200K  4096

some_lib @        782ca000              80K  4096

some_lib @        782f0000             252K  4096

some_lib @        78342000             412K  4096

:

:

All these some_lib are libs that the process uses but are thes memory already included in the code and data memory or should I also need to sum all these sizes to have the whole picture of the total memory the process uses?

post122138: QNX 7.1 / Resource manager corrupt OS by reading actuel parameters

2023-02-21T11:19:12Z

A start of an Interbus resource manager using actual parameters corrupts the operation of QNX 7.1.

This doesn't happen by a start on a shell command line!

This problem dosn't exist not in QNX 7.0 ...

Greetings

Armin

post122136: Re: Cross-compile protobuf3-19.4 on qnx-sdp710 failed

2023-02-15T08:37:48Z

iI solved this problem by adding CPPFLAGS='- D_ XOPEN_ SOURCE=700 'Compilation options

post122135: Cross-compile protobuf3-19.4 on qnx-sdp710 failed

2023-02-15T03:55:28Z

i want to Cross-compile protobuf3-19.4 on qnx-sdp710， But there are some problems to build it,

The same environment can be compiled successfully with version qnx-sdp700。

The compilation process is as follows：

1、source ${MY_SDP710}/qnxsdp-env.sh

2、cd protobuf-3.19.4

3、./configure --prefix=xxx --host=arm CC=aarch64-unknown-nto-qnx7.1.0-gcc CXX=aarch64-unknown-nto-qnx7.1.0-g++ CPPFLAGS='-D_XOPEN_SOURCE=500'

4、make -j8 & make install

Please see the attachment for the log of compilation failure

post122130: Re: Programmatically read CPU load and RAM usage

2023-02-03T06:23:53Z

Thank You all for the quick response and simple solution.

I think that's all I need to know (and Albrecht also got an answer to his question).

Regards,

Michael.

post122128: Re: Programmatically read CPU load and RAM usage

2023-02-02T14:59:55Z

There are various ways to query total and used memory. The cleanest in my opinion is to use the _MEM_INFO message, e.g.:

    mem_info_t  msg = { .i.type = _MEM_INFO, .i.fd = -1 };

    if (MsgSend(MEMMGR_COID, &msg.i, sizeof(msg.i), &msg.o, sizeof(msg.o))

        == -1) {

        perror("MsgSend");

        return 1;

    }

    printf("Total memory=%lu Free memory=%lu\n",

           msg.o.info.__posix_tmi_total, msg.o.info.posix_tmi_length);

To track CPU usage you do the opposite and look at idle time. This can be done using the runtime clock of the idle threads. For example, for core 1:

    uint64_t idle_1_time;

    clock_t idle_1_clock_id = ClockId(1, 1);

    ClockTime(idle_1_clock_id, NULL, &idle_1_time);

The value in idle_1_time is the total run time of the idle thread on core 1. By sampling this value periodically you can calculate the percentage of idle time and, from that, the percentage of CPU usage.

--Elad

post122127: Re: Programmatically read CPU load and RAM usage

2023-02-02T14:13:19Z

here's one way of reading free mem of the system (or at least a start):

http://www.qnx.com/developers/docs/7.1/#com.qnx.doc.neutrino.lib_ref/topic/p/procmgr_value_notify_add.html

you can also follow this guide to get mapping information and then sum it up:

http://www.qnx.com/developers/docs/7.1/index.html#com.qnx.doc.neutrino.cookbook/topic/s3_procfs_DCMD_PROC_MAPINFO.html

Note though that esp DCMD_PROC_PAGEDATA is *very* expensive, you don't want to run that often.

regards

-- Michael

________________________________

From: Albrecht Uhlmann <community-noreply@qnx.com>

Sent: Thursday, February 2, 2023 15:08

To: ostech-core_os

Subject: Re: Programmatically read CPU load and RAM usage

Hi Michael,

for total RAM usage, there is a simple command, I think you need to do a stat on /proc and read the filesize member. The knowledge base contains sample code: https://www.qnx.com/support/knowledgebase.html?id=50130000000nbHX

As to CPU load, I am very much interested myself but I do not know a solution. My idea was to open process #1 and use the devctl's to query its individual threads. Threads #1...through to #cpus are the idle threads (one per core), so getting their time must be "Idle time per core". The CPU time of all other threads in procnto I guess is what would be called "Kernel Time". And the remaining time (per core) is user time.

What I do not know is interrupt time.

Any of the QNX gurus comment on this?

Regards,

-Al

_______________________________________________

OSTech

http://community.qnx.com/sf/go/post122126

To cancel your subscription to this discussion, please e-mail ostech-core_os-unsubscribe@community.qnx.com

post122126: Re: Programmatically read CPU load and RAM usage

2023-02-02T14:08:22Z

Hi Michael,

for total RAM usage, there is a simple command, I think you need to do a stat on /proc and read the filesize member. The knowledge base contains sample code: https://www.qnx.com/support/knowledgebase.html?id=50130000000nbHX

As to CPU load, I am very much interested myself but I do not know a solution. My idea was to open process #1 and use the devctl's to query its individual threads. Threads #1...through to #cpus are the idle threads (one per core), so getting their time must be "Idle time per core". The CPU time of all other threads in procnto I guess is what would be called "Kernel Time". And the remaining time (per core) is user time.

What I do not know is interrupt time.

Any of the QNX gurus comment on this?

Regards,

-Al

post122125: Programmatically read CPU load and RAM usage

2023-02-02T13:36:02Z

Dear community,

tools like 'top', 'sac' or 'pidin' can be used to display CPU load and RAM usage, so there must be a way to program this.

Could somebody please tell me, how this can be done in a C(++) program (QNX7)?

Thanks in advance,

Michael.

post122118: Re: QNX 7.x bsdtar broken

2023-01-13T15:35:05Z

No,

I have tested all filesystems.

bsdtar uses statvfs() and pathconf(). The QNX procnto and/or filesystem returns incorrect errors.

!!! e.g. pathconf(_PC_REC_XFER_ALIGN) returns -1 and does not set errno!!!

-Michael

> Is it possible you're running the command from within /tmp while it's linked

> to /dev/shmem?

>

>

> If so, try running it anywhere else but there.

>

>

> -Eric

>

> ________________________________

> From: Michael Tasche <community-noreply@qnx.com>

> Sent: Thursday, January 12, 2023 3:10:52 PM

> To: ostech-core_os

> Subject: QNX 7.x bsdtar broken

>

> Hi all,

>

> # use -i tar

> QNX_BUILDID=(GNU)e6eae59479764ad68539563a3d0e0f09

> NAME=bsdtar

> DESCRIPTION=libarchive tar

> DATE=2020/06/13-19:36:42-EDT

> STATE=lookup

> HOST=sdp710-node1

> USER=builder

> VERSION=7.1.0

> TAGID=710-SDP-472

>

> # ls -l

> total 0

> drwxr-xr-x 2 root root 0 Jan 12 21:57 m1

> # tar -cf m1.tar.gz m1

> tar: statvfs failed

> tar: Error exit delayed from previous errors.

> #

>

> Is this a know problem?

>

> I have the same problem under 7.0 !

> gnutar, delivered first for 7.0, works.

>

> Any ideas?

>

> -Michael

>

>

>

> _______________________________________________

>

> OSTech

> http://community.qnx.com/sf/go/post122115

> To cancel your subscription to this discussion, please e-mail ostech-core_os-

> unsubscribe@community.qnx.com

post122116: Re: QNX 7.x bsdtar broken

2023-01-12T20:52:47Z

Is it possible you're running the command from within /tmp while it's linked to /dev/shmem?

If so, try running it anywhere else but there.

-Eric

________________________________

From: Michael Tasche <community-noreply@qnx.com>

Sent: Thursday, January 12, 2023 3:10:52 PM

To: ostech-core_os

Subject: QNX 7.x bsdtar broken

Hi all,

# use -i tar

QNX_BUILDID=(GNU)e6eae59479764ad68539563a3d0e0f09

NAME=bsdtar

DESCRIPTION=libarchive tar

DATE=2020/06/13-19:36:42-EDT

STATE=lookup

HOST=sdp710-node1

USER=builder

VERSION=7.1.0

TAGID=710-SDP-472

# ls -l

total 0

drwxr-xr-x 2 root root 0 Jan 12 21:57 m1

# tar -cf m1.tar.gz m1

tar: statvfs failed

tar: Error exit delayed from previous errors.

#

Is this a know problem?

I have the same problem under 7.0 !

gnutar, delivered first for 7.0, works.

Any ideas?

-Michael

_______________________________________________

OSTech

http://community.qnx.com/sf/go/post122115

To cancel your subscription to this discussion, please e-mail ostech-core_os-unsubscribe@community.qnx.com

post122115: QNX 7.x bsdtar broken

2023-01-12T20:10:52Z

Hi all,

# use -i tar

QNX_BUILDID=(GNU)e6eae59479764ad68539563a3d0e0f09

NAME=bsdtar

DESCRIPTION=libarchive tar

DATE=2020/06/13-19:36:42-EDT

STATE=lookup

HOST=sdp710-node1

USER=builder

VERSION=7.1.0

TAGID=710-SDP-472

# ls -l

total 0

drwxr-xr-x   2 root      root              0 Jan 12 21:57 m1

# tar -cf m1.tar.gz m1

tar: statvfs failed

tar: Error exit delayed from previous errors.

#

Is this a know problem?

I have the same problem under 7.0 !

gnutar, delivered first for 7.0,   works.

Any ideas?

-Michael

post122106: Re: Network driver for the Enclustra Mercury XU1 SOM

2023-01-06T22:09:36Z

Hi Al,

By chance, late yesterday, I discovered in the Renesas Car H3 BSP devnp-ravd.so that appears to be based on this NIC. We will investigate this next week.

I have never had need to delve into the way QNX deals with network devices so your comments are of considerable help to me and appreciated. I have mainly dealt with serial devices - UART's seem to be much less complicated!

Cheers,

Geoff.

> KSZ9031RNX is just a PHY. The "drivers" for the PHYs are compiled into the

> devnp-* drivers, usually in mii.c. The "driver" is usually just an

> initialization routine as a C function. The main network driver init routines

> scan the MII bus and select the correct PHY init routine based on PHY vendor/

> device id. If none is found, a generic PHY init is done, which is often, but

> not always, sufficient.

>

> I remember that I have seen some Micrel KS9031 code in the i.MX6 ENET driver.

> Maybe that helps.

>

> Regards,

> -Al

post122105: Re: Network driver for the Enclustra Mercury XU1 SOM

2023-01-06T22:01:54Z

Hi Elad,

The decision to use the Mercury XU1 was I think driven by the hefty FPGA requirements of our application and its relative compatibility with the ZCU10x boards we have been using to date. Based on how the QNX software performed on the 4-core A53 moving to a 2-core A53 was considered viable - so long as I could get QNX 7.1 working on it. Which I was able to do with the exceptions of the QSPI and network.

As for price, well, we'd be of course interested in anything (SoC) that's cheaper that can handle our FPGA requirements and also works with QNX and its devices (like serial, USB, SDMMC, and network). The production unit would not require SDMMC or USB. We also have some environmental requirements that I think drove us to the Exclustra board. I am not sure if the board could be considered "non modern"! :-)

Geoff.

> Did you check if either NetBSD (for io-pkt) or FreeBSD (for io-sock) have a

> driver for this card?

>

> Out of curiosity - what's the use case for these boards? These are 10-20 times

> more expensive than modern single-board computers, and quite a bit less

> powerful (I think?).

>

> --Elad

post122104: Re: Network driver for the Enclustra Mercury XU1 SOM

2023-01-06T11:52:38Z

KSZ9031RNX is just a PHY. The "drivers" for the PHYs are compiled into the devnp-* drivers, usually in mii.c. The "driver" is usually just an initialization routine as a C function. The main network driver init routines scan the MII bus and select the correct PHY init routine based on PHY vendor/device id. If none is found, a generic PHY init is done, which is often, but not always, sufficient.

I remember that I have seen some Micrel KS9031 code in the i.MX6 ENET driver. Maybe that helps.

Regards,

-Al

post122103: Re: Network driver for the Enclustra Mercury XU1 SOM

2023-01-06T10:49:52Z

Did you check if either NetBSD (for io-pkt) or FreeBSD (for io-sock) have a driver for this card?

Out of curiosity - what's the use case for these boards? These are 10-20 times more expensive than modern single-board computers, and quite a bit less powerful (I think?).

--Elad

post122101: Re: Network driver for the Enclustra Mercury XU1 SOM

2023-01-06T01:25:34Z

BTW, the NIC is a Micrel KSZ9031RNX. I can't find any QNX 7.1 driver for it for any platform (aarch64le or x86_64).

Does anyone know if we have a driver for it and what it might be called?

Geoff.

> Hello,

>

> This is actually a board modeled on the Xilinx MPSoC's (ZCU10x). I have been

> able to get QNX 7.1 up and running on it and for the most part everything

> works just like they did on the ZCU111 and ZCU102 before it. However,

> Enclustra use a different NIC chip so the xzynq-ultrascale network driver

> (devnp-xzynq-ultrascale.so) won't work. Here is a link to this particular

> board.

>

> https://www.enclustra.com/en/products/system-on-chip-modules/mercury-xu1/

>

> Has anyone reading this forum found the same problem and formulated a solution

> , or can help us with a solution? This would probably entail writing a new

> network driver if someone else hasn't already done so. Or has and is prepared

> to share it. (I use the word "share" loosely)!

>

> The QSPI driver that comes with ZCU10x BSP's doesn't work either but that can

> be dealt with later. Getting the network working is my immediate priority.

>

> Any ideas and/or help with this would be appreciated!

>

> Regards,

>

> Geoff.

post122098: Network driver for the Enclustra Mercury XU1 SOM

2023-01-03T22:52:01Z

Hello,

This is actually a board modeled on the Xilinx MPSoC's (ZCU10x). I have been able to get QNX 7.1 up and running on it and for the most part everything works just like they did on the ZCU111 and ZCU102 before it. However, Enclustra use a different NIC chip so the xzynq-ultrascale network driver (devnp-xzynq-ultrascale.so) won't work. Here is a link to this particular board.

https://www.enclustra.com/en/products/system-on-chip-modules/mercury-xu1/

Has anyone reading this forum found the same problem and formulated a solution, or can help us with a solution? This would probably entail writing a new network driver if someone else hasn't already done so. Or has and is prepared to share it. (I use the word "share" loosely)!

The QSPI driver that comes with ZCU10x BSP's doesn't work either but that can be dealt with later. Getting the network working is my immediate priority.

Any ideas and/or help with this would be appreciated!

Regards,

Geoff.

post122027: Re: devb-sdmmc with x86_64 generic kernel for LattePanda Delta (Celeron N4100)

2022-12-18T12:24:31Z

Hi David,

Did you find a solution? If not, can you try running the driver with extra verbosity and post the slog2info results?

That board certainly seems expensive for what you get :-( I think it's sole purpose is as a Windows development board. There are claims that RaspberryPi is building more units, but I haven't seen these materialize yet.

--Elad

post122017: Re: su: System error (?)

2022-12-07T17:22:59Z

The thing I learnt hardly is that we have to satisfy

ls -ld / to be root:root with permission 755(no write for group and others).

In our BSP sample build file, we did not explicitly set dperms=0755 to root directory(/) as we do to others, for example:

[uid=0 gid=0 type=dir dperms=0755] /usr

[uid=0 gid=0 type=dir dperms=0755] /usr/lib

[uid=0 gid=0 type=dir dperms=0755] /etc

On my target, I mount disk drive to / as follows:

mount -t qnx6 /dev/sata0t179 /

and that break the rule for /

Once change the mounting with -o mntperms=755, the su - root works.

mount -t qnx6 -o mntperms=755 /dev/sata0t179 /

post122014: devb-sdmmc with x86_64 generic kernel for LattePanda Delta (Celeron N4100)

2022-12-01T03:12:26Z

With the shortage of RPi4's, I've been exploring the use of relatively cheap (but not as cheap!) x86 alternatives.  I have a LattePanda board that I can boot up fine from USB and can use the nvme driver to access external storage, but I'd like to take advantage of the sdmmc/emmc that's on board.  Problem is I can't seem to get the devb-sdmmc to recognize either the SD reader or the eMMC.

pci-tools -v show what I think are the controllers?

B000:D28:F00 @ idx 18

        vid/did: 8086/31cc

                Intel Corporation, <device id - unknown>

        class/subclass/reg: 08/05/01

                SD Host Controller Base Systems Peripheral

B000:D30:F00 @ idx 19

        vid/did: 8086/31d0

                Intel Corporation, <device id - unknown>

        class/subclass/reg: 08/05/01

                SD Host Controller Base Systems Peripheral

But my attempts to form the correct devb-sdmmc command line have not succeeded.  Any suggestions?

Thanks!

David

post122003: Re: Having trouble starting QDB

2022-11-21T09:01:49Z

Hi, You do not have the qdb executable in Your image or it is not in the search path.

Be sure to have it in the image or in the disk, and that is reachable and executable.

If it is not in the disk/image, just copy it or add it to image build.

if it is not in the PATH, add its directory to the PATH.

Bye

Mario

post122001: Having trouble starting QDB

2022-11-19T21:51:38Z

Hi there, I'm a student working with QNX for a project and I'm having trouble starting QDB. I looked through the "Starting the QDB Server" page and followed the instructions (started PPS, created the directory structure) but when I try and run the qdb command in terminal I get the error:

sh: qdb: cannot execute - No such file or directory

Also, when I run "which qdb" I get:

which: no qdb in /proc/boot:/system/xbin

I'm not sure where to go from here so any help would be appreciated, thanks.