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Core Development Tools/Discussion/General/How to enable support for Intel AVX?/List of Posts
Forum Topic - How to enable support for Intel AVX?: (6 Items)
   
Update
Igor Nikitin
06/13/2013 10:46 AM
post102264
How to enable support for Intel AVX?   
Hello! 

How do I enable support for Intel AVX on the system QNX 650SP1?

All attempts to start a minimal program resulted in message "Illegal instruction (core dump)".
Program code:

#include <iostream>
#include <immintrin.h> // AVX instrinsics

int main( int argc, char** argv )
{
 	__m256 var;
	__m256 var2;
	__m256 result;

	var = _mm256_set1_ps(1.f);
	var2 = _mm256_set1_ps(3.f);
	result = _mm256_add_ps(var,var2);

	return 0;
}

Gather the program I'm using the development environment QNX SDP 6.5.0SP1 with GCC 4.7.2.

Thanks!
Ryan Mansfield(deleted)
06/13/2013 10:47 AM
post102265
Re: How to enable support for Intel AVX?   
On 13-06-13 10:46 AM, Igor Nikitin wrote:
> Hello!
>
> How do I enable support for Intel AVX on the system QNX 650SP1?

I don't believe the 650SP1 kernel has support for AVX.

Regards,

Ryan Mansfield
Igor Nikitin
06/13/2013 10:50 AM
post102266
Re: How to enable support for Intel AVX?   
> On 13-06-13 10:46 AM, Igor Nikitin wrote:
> > Hello!
> >
> > How do I enable support for Intel AVX on the system QNX 650SP1?
> 
> I don't believe the 650SP1 kernel has support for AVX.
> 
> Regards,
> 
> Ryan Mansfield
> 

And what is supported from SIMD instructions and in what kernels?
Mario Charest
06/13/2013 10:53 AM
post102267
RE: How to enable support for Intel AVX?   

> -----Message d'origine-----
> De : Ryan Mansfield [mailto:community-noreply@qnx.com]
> Envoyé : 13 juin 2013 10:48
> À : general-toolchain@community.qnx.com
> Cc : Igor Nikitin; Igor Nikitin
> Objet : Re: How to enable support for Intel AVX?
> 
> On 13-06-13 10:46 AM, Igor Nikitin wrote:
> > Hello!
> >
> > How do I enable support for Intel AVX on the system QNX 650SP1?
> 
> I don't believe the 650SP1 kernel has support for AVX.

Hum if I recall from the early days of floating point, kernel support only matter if you would be using these extra 
registered in more than one thread/process.
Maybe it's an alignment issue or your processor doesn't support AVX.  You need sandybridge or better on Intel side. 
Bulldozer or better on the AMD side.

> 
> Regards,
> 
> Ryan Mansfield
> 
> 
> 
> 
> 
> _______________________________________________
> 
> General
> http://community.qnx.com/sf/go/post102265
> To cancel your subscription to this discussion, please e-mail general-
> toolchain-unsubscribe@community.qnx.com
Igor Nikitin
06/13/2013 10:59 AM
post102268
Re: RE: How to enable support for Intel AVX?   
> 
> 
> > -----Message d'origine-----
> > De : Ryan Mansfield [mailto:community-noreply@qnx.com]
> > Envoyé : 13 juin 2013 10:48
> > À : general-toolchain@community.qnx.com
> > Cc : Igor Nikitin; Igor Nikitin
> > Objet : Re: How to enable support for Intel AVX?
> > 
> > On 13-06-13 10:46 AM, Igor Nikitin wrote:
> > > Hello!
> > >
> > > How do I enable support for Intel AVX on the system QNX 650SP1?
> > 
> > I don't believe the 650SP1 kernel has support for AVX.
> 
> Hum if I recall from the early days of floating point, kernel support only 
> matter if you would be using these extra registered in more than one thread/
> process.
> Maybe it's an alignment issue or your processor doesn't support AVX.  You need
>  sandybridge or better on Intel side. Bulldozer or better on the AMD side.
> 
> > 
> > Regards,
> > 
> > Ryan Mansfield
> > 
> > 
> > 
> > 
> > 
> > _______________________________________________
> > 
> > General
> > http://community.qnx.com/sf/go/post102265
> > To cancel your subscription to this discussion, please e-mail general-
> > toolchain-unsubscribe@community.qnx.com
> 

I use Intel 3770k with microarchitecture Ivy Bridge. Earlier, I used Intel AVX on the Linux platform, all works well. 
Recently there appeared the necessity to work with register Intel AVX on QNX platform for developing real-time 
applications. The only thing I could achieve this error ' Illegal Instruction (core dump)".
Mario Charest
06/14/2013 2:41 PM
post102330
Re: RE: How to enable support for Intel AVX?   
> > > -----Message d'origine-----
> > > De : Ryan Mansfield [mailto:community-noreply@qnx.com]
> > > Envoyé : 13 juin 2013 10:48
> > > À : general-toolchain@community.qnx.com
> > > Cc : Igor Nikitin; Igor Nikitin
> > > Objet : Re: How to enable support for Intel AVX?
> > > 
> > > On 13-06-13 10:46 AM, Igor Nikitin wrote:
> > > > Hello!
> > > >
> > > > How do I enable support for Intel AVX on the system QNX 650SP1?
> > > 
> > > I don't believe the 650SP1 kernel has support for AVX.
> > 
> > Hum if I recall from the early days of floating point, kernel support only 
> > matter if you would be using these extra registered in more than one thread/
> 
> > process.
> > Maybe it's an alignment issue or your processor doesn't support AVX.  You 
> need
> >  sandybridge or better on Intel side. Bulldozer or better on the AMD side.
> > 
> > > 
> > > Regards,
> > > 
> > > Ryan Mansfield
> > > 
> > > General
> > > http://community.qnx.com/sf/go/post102265
> > > To cancel your subscription to this discussion, please e-mail general-
> > > toolchain-unsubscribe@community.qnx.com
> > 
> 
> I use Intel 3770k with microarchitecture Ivy Bridge. Earlier, I used Intel AVX
>  on the Linux platform, all works well. Recently there appeared the necessity 
> to work with register Intel AVX on QNX platform for developing real-time 
> applications. The only thing I could achieve this error ' Illegal Instruction 
> (core dump)".


Ryan was right, I came upon this in intel's doc: 

"To use the Intel AVX extensions reliably in most settings, the operating system must support saving and loading the new
 registers (with XSAVE/XRSTOR) on thread context switches to prevent data corruption. To help avoid such errors, 
operating systems supporting Intel AVX-aware context switches explicitly set a CPU bit enabling the new instructions; 
otherwise, an undefined opcode (#UD) exception is generated when Intel AVX instructions are used."

You could try to turn on that bit ( from in ISR cause I assume code must be running in ring 0 ).  You would still be 
limited to one thread using AVX extensions. 

Hopefully a futur release of the OS will have AVX support.

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