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Vijayanandham Kamalasekaran
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Vijayanandham Kamalasekaran
11/05/2008 2:19 AM
post15944
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There are four TSECs(Ethernet controller) in 8572 but the MII management interface is based on TSEC1 only, which
controls PHY devices connected to other tsecs also.I could not understand how mutual exclusion of MII management
interface registers is handled in the device driver source.Can someone help me regarding this?
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Vijayanandham Kamalasekaran
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Vijayanandham Kamalasekaran
11/05/2008 2:23 AM
post15945
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Just to add more info on the query.Iam looking into mpc8572 driver for io-net taken from mpc8572ds bsp package.
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Hugh Brown
11/05/2008 9:00 AM
post15968
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Each TSEC has a different base address and each PHY is handled with an
offset from the base address of each TSEC. In the detect.c file, the
iobase is set to the offset of each TSEC.
-----Original Message-----
From: Vijayanandham Kamalasekaran [mailto:community-noreply@qnx.com]
Sent: Wednesday, November 05, 2008 2:20 AM
To: drivers-networking
Subject: mpc8572 tsec driver
There are four TSECs(Ethernet controller) in 8572 but the MII management
interface is based on TSEC1 only, which controls PHY devices connected
to other tsecs also.I could not understand how mutual exclusion of MII
management interface registers is handled in the device driver
source.Can someone help me regarding this?
_______________________________________________
Networking Drivers
http://community.qnx.com/sf/go/post15944
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Vijayanandham Kamalasekaran
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Re: RE: mpc8572 tsec driver
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Vijayanandham Kamalasekaran
11/06/2008 12:02 AM
post16038
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Re: RE: mpc8572 tsec driver
But In detect.c,for each TSEC, phy_base is initialized from TSEC1 base.There is even a comment in detect.c "/* PHYs are
based off the primary TSEC */ ".
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Rajat Jain
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RE: RE: mpc8572 tsec driver
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Rajat Jain
11/06/2008 12:06 AM
post16039
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RE: RE: mpc8572 tsec driver
Hi,
The MII hardware and its registers are shared between all the TSECs.
Thanks,
Rajat
----Original Message----
From: Vijayanandham Kamalasekaran [mailto:community-noreply@qnx.com]
Sent: Thursday, November 06, 2008 10:33 AM
To: drivers-networking
Subject: Re: RE: mpc8572 tsec driver
> But In detect.c,for each TSEC, phy_base is initialized from
> TSEC1 base.There is even a comment in detect.c "/* PHYs are
> based off the primary TSEC */ ".
>
> _______________________________________________
> Networking Drivers
> http://community.qnx.com/sf/go/post16038
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Vijayanandham Kamalasekaran
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Re: RE: RE: mpc8572 tsec driver
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Vijayanandham Kamalasekaran
11/06/2008 12:09 AM
post16040
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Re: RE: RE: mpc8572 tsec driver
Yes i agree.TSEC's share MII management registers.I beleive access to these registers by each TSEC's should be mutually
exclusive.I want to know how it is handled in the code.
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Hugh Brown
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RE: RE: mpc8572 tsec driver
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Hugh Brown
11/06/2008 8:07 AM
post16069
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RE: RE: mpc8572 tsec driver
There are also 2 command line options, "phy_addr" and "phy_incr" that
can be used to address the PHY. Each PHY may be at the same port
address, but has a different number.
-----Original Message-----
From: Vijayanandham Kamalasekaran [mailto:community-noreply@qnx.com]
Sent: Thursday, November 06, 2008 12:03 AM
To: drivers-networking
Subject: Re: RE: mpc8572 tsec driver
But In detect.c,for each TSEC, phy_base is initialized from TSEC1
base.There is even a comment in detect.c "/* PHYs are based off the
primary TSEC */ ".
_______________________________________________
Networking Drivers
http://community.qnx.com/sf/go/post16038
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Vijayanandham Kamalasekaran
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Re: RE: RE: mpc8572 tsec driver
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Vijayanandham Kamalasekaran
11/06/2008 8:35 AM
post16072
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Re: RE: RE: mpc8572 tsec driver
Correct me if iam wrong.Each phy device may have different addresses but to access that phy device the address has to be
written on MIIM Address register(Iam refereing to mii.c file and mpc_mii_read() func).So Each TSEC will try to address
the corresponding phy device using this register only.I feel that this register access has to be protected using locks
or driver thread should not be preempted before finishing mpc_mii_read() func.
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Hugh Brown
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RE: RE: RE: mpc8572 tsec driver
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Hugh Brown
11/06/2008 9:05 AM
post16079
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RE: RE: RE: mpc8572 tsec driver
Yes, I guess there should be some locking here.
-----Original Message-----
From: Vijayanandham Kamalasekaran [mailto:community-noreply@qnx.com]
Sent: Thursday, November 06, 2008 8:35 AM
To: drivers-networking
Subject: Re: RE: RE: mpc8572 tsec driver
Correct me if iam wrong.Each phy device may have different addresses but
to access that phy device the address has to be written on MIIM Address
register(Iam refereing to mii.c file and mpc_mii_read() func).So Each
TSEC will try to address the corresponding phy device using this
register only.I feel that this register access has to be protected using
locks or driver thread should not be preempted before finishing
mpc_mii_read() func.
_______________________________________________
Networking Drivers
http://community.qnx.com/sf/go/post16072
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Vijayanandham Kamalasekaran
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Re: RE: RE: RE: mpc8572 tsec driver
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Vijayanandham Kamalasekaran
11/06/2008 10:08 AM
post16098
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Re: RE: RE: RE: mpc8572 tsec driver
Will it be ok if i implement locks in mpc_mii_read() and mpc_mii_write() functions or is there anything i should be
doing additional to this?
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Hugh Brown
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RE: RE: RE: RE: mpc8572 tsec driver
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Hugh Brown
11/06/2008 10:15 AM
post16100
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RE: RE: RE: RE: mpc8572 tsec driver
Yes, you will have to implement it in those 2 functions and make it
global, so that all interfaces will see the lock.
-----Original Message-----
From: Vijayanandham Kamalasekaran [mailto:community-noreply@qnx.com]
Sent: Thursday, November 06, 2008 10:09 AM
To: drivers-networking
Subject: Re: RE: RE: RE: mpc8572 tsec driver
Will it be ok if i implement locks in mpc_mii_read() and mpc_mii_write()
functions or is there anything i should be doing additional to this?
_______________________________________________
Networking Drivers
http://community.qnx.com/sf/go/post16098
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Andrew Boyd(deleted)
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RE: RE: RE: mpc8572 tsec driver
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Andrew Boyd(deleted)
11/06/2008 10:45 AM
post16103
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RE: RE: RE: mpc8572 tsec driver
> Yes, I guess there should be some locking here.
PR 62747 created to track and fix this in the
io-pkt mpc85xx driver - I'll let Hugh worry
about the comparable fix to the io-net driver :)
--
aboyd
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Andrew Boyd(deleted)
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RE: RE: RE: mpc8572 tsec driver
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Andrew Boyd(deleted)
11/06/2008 11:25 AM
post16110
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RE: RE: RE: mpc8572 tsec driver
Hold on just a second here.
If I look at the io-pkt mpc85xx source,
specifically mii.c mpc85xx_mii_read()
we can see access to registers like:
MPC_MIIMADD
MPC_MIICOM
etc. These are the registers in question,
correct?
Well for tsec1, MPCMIIMADD is defined in
the data sheet as 0x2_4528. For tsec2,
it is defined as 0x2_5528, etc.
Notice the *(base + MPC_MIIMADD) in the
source? The value for base will be mmap'd
different for each interface, to a different
area of physical memory - see detect.c
Hugh was right - there is no register
overlap for the mii registers.
--
aboyd
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Vijayanandham Kamalasekaran
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Re: RE: RE: RE: mpc8572 tsec driver
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Vijayanandham Kamalasekaran
11/06/2008 12:14 PM
post16117
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Re: RE: RE: RE: mpc8572 tsec driver
Andrew, i dont know how 8572 io-pkt driver is but in 8572 io-net driver the base(*(base + MII add reg)) is nothing but
phy_reg which is a mapped version of phy_base.This phy_base is assigned like this "ext->phy_base += MPC_TSEC1_BASE" in
the code.So i beleive it always points to same MII register set.
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Andrew Boyd(deleted)
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RE: RE: RE: RE: mpc8572 tsec driver
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Andrew Boyd(deleted)
11/06/2008 12:20 PM
post16118
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RE: RE: RE: RE: mpc8572 tsec driver
> i beleive it always points to same MII register set.
The code can be a bit confusing to go through.
I suggest you look at the tsec/etsec data sheets.
If the driver works, the instances are writing
to different MII register addresses :-)
--
aboyd
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Vijayanandham Kamalasekaran
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Re: RE: RE: RE: RE: mpc8572 tsec driver
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Vijayanandham Kamalasekaran
11/06/2008 9:34 PM
post16146
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Re: RE: RE: RE: RE: mpc8572 tsec driver
> > i beleive it always points to same MII register set.
>
> The code can be a bit confusing to go through.
>
> I suggest you look at the tsec/etsec data sheets.
>
> If the driver works, the instances are writing
> to different MII register addresses :-)
>
> --
> aboyd
For ur reference andrew
"Note that MII management hardware is shared by all eTSECs. Thus, only through the MIIM registers of eTSEC1 and eTSEC3
can external PHYs be accessed and configured. (eTSEC1 registers apply to MIIM interface 1 and eTSEC3 registers apply to
MIIM interface 3.) Note: when an eTSEC is configured to use TBI/RTBI, is done via the MIIM registers for that eTSEC. For
example, if a TBI/RTBI interface is required on eTSEC2, then the MIIM registers starting at offset 0x2_5520 are used to
configure it"
Taken from mpc 8572 reference manual.We are not using TBI/RTBI here.Anyway i dont have the reference board with me now
so i cant test this driver.
Robert,
Thanks for the tip, i forgot about the reference platform schematics.I will take a look into that to find what
kind of PHY device is used .
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Robert Craig
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RE: RE: RE: RE: mpc8572 tsec driver
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Robert Craig
11/06/2008 1:53 PM
post16131
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RE: RE: RE: RE: mpc8572 tsec driver
This has been an interesting conversation and here's what we think is
happening.
The decision about whether or not multiple MII read / write register
sets are used is solely determined by hardware. If you use a multi-port
PHY, then there is a single set of addresses that you read / write to
and you select the PHY to configure based upon the phy_address field.
If you have multiple, independent PHY chips connected, then you can use
the TSEC individual MII registers to do the read/write and access is
completely independent.
We've got to double check the board schematics, but I'm pretty sure that
the reference platform has a single multi-port PHY on it which means a
single set of registers which means that we should indeed be locking and
unlocking the register access.
Robert.
-----Original Message-----
From: Vijayanandham Kamalasekaran [mailto:community-noreply@qnx.com]
Sent: Thursday, November 06, 2008 12:15 PM
To: drivers-networking
Subject: Re: RE: RE: RE: mpc8572 tsec driver
Andrew, i dont know how 8572 io-pkt driver is but in 8572 io-net driver
the base(*(base + MII add reg)) is nothing but phy_reg which is a
mapped version of phy_base.This phy_base is assigned like this
"ext->phy_base += MPC_TSEC1_BASE" in the code.So i beleive it always
points to same MII register set.
_______________________________________________
Networking Drivers
http://community.qnx.com/sf/go/post16117
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Vijayanandham Kamalasekaran
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Re: RE: RE: RE: RE: mpc8572 tsec driver
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Vijayanandham Kamalasekaran
11/08/2008 12:00 AM
post16255
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Re: RE: RE: RE: RE: mpc8572 tsec driver
can the person who maintains the 8572 driver confirm whether the above said issue is in MII code? I just wanna know
whether the problem raised by me has been confirmed or it's dropped.
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Hugh Brown
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RE: RE: RE: RE: RE: mpc8572 tsec driver
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Hugh Brown
11/10/2008 8:35 AM
post16302
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RE: RE: RE: RE: RE: mpc8572 tsec driver
Yes, a problem report has been made, so it will be looked at.
-----Original Message-----
From: Vijayanandham Kamalasekaran [mailto:community-noreply@qnx.com]
Sent: Saturday, November 08, 2008 12:01 AM
To: drivers-networking
Subject: Re: RE: RE: RE: RE: mpc8572 tsec driver
can the person who maintains the 8572 driver confirm whether the above
said issue is in MII code? I just wanna know whether the problem raised
by me has been confirmed or it's dropped.
_______________________________________________
Networking Drivers
http://community.qnx.com/sf/go/post16255
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Vijayanandham Kamalasekaran
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Re: RE: RE: RE: RE: RE: mpc8572 tsec driver
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Vijayanandham Kamalasekaran
11/10/2008 9:48 AM
post16305
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Re: RE: RE: RE: RE: RE: mpc8572 tsec driver
Thanks for the response hugh.
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Andrew Boyd(deleted)
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RE: RE: RE: RE: RE: mpc8572 tsec driver
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Andrew Boyd(deleted)
11/10/2008 11:10 AM
post16313
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RE: RE: RE: RE: RE: mpc8572 tsec driver
mii mutex added to io-pkt devnp-mpc85xx.so
driver. See PR 62747 and commit r619 to
trunk/sys/dev_qnx/mpc85xx/mii.c
--
aboyd
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Vijayanandham Kamalasekaran
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Re: RE: RE: RE: RE: RE: mpc8572 tsec driver
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Vijayanandham Kamalasekaran
11/10/2008 9:38 PM
post16359
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Re: RE: RE: RE: RE: RE: mpc8572 tsec driver
Thanks for the fix.You saved me from little coding :-).I can move this to my port.
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Andrew Boyd(deleted)
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RE: RE: RE: RE: RE: RE: mpc8572 tsec driver
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Andrew Boyd(deleted)
11/11/2008 9:02 AM
post16377
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RE: RE: RE: RE: RE: RE: mpc8572 tsec driver
No problem - it's only about 5 lines of code! I
think the discussion about it took about 10x as
long as it did to code :-)
--
aboyd
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Shawn Steenhagen
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Re: RE: RE: RE: RE: RE: mpc8572 tsec driver
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Shawn Steenhagen
01/22/2015 5:21 PM
post113042
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Re: RE: RE: RE: RE: RE: mpc8572 tsec driver
This is a fairly old modification whose comment within the mpc85xx device driver is still around in mii.c
// PR 62747 - multiple interfaces requires mii access locking
static pthread_mutex_t mii_mutex = PTHREAD_MUTEX_INITIALIZER;
My question is this: Is it correct to say that this mutex object added to mii.c will be known only to one particular
instance of the device driver and will not operate as expected if I run more than one instance? For example if I do
something like:
io-pkt-v4 -i1 -d /lib/devnp-mpc85xx.so syspage,speed=100,duplex=1,verbose=5 -ptcpip prefix=/sock1 -v
SOCK=/sock1 ifconfig tsec0 192.168.4.1 netmask 0xffffff00 broadcast 192.168.4.255 up
io-pkt-v4 -i1 -d /lib/devnp-mpc85xx.so syspage,speed=100,duplex=1,verbose=5 -ptcpip prefix=/sock2 -v
SOCK=/sock2 ifconfig tsec0 192.168.5.3 netmask 0xffffff00 broadcast 192.168.5.255 up
Each instance of the device driver will have no knowledge of the others static mutex object? (which can cause collisions
of the single MDIO resource). What's the most straight forward way to make the mutex object shared among all instances
of the driver that might be brought up?
Thanks
Shawn
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