I created a 24 BPP surface using gf_surface_create_layer, specifying CPU_LINEARLY_ACCESSIBLE, and verified that the 
surface does indeed have this flag set in the surface_info_t.

However, when I try and write to the surface, the access does not appear to be linear.  It seems as though there is a 
swizzle or address redirection occurring.  Drawing to a 32 bit surface and then using gf_draw_blit to blit to the 24 BPP
 layer_surface has the same issue.  

Is it possible to write linearly (with the CPU) to a displayable surface on this chipset?