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Forum Topic - Interrupt handling in QNX: (2 Items)
   
Interrupt handling in QNX  
Hi All,

When an interrupt occurs in the hardware, the QNX interrupt redirector loads the thread table entry and context of the 
thread which the ISR is contained will be loaded. Does this mean that the context of the entire process in which the 
thread is a part is loaded or just the threads local data section. Can i then access the global variables in the heap 
area in ISR handler. Then in InterruptAttach( int intr,const struct sigevent * (* handler)(void *, int),const void * 
area,int size,unsigned flags) there is an area argument which is not paged out . Could someone clarify why this area is 
required if the entire context is loaded when the ISR occurs.

Thanks,


RE: Interrupt handling in QNX  
Hi,

yes, you will have access to the thread's local data, to the 
global static data, the heap and the stack. 

The <area> and <size> arguments to the isr can be used, for 
example, to have the same piece of code service different 
devices (prepare a descriptor structure fro each device, 
and attach a generic ISR to the interrupt, providing the
descriptor as the argument).

Regards,
- Thomas

> -----Original Message-----
> From: sathish kumar [mailto:community-noreply@qnx.com] 
> Sent: 11 February 2009 13:35
> To: ostech-core_os
> Subject: Interrupt handling in QNX
> 
> Hi All,
> 
> When an interrupt occurs in the hardware, the QNX interrupt 
> redirector loads the thread table entry and context of the 
> thread which the ISR is contained will be loaded. Does this 
> mean that the context of the entire process in which the 
> thread is a part is loaded or just the threads local data 
> section. Can i then access the global variables in the heap 
> area in ISR handler. Then in InterruptAttach( int intr,const 
> struct sigevent * (* handler)(void *, int),const void * 
> area,int size,unsigned flags) there is an area argument which 
> is not paged out . Could someone clarify why this area is 
> required if the entire context is loaded when the ISR occurs.
> 
> Thanks,
> 
> 
> 
> 
> _______________________________________________
> OSTech
> http://community.qnx.com/sf/go/post21954
> 
>