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Forum Topic - [QNX 6.5.0] Enabling write combining on x86.: (3 Items)
   
[QNX 6.5.0] Enabling write combining on x86.  
Hi everyone, 

I'm writing a driver for a PCIe device. My goal is to achieve the highest possible writing speed into the PCIe memory 
region of my device. I'm using write combining on x86 under Linux for this purpose. I would like to know if QNX 6.5.0 
supports write combining on x86. I've tried to enable it through shm_ctl() and SHMCTL_LAZYWRITE flag, but it did not 
yield any results (I got the same writing speeds). That's what I've tried to do: 

/** 
* First version 
*/ 
buffer = mmap64(NULL, size, PROT_READ | PROT_WRITE, MAP_PHYS, NOFD, phys_addr); 

fd = shm_open(name, O_RDWR | O_CREAT | O_EXCL, 0666); 

if (fd >= 0) { 
shm_ctl(fd, SHMCTL_PHYS | SHMCTL_LAZYWRITE, phys_addr, size); 
shm_unlink(name); 
close(fd); 
} 

/** 
* Second version 
*/ 
if ((fd = shm_open(name, O_RDWR | O_CREAT | O_EXCL, 0666)) == -1) 
return -1; 

if (shm_ctl(fd, SHMCTL_PHYS | SHMCTL_LAZYWRITE, phys_addr, size) == -1) 
return -1; 

buffer = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0); 

Could you give me some suggestions? 
Attachment: HTML sf-attachment-mime36588 1.38 KB
Re: [QNX 6.5.0] Enabling write combining on x86.  
Hi,

Check in your BSP's startup code everything about the mtrr configuration.
The mtrr configuration of your device's memory region shall be configured also in more X86_MTRR_TYPE_WRITECOMBINING.

If in your BSP startup code (src\hardware\startup\boards\xxx\) there is nothing about mtrr you can also look some 
examples in src\hardware\startup\lib\x86\.

Best regards,
Christophe
Re: [QNX 6.5.0] Enabling write combining on x86.  
Thank you, Christophe, I'll try it!