Henrich du Toit(deleted)
|
SMI Interrupt latency fix for x86 Intel NUC D34010WYKH
|
Henrich du Toit(deleted)
12/02/2014 8:14 AM
post112508
|
SMI Interrupt latency fix for x86 Intel NUC D34010WYKH
Hi
This post is to share a fix for the Intel NUC D34010WYKH device in order to eliminate the ~100usec interrupt that is
caused by a SMI.
This fix or the information here might be useful for other Intel NUC platforms and even other x86 chipsets perhaps?
The Intel NUC uses an 4th generation Intel® Core™ i3-4010U processor. The exact PCH chipset on this device I was
unable to determine.
http://www.intel.com/content/www/us/en/nuc/nuc-kit-d34010wykh.html
The attached code is provided as an example, there is however no guarantee that this will work for you.
Note: The code was tested using QNX 6.5SP1
Additional information:
---------------------------
SMM: http://en.wikipedia.org/wiki/System_Management_Mode
SMI interrupts can often time take up more time than is desirable for real-time applications: https://rt.wiki.kernel.org
/index.php/HOWTO:_Build_an_RT-application
Intel produces a variety of PCH chipset models and finding out which one you have might be difficult.
Luckily in terms of SMI the Intel 6/7/8 Series chipsets work more or less the same.
http://www.intel.co.za/content/dam/www/public/us/en/documents/datasheets/6-chipset-c200-chipset-datasheet.pdf
http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/7-series-chipset-pch-datasheet.pdf
http://www.intel.co.za/content/www/za/en/chipsets/8-series-chipset-pch-datasheet.html
There are various causes for SMI interrupts and any one of these interrupts can be the cause of a 100usecs interrupt
that is unwanted, the trick is to disable only this one interrupt and nothing else.
(see table 5-25 page 174 in 7-series-chipset-pch-datasheet.pdf)
These interrupts can be disabled by clearing bits in the SMI_EN register.
1. Find the device PCI device that contains PMBASE.
This will normally be D32:F0. (see datasheet)
You will need to use "pci -vv" to find the deviceId and VendorId for this device and provide that to
pci_attach_device()
2. Some experimentation might be required in order to figure out which bit of SMI_EN should be cleared to remove the
unwanted interrupt.
Warning: clearing some SMI's might not be possible as they might be locked by the Firmware/Hardware
Warning: clearing some SMI's might have unwanted effects so do this at your own risk.
It is highly recommended to never attempt to completely disable SMI's on a global scale (GBL_SMI_EN)
|
|
|