|
Kaushik Choudhury(deleted)
|
DMA on imx6 platform giving wrong values
|
|
Kaushik Choudhury(deleted)
04/02/2014 9:03 AM
post109748
|
DMA on imx6 platform giving wrong values
Hi
Iam working on porting linux sdio driver on to QNX. For sending CMD53 i have created a virtual memory using MMAP and got
the physical address of this mmap return virtual memory using function mem_offset.
The problem is when i have to do DMA read of 4 byte value using the physical address that i got above i get value in
form of BIG ENDIAN.
Example in place of 1 i get 0x1000000.
The imx6 processor when executing CMD53 for read and write is expecting and giving me value in BIGENDIAN were as it is
little ENDIAN in case of linux.
Please let me known is there anything wrong that iam doing or is this the right way it works.
Regards
Kaushik
|
|
|
|
|
|
Lichun Zhu
|
RE: DMA on imx6 platform giving wrong values
|
|
Lichun Zhu
04/02/2014 9:46 AM
post109753
|
RE: DMA on imx6 platform giving wrong values
Did you set bit 4-5 of the PROT_CTRL register properly? Does PIO mode work? Do you need to do cache operation if the
buffer is cacheable?
-----Original Message-----
From: Kaushik Choudhury [mailto:community-noreply@qnx.com]
Sent: Wednesday, April 02, 2014 9:03 AM
To: ostech-core_os
Subject: DMA on imx6 platform giving wrong values
Hi
Iam working on porting linux sdio driver on to QNX. For sending CMD53 i have created a virtual memory using MMAP and got
the physical address of this mmap return virtual memory using function mem_offset.
The problem is when i have to do DMA read of 4 byte value using the physical address that i got above i get value in
form of BIG ENDIAN.
Example in place of 1 i get 0x1000000.
The imx6 processor when executing CMD53 for read and write is expecting and giving me value in BIGENDIAN were as it is
little ENDIAN in case of linux.
Please let me known is there anything wrong that iam doing or is this the right way it works.
Regards
Kaushik
_______________________________________________
OSTech
http://community.qnx.com/sf/go/post109748
To cancel your subscription to this discussion, please e-mail ostech-core_os-unsubscribe@community.qnx.com
|
|
|
|
|
|
Kaushik Choudhury(deleted)
|
Re: DMA on imx6 platform giving wrong values
|
|
Kaushik Choudhury(deleted)
04/02/2014 12:39 PM
post109763
|
Re: DMA on imx6 platform giving wrong values
Hi
Lichun Zhu
Thanks for the reply
i will try et bit 4-5 of the PROT_CTRL register properly i didn't verify
PIO. Will reply once i verify this.
Regards
Kaushik
On Wed, Apr 2, 2014 at 7:16 PM, Lichun Zhu <community-noreply@qnx.com>wrote:
> Did you set bit 4-5 of the PROT_CTRL register properly? Does PIO mode
> work? Do you need to do cache operation if the buffer is cacheable?
>
>
> -----Original Message-----
> From: Kaushik Choudhury [mailto:community-noreply@qnx.com]
> Sent: Wednesday, April 02, 2014 9:03 AM
> To: ostech-core_os
> Subject: DMA on imx6 platform giving wrong values
>
> Hi
>
> Iam working on porting linux sdio driver on to QNX. For sending CMD53 i
> have created a virtual memory using MMAP and got the physical address of
> this mmap return virtual memory using function mem_offset.
>
> The problem is when i have to do DMA read of 4 byte value using the
> physical address that i got above i get value in form of BIG ENDIAN.
>
> Example in place of 1 i get 0x1000000.
>
> The imx6 processor when executing CMD53 for read and write is expecting
> and giving me value in BIGENDIAN were as it is little ENDIAN in case of
> linux.
>
> Please let me known is there anything wrong that iam doing or is this the
> right way it works.
>
> Regards
> Kaushik
>
>
>
> _______________________________________________
>
> OSTech
> http://community.qnx.com/sf/go/post109748
> To cancel your subscription to this discussion, please e-mail
> ostech-core_os-unsubscribe@community.qnx.com
>
>
>
>
> _______________________________________________
>
> OSTech
> http://community.qnx.com/sf/go/post109753
> To cancel your subscription to this discussion, please e-mail
> ostech-core_os-unsubscribe@community.qnx.com
>
|
|
|
|
|
|
Kaushik Choudhury(deleted)
|
Re: DMA on imx6 platform giving wrong values
|
|
Kaushik Choudhury(deleted)
04/02/2014 1:31 PM
post109765
|
Re: DMA on imx6 platform giving wrong values
Lichun Zhu
Is this some thing related to configuring big endian and little endian on
PROT_CTRL register if so can you please let me known
the specification which talk about bit 4 and 5 of PROT_CTRL. register.
Regards
Kaushik
On Wed, Apr 2, 2014 at 7:16 PM, Lichun Zhu <community-noreply@qnx.com>wrote:
> Did you set bit 4-5 of the PROT_CTRL register properly? Does PIO mode
> work? Do you need to do cache operation if the buffer is cacheable?
>
>
> -----Original Message-----
> From: Kaushik Choudhury [mailto:community-noreply@qnx.com]
> Sent: Wednesday, April 02, 2014 9:03 AM
> To: ostech-core_os
> Subject: DMA on imx6 platform giving wrong values
>
> Hi
>
> Iam working on porting linux sdio driver on to QNX. For sending CMD53 i
> have created a virtual memory using MMAP and got the physical address of
> this mmap return virtual memory using function mem_offset.
>
> The problem is when i have to do DMA read of 4 byte value using the
> physical address that i got above i get value in form of BIG ENDIAN.
>
> Example in place of 1 i get 0x1000000.
>
> The imx6 processor when executing CMD53 for read and write is expecting
> and giving me value in BIGENDIAN were as it is little ENDIAN in case of
> linux.
>
> Please let me known is there anything wrong that iam doing or is this the
> right way it works.
>
> Regards
> Kaushik
>
>
>
> _______________________________________________
>
> OSTech
> http://community.qnx.com/sf/go/post109748
> To cancel your subscription to this discussion, please e-mail
> ostech-core_os-unsubscribe@community.qnx.com
>
>
>
>
> _______________________________________________
>
> OSTech
> http://community.qnx.com/sf/go/post109753
> To cancel your subscription to this discussion, please e-mail
> ostech-core_os-unsubscribe@community.qnx.com
>
|
|
|
|
|
|
Lichun Zhu
|
RE: DMA on imx6 platform giving wrong values
|
|
Lichun Zhu
04/02/2014 1:32 PM
post109766
|
RE: DMA on imx6 platform giving wrong values
5-4
EMODE
Endian Mode:
The uSDHC supports all four endian modes in data transfer. Refer to Data Buffer " for more details.
00 Big Endian Mode
01 Half Word Big Endian Mode
10 Little Endian Mode
11 Reserved
From: kaushik choudhury [mailto:community-noreply@qnx.com]
Sent: April-02-14 1:31 PM
To: ostech-core_os@community.qnx.com
Subject: Re: DMA on imx6 platform giving wrong values
Lichun Zhu
Is this some thing related to configuring big endian and little endian on PROT_CTRL register if so can you please let
me known the specification which talk about bit 4 and 5 of PROT_CTRL. register.
Regards
Kaushik
On Wed, Apr 2, 2014 at 7:16 PM, Lichun Zhu <community-noreply@qnx.com<mailto:community-noreply@qnx.com>> wrote:
Did you set bit 4-5 of the PROT_CTRL register properly? Does PIO mode work? Do you need to do cache operation if the
buffer is cacheable?
-----Original Message-----
From: Kaushik Choudhury [mailto:community-noreply@qnx.com<mailto:community-noreply@qnx.com>]
Sent: Wednesday, April 02, 2014 9:03 AM
To: ostech-core_os
Subject: DMA on imx6 platform giving wrong values
Hi
Iam working on porting linux sdio driver on to QNX. For sending CMD53 i have created a virtual memory using MMAP and got
the physical address of this mmap return virtual memory using function mem_offset.
The problem is when i have to do DMA read of 4 byte value using the physical address that i got above i get value in
form of BIG ENDIAN.
Example in place of 1 i get 0x1000000.
The imx6 processor when executing CMD53 for read and write is expecting and giving me value in BIGENDIAN were as it is
little ENDIAN in case of linux.
Please let me known is there anything wrong that iam doing or is this the right way it works.
Regards
Kaushik
_______________________________________________
OSTech
http://community.qnx.com/sf/go/post109748
To cancel your subscription to this discussion, please e-mail ostech-core_os-unsubscribe@community.qnx.com<mailto:ostech
-core_os-unsubscribe@community.qnx.com>
_______________________________________________
OSTech
http://community.qnx.com/sf/go/post109753
To cancel your subscription to this discussion, please e-mail ostech-core_os-unsubscribe@community.qnx.com<mailto:ostech
-core_os-unsubscribe@community.qnx.com>
|
|
|
|
|
|
Kaushik Choudhury(deleted)
|
Re: DMA on imx6 platform giving wrong values
|
|
Kaushik Choudhury(deleted)
04/02/2014 1:45 PM
post109767
|
Re: DMA on imx6 platform giving wrong values
]Lichun Zhu
Sorry for the trouble.
I am assuming this Endian Mode works for both DMA and PIO.
Regards
Kaushik
On Wed, Apr 2, 2014 at 11:02 PM, Lichun Zhu <community-noreply@qnx.com>wrote:
> 5-4
>
> EMODE
>
> Endian Mode:
>
> The uSDHC supports all four endian modes in data transfer. Refer to Data
> Buffer " for more details.
>
> 00 Big Endian Mode
>
> 01 Half Word Big Endian Mode
>
> 10 Little Endian Mode
>
> 11 Reserved
>
>
>
>
>
> *From:* kaushik choudhury [mailto:community-noreply@qnx.com]
> *Sent:* April-02-14 1:31 PM
> *To:* ostech-core_os@community.qnx.com
> *Subject:* Re: DMA on imx6 platform giving wrong values
>
>
>
> Lichun Zhu
>
>
>
> Is this some thing related to configuring big endian and little endian on
> PROT_CTRL register if so can you please let me known
> the specification which talk about bit 4 and 5 of PROT_CTRL. register.
>
>
>
> Regards
>
> Kaushik
>
>
>
> On Wed, Apr 2, 2014 at 7:16 PM, Lichun Zhu <community-noreply@qnx.com>
> wrote:
>
> Did you set bit 4-5 of the PROT_CTRL register properly? Does PIO mode
> work? Do you need to do cache operation if the buffer is cacheable?
>
>
> -----Original Message-----
> From: Kaushik Choudhury [mailto:community-noreply@qnx.com]
> Sent: Wednesday, April 02, 2014 9:03 AM
> To: ostech-core_os
> Subject: DMA on imx6 platform giving wrong values
>
> Hi
>
> Iam working on porting linux sdio driver on to QNX. For sending CMD53 i
> have created a virtual memory using MMAP and got the physical address of
> this mmap return virtual memory using function mem_offset.
>
> The problem is when i have to do DMA read of 4 byte value using the
> physical address that i got above i get value in form of BIG ENDIAN.
>
> Example in place of 1 i get 0x1000000.
>
> The imx6 processor when executing CMD53 for read and write is expecting
> and giving me value in BIGENDIAN were as it is little ENDIAN in case of
> linux.
>
> Please let me known is there anything wrong that iam doing or is this the
> right way it works.
>
> Regards
> Kaushik
>
>
>
> _______________________________________________
>
> OSTech
> http://community.qnx.com/sf/go/post109748
> To cancel your subscription to this discussion, please e-mail
> ostech-core_os-unsubscribe@community.qnx.com
>
>
>
>
> _______________________________________________
>
> OSTech
> http://community.qnx.com/sf/go/post109753
> To cancel your subscription to this discussion, please e-mail
> ostech-core_os-unsubscribe@community.qnx.com
>
>
>
|
|
|
|
|
|
Kaushik Choudhury(deleted)
|
Re: DMA on imx6 platform giving wrong values
|
|
Kaushik Choudhury(deleted)
04/03/2014 2:18 AM
post109779
|
Re: DMA on imx6 platform giving wrong values
Lichun Zhu
Thanks for the response iam able to set 10 Little Endian Mode and things
worked fine.
Regards
Kaushik
On Wed, Apr 2, 2014 at 11:02 PM, Lichun Zhu <community-noreply@qnx.com>wrote:
> 5-4
>
> EMODE
>
> Endian Mode:
>
> The uSDHC supports all four endian modes in data transfer. Refer to Data
> Buffer " for more details.
>
> 00 Big Endian Mode
>
> 01 Half Word Big Endian Mode
>
> 10 Little Endian Mode
>
> 11 Reserved
>
>
>
>
>
> *From:* kaushik choudhury [mailto:community-noreply@qnx.com]
> *Sent:* April-02-14 1:31 PM
> *To:* ostech-core_os@community.qnx.com
> *Subject:* Re: DMA on imx6 platform giving wrong values
>
>
>
> Lichun Zhu
>
>
>
> Is this some thing related to configuring big endian and little endian on
> PROT_CTRL register if so can you please let me known
> the specification which talk about bit 4 and 5 of PROT_CTRL. register.
>
>
>
> Regards
>
> Kaushik
>
>
>
> On Wed, Apr 2, 2014 at 7:16 PM, Lichun Zhu <community-noreply@qnx.com>
> wrote:
>
> Did you set bit 4-5 of the PROT_CTRL register properly? Does PIO mode
> work? Do you need to do cache operation if the buffer is cacheable?
>
>
> -----Original Message-----
> From: Kaushik Choudhury [mailto:community-noreply@qnx.com]
> Sent: Wednesday, April 02, 2014 9:03 AM
> To: ostech-core_os
> Subject: DMA on imx6 platform giving wrong values
>
> Hi
>
> Iam working on porting linux sdio driver on to QNX. For sending CMD53 i
> have created a virtual memory using MMAP and got the physical address of
> this mmap return virtual memory using function mem_offset.
>
> The problem is when i have to do DMA read of 4 byte value using the
> physical address that i got above i get value in form of BIG ENDIAN.
>
> Example in place of 1 i get 0x1000000.
>
> The imx6 processor when executing CMD53 for read and write is expecting
> and giving me value in BIGENDIAN were as it is little ENDIAN in case of
> linux.
>
> Please let me known is there anything wrong that iam doing or is this the
> right way it works.
>
> Regards
> Kaushik
>
>
>
> _______________________________________________
>
> OSTech
> http://community.qnx.com/sf/go/post109748
> To cancel your subscription to this discussion, please e-mail
> ostech-core_os-unsubscribe@community.qnx.com
>
>
>
>
> _______________________________________________
>
> OSTech
> http://community.qnx.com/sf/go/post109753
> To cancel your subscription to this discussion, please e-mail
> ostech-core_os-unsubscribe@community.qnx.com
>
>
>
|
|
|
|
|
|
Kaushik Choudhury(deleted)
|
Re: DMA on imx6 platform giving wrong values
|
|
Kaushik Choudhury(deleted)
06/29/2014 3:56 AM
post110888
|
Re: DMA on imx6 platform giving wrong values
Lichun Zhu
I have a problem in getting SDIO on my new IMX6 solo lite board running qnx
when ever i do a read using command 53 it is giving me CRC error with DMA
interrupt set, interrupt status register value is 0x20000A meaning a CRC
error.
First read using CMD53 is giving me this error all CMD 52 are working fine.
Have been struggling with this issue from long. Please suggest me some
solution.
Regards
Kaushik
On Thu, Apr 3, 2014 at 11:48 AM, kaushik choudhury <ikaushikc@gmail.com>
wrote:
> Lichun Zhu
>
> Thanks for the response iam able to set 10 Little Endian Mode and things
> worked fine.
>
> Regards
> Kaushik
>
>
> On Wed, Apr 2, 2014 at 11:02 PM, Lichun Zhu <community-noreply@qnx.com>
> wrote:
>
>> 5–4
>>
>> EMODE
>>
>> Endian Mode:
>>
>> The uSDHC supports all four endian modes in data transfer. Refer to Data
>> Buffer " for more details.
>>
>> 00 Big Endian Mode
>>
>> 01 Half Word Big Endian Mode
>>
>> 10 Little Endian Mode
>>
>> 11 Reserved
>>
>>
>>
>>
>>
>> *From:* kaushik choudhury [mailto:community-noreply@qnx.com]
>> *Sent:* April-02-14 1:31 PM
>> *To:* ostech-core_os@community.qnx.com
>> *Subject:* Re: DMA on imx6 platform giving wrong values
>>
>>
>>
>> Lichun Zhu
>>
>>
>>
>> Is this some thing related to configuring big endian and little endian on
>> PROT_CTRL register if so can you please let me known
>> the specification which talk about bit 4 and 5 of PROT_CTRL. register.
>>
>>
>>
>> Regards
>>
>> Kaushik
>>
>>
>>
>> On Wed, Apr 2, 2014 at 7:16 PM, Lichun Zhu <community-noreply@qnx.com>
>> wrote:
>>
>> Did you set bit 4-5 of the PROT_CTRL register properly? Does PIO mode
>> work? Do you need to do cache operation if the buffer is cacheable?
>>
>>
>> -----Original Message-----
>> From: Kaushik Choudhury [mailto:community-noreply@qnx.com]
>> Sent: Wednesday, April 02, 2014 9:03 AM
>> To: ostech-core_os
>> Subject: DMA on imx6 platform giving wrong values
>>
>> Hi
>>
>> Iam working on porting linux sdio driver on to QNX. For sending CMD53 i
>> have created a virtual memory using MMAP and got the physical address of
>> this mmap return virtual memory using function mem_offset.
>>
>> The problem is when i have to do DMA read of 4 byte value using the
>> physical address that i got above i get value in form of BIG ENDIAN.
>>
>> Example in place of 1 i get 0x1000000.
>>
>> The imx6 processor when executing CMD53 for read and write is expecting
>> and giving me value in BIGENDIAN were as it is little ENDIAN in case of
>> linux.
>>
>> Please let me known is there anything wrong that iam doing or is this the
>> right way it works.
>>
>> Regards
>> Kaushik
>>
>>
>>
>> _______________________________________________
>>
>> OSTech
>> http://community.qnx.com/sf/go/post109748
>> To cancel your subscription to this discussion, please e-mail
>> ostech-core_os-unsubscribe@community.qnx.com
>>
>>
>>
>>
>> _______________________________________________
>>
>> OSTech
>> http://community.qnx.com/sf/go/post109753
>> To cancel your subscription to this discussion, please e-mail
>> ostech-core_os-unsubscribe@community.qnx.com
>>
>>
>>
>
>
|
|
|
|
|
|
