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Forum Topic - ARM11 D-cache: (2 Items)
   
ARM11 D-cache  
In looking at _start.S from omap2420 bsp, I see that level one I-cache is enabled but D-cache is disabled.

Does D-cache ever get enabled?  Or is there some reason it is left disabled?
Re: ARM11 D-cache  
The dcache is enabled when the MMU is enabled before jumping to the kernel.
See the vstart function in startup/lib/cstart.S.

The IPL and startup execute with the MMU disabled and the dcache behaviour
when the MMU is disabled is typically cpu-dependent, so it would require
potentially cpu-dependent code to be used at the points in startup where
the dcache needs to be cleaned/flushed.

For the icache, it's always safe to invalidate it when the MMU is enabled
which can be done with a cpu-independent operation.

	Sunil.

Dennis Kelly wrote:
> In looking at _start.S from omap2420 bsp, I see that level one I-cache 
> is enabled but D-cache is disabled.
> 
> Does D-cache ever get enabled?  Or is there some reason it is left 
> disabled?
> 
> _______________________________________________
> OSTech
> http://community.qnx.com/sf/go/post7042
>