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Forum Topic - Intel Advanced Vector Extensions Support (AVX): (7 Items)
   
Intel Advanced Vector Extensions Support (AVX)  
Hi

I have an Intel Sandy Bridge-based system up-and-running...
(cf. topic: http://community.qnx.com/sf/discussion/do/listPosts/projects.bsp/discussion.bsp.topc20053)

I decided to try out some AVX instructions and wrote a small program that uses AVX intrinsics... but my program keeps 
crashing in Momentics (SIGILL "illegal instruction").
I figure this is due to the OS not supporting the AVX instruction set yet.

Wikipedia says on its AVX page: "AVX adds new register-state through the 256-bit wide YMM register-file, so explicit 
operating system support is required to properly save & restore AVX's new registers between context switches."

Now my question (for the kernel team?):  (When) will Neutrino support this instruction set? Is there a roadmap for this?


Thanks,
Lorenz


Re: Intel Advanced Vector Extensions Support (AVX)  
> Hi
> 
> I have an Intel Sandy Bridge-based system up-and-running...
> (cf. topic: http://community.qnx.com/sf/discussion/do/listPosts/projects.bsp/
> discussion.bsp.topc20053)
> 
> I decided to try out some AVX instructions and wrote a small program that uses
>  AVX intrinsics... but my program keeps crashing in Momentics (SIGILL "illegal
>  instruction").
> I figure this is due to the OS not supporting the AVX instruction set yet.
> 
> Wikipedia says on its AVX page: "AVX adds new register-state through the 256-
> bit wide YMM register-file, so explicit operating system support is required 
> to properly save & restore AVX's new registers between context switches."
> 
> Now my question (for the kernel team?):  (When) will Neutrino support this 
> instruction set? Is there a roadmap for this?

Just an educated guess.  If this is like floating point instruction, OS support is only needed if you have more then one
 thread using this.  You may be running into other issue like alignment (xmm stuff is picky).  To test this theory, have
 your program disable all interupt, run a highest priority and not make any kernel calls during the calculations and see
 if the crash still occurs. If it does then it most likely NOT an OS issue.

> 
> Thanks,
> Lorenz
> 
> 


Re: Intel Advanced Vector Extensions Support (AVX)  
Hmmm... thanks for your input.
I tried running my program at highest priority, but I don't think that's the issue, since the program already crashes 
when trying to execute the first AVX intrinsic...

My complete test program: 

#include <iostream>
#include <immintrin.h> // AVX instrinsics

int main( int argc, char** argv )
{
 	__m256 var;
	__m256 var2;
	__m256 result;

	var = _mm256_set1_ps(1.f);
	var2 = _mm256_set1_ps(3.f);
	result = _mm256_add_ps(var,var2);

	return 0;
}

Doesn't get any simpler than that...
Re: Intel Advanced Vector Extensions Support (AVX)  
Mario Charest wrote:
>> Hi
>>
>> I have an Intel Sandy Bridge-based system up-and-running...
>> (cf. topic: http://community.qnx.com/sf/discussion/do/listPosts/projects.bsp/
>> discussion.bsp.topc20053)
>>
>> I decided to try out some AVX instructions and wrote a small program that uses
>>   AVX intrinsics... but my program keeps crashing in Momentics (SIGILL "illegal
>>   instruction").
>> I figure this is due to the OS not supporting the AVX instruction set yet.
>>
>> Wikipedia says on its AVX page: "AVX adds new register-state through the 256-
>> bit wide YMM register-file, so explicit operating system support is required
>> to properly save&  restore AVX's new registers between context switches."
>>
>> Now my question (for the kernel team?):  (When) will Neutrino support this
>> instruction set? Is there a roadmap for this?
> Just an educated guess.  If this is like floating point instruction, OS support is only needed if you have more then 
one thread using this.  You may be running into other issue like alignment (xmm stuff is picky).  To test this theory, 
have your program disable all interupt, run a highest priority and not make any kernel calls during the calculations and
 see if the crash still occurs. If it does then it most likely NOT an OS issue.

The AVX extension must be enabled by the kernel or driver ... also the 
libc must support the AVX extension (dynamic linker ..)
You need also the version 4.4.2 of gcc ...

--Armin
Re: Intel Advanced Vector Extensions Support (AVX)  
> The AVX extension must be enabled by the kernel or driver ... also the 
> libc must support the AVX extension (dynamic linker ..)
> You need also the version 4.4.2 of gcc ...

I'm using 4.4.2 (SDP 6.5.0, IDE 4.7) ...  the compiling and linking of the test program in my previous post works 
without a problem..  Don't know about libc version, but from what I found, glibc 2.11 onwards has AVX support.

The issue is definitively in the kernel IMO... it's not AVX enabled yet.

These are AVX modifications done in 2009 for the linux kernel, for example:
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=a30469e7921a6dd2067e9e836d7787cfa0105627


I confess I don't know what I'm talking about, but I would think something similar would have to be done in the Neutrino
 Kernel..?
Re: Intel Advanced Vector Extensions Support (AVX)  
Lorenz,

forget AVX for QNX6. QSS need their power to fight against Android and 
~300000 Android apps. They are focused on "Arm" ... no time left for 
x86, IMHO.

--Armin



Lorenz Bucher wrote:
>> The AVX extension must be enabled by the kernel or driver ... also the
>> libc must support the AVX extension (dynamic linker ..)
>> You need also the version 4.4.2 of gcc ...
> I'm using 4.4.2 (SDP 6.5.0, IDE 4.7) ...  the compiling and linking of the test program in my previous post works 
without a problem..  Don't know about libc version, but from what I found, glibc 2.11 onwards has AVX support.
>
> The issue is definitively in the kernel IMO... it's not AVX enabled yet.
>
> These are AVX modifications done in 2009 for the linux kernel, for example:
> http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=
a30469e7921a6dd2067e9e836d7787cfa0105627
>
> I confess I don't know what I'm talking about, but I would think something similar would have to be done in the 
Neutrino Kernel..?
>
>
>
> _______________________________________________
>
> OSTech
> http://community.qnx.com/sf/go/post85256
>
>
RE: Intel Advanced Vector Extensions Support (AVX)  
QNX remains focused on our core offerings
http://www.qnx.com/products/neutrino-rtos/index.html

AVX support is a requirement for the next release.

Chris

-----Original Message-----
From: Armin Steinhoff [mailto:community-noreply@qnx.com] 
Sent: April-29-11 3:35 AM
To: ostech-core_os
Subject: Re: Intel Advanced Vector Extensions Support (AVX)


Lorenz,

forget AVX for QNX6. QSS need their power to fight against Android and 
~300000 Android apps. They are focused on "Arm" ... no time left for 
x86, IMHO.

--Armin



Lorenz Bucher wrote:
>> The AVX extension must be enabled by the kernel or driver ... also
the
>> libc must support the AVX extension (dynamic linker ..)
>> You need also the version 4.4.2 of gcc ...
> I'm using 4.4.2 (SDP 6.5.0, IDE 4.7) ...  the compiling and linking of
the test program in my previous post works without a problem..  Don't
know about libc version, but from what I found, glibc 2.11 onwards has
AVX support.
>
> The issue is definitively in the kernel IMO... it's not AVX enabled
yet.
>
> These are AVX modifications done in 2009 for the linux kernel, for
example:
>
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commi
tdiff;h=a30469e7921a6dd2067e9e836d7787cfa0105627
>
> I confess I don't know what I'm talking about, but I would think
something similar would have to be done in the Neutrino Kernel..?
>
>
>
> _______________________________________________
>
> OSTech
> http://community.qnx.com/sf/go/post85256
>
>




_______________________________________________

OSTech
http://community.qnx.com/sf/go/post85312