Lasse Skov(deleted)
02/22/2011 9:10 AM
post83370
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Hi
Im using a PPC (MPC8377E with core arch. e300).
This core has a performance degradation due to the reduction of usable DTLB (Data Translation Lookaside Buffer) entries.
Quote from freescale errate:
A performance degradation may occur for the e300 core under some specific Load and Store memory copy operations.
This issue is related to performance only and the core always produces the correct and expected result.
The issue relates to LRU during a DTLB miss with a Load and a Store operation within a 128K byte range (the EA[15-19]
DTLB index) relationship
between the source and the destination of a memory to memory copy. If the Load AND the Store operations (going to a
different address) are such
that the EA[15-19] remain unchanged, then the condition exists, and the DTLB LRU remains pointing to a single way.
http://www.freescale.com/files/32bit/doc/errata/MPC8379ECE.pdf
http://www.freescale.com/files/32bit/doc/errata/MSE5121E_0M36P.pdf
I had testes my target with different performance test to see if I have this problem, and it looks really bad. The copy
is quite slow.
A good cross platform test i used: http://www.greyhound-data.com/gunnar/minibench/
If im right this is setup by the MMU and this is for procnto-600 implemented inside the kernel.
So how can i get better performance for this on my target?
Regards
Lasse
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