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Community/Discussion/QNX4 Community Support (EOL)/Reg:Problem in mmap BAR0 to physical memory/List of Posts
Forum Topic - Reg:Problem in mmap BAR0 to physical memory: (17 Items)
   
Update
kanda samy
02/24/2010 1:03 AM
post48134
Reg:Problem in mmap BAR0 to physical memory   
QNX4.24

The mmap BAR 0 to physical memory is working fine with MIC 3358(Pentium 4) processor. While tested in MIC 3392(core 2 
Duo) processor the same mmap call fails.

addr = mmap(0,128, PROT_READ | PROT_WRITE, MAP_SHARED, fd , pcidetails->PCI_BAR0); - last error returns "Invalid 
argument"

kindly any one tell whether it is due to higher processor configuration?

Also the macros MAP_PHYS, MAP_ANON, . returns undefined error msg

Kindly provide help in this regard.

Thanks Regards,
Kandasamy.K
Hugh Brown
02/24/2010 9:49 AM
post48175
Re: Reg:Problem in mmap BAR0 to physical memory   
MAP_PHYS and MAP_ANON are not defined in QNX4. What value are you getting
for 'pcidetails->PCI_BAR0'?



On 10-02-24 1:03 AM, "kanda samy" <community-noreply@qnx.com> wrote:

> QNX4.24
> 
> The mmap BAR 0 to physical memory is working fine with MIC 3358(Pentium 4)
> processor. While tested in MIC 3392(core 2 Duo) processor the same mmap call
> fails.
> 
> addr = mmap(0,128, PROT_READ | PROT_WRITE, MAP_SHARED, fd ,
> pcidetails->PCI_BAR0); - last error returns "Invalid argument"
> 
> kindly any one tell whether it is due to higher processor configuration?
> 
> Also the macros MAP_PHYS, MAP_ANON, . returns undefined error msg
> 
> Kindly provide help in this regard.
> 
> Thanks Regards,
> Kandasamy.K
> 
> 
> 
> 
> _______________________________________________
> 
> QNX4 Community Support
> http://community.qnx.com/sf/go/post48134
> 

-- 
Hugh Brown                      (613) 591-0931 ext. 2209 (voice)
QNX Software Systems Ltd.        (613) 591-3579           (fax)
175 Terence Matthews Cres.       email:  hsbrown@qnx.com
Kanata, Ontario, Canada.
K2M 1W8
kanda samy
02/25/2010 12:18 AM
post48249
Re: Reg:Problem in mmap BAR0 to physical memory   
Hai Hugh Brown!!!

'pcidetails->PCI_BAR0' is getting as 0xfe5f8c00. which is same as displayed in 'pci' for the device.
Hugh Brown
02/25/2010 9:02 AM
post48281
Re: Reg:Problem in mmap BAR0 to physical memory   
Well I don't see any problem with that address, so I'm not sure why you are
having that problem. The version of the processor shouldn't make a
difference.


On 10-02-25 12:18 AM, "kanda samy" <community-noreply@qnx.com> wrote:

> Hai Hugh Brown!!!
> 
> 'pcidetails->PCI_BAR0' is getting as 0xfe5f8c00. which is same as displayed in
> 'pci' for the device.
> 
> 
> 
> 
> 
> 
> 
> _______________________________________________
> 
> QNX4 Community Support
> http://community.qnx.com/sf/go/post48249
> 

-- 
Hugh Brown                      (613) 591-0931 ext. 2209 (voice)
QNX Software Systems Ltd.        (613) 591-3579           (fax)
175 Terence Matthews Cres.       email:  hsbrown@qnx.com
Kanata, Ontario, Canada.
K2M 1W8
kanda samy
02/26/2010 1:04 AM
post48379
Re: Reg:Problem in mmap BAR0 to physical memory   
I don`t know whether this question is right or wrong!!!

We have installed the OS with the MIC3358 processor board. If we reinstall the OS with MIC3392 can have solution. Kindly
 tell is any driver or .. will install specific to the processor.


Thanks Regards,
Kandasamy.K
Hugh Brown
02/26/2010 9:49 AM
post48407
Re: Reg:Problem in mmap BAR0 to physical memory   
I'm not sure that I understand your question. It shouldn't matter what board
you are installing on. The mmap function should still work. Can you please
supply the output from 'show_pci -v' on both systems and let me know which
device you are trying to initialize.



On 10-02-26 1:04 AM, "kanda samy" <community-noreply@qnx.com> wrote:

> I don`t know whether this question is right or wrong!!!
> 
> We have installed the OS with the MIC3358 processor board. If we reinstall the
> OS with MIC3392 can have solution. Kindly tell is any driver or .. will
> install specific to the processor.
> 
> 
> Thanks Regards,
> Kandasamy.K
> 
> 
> 
> _______________________________________________
> 
> QNX4 Community Support
> http://community.qnx.com/sf/go/post48379
> 

-- 
Hugh Brown                      (613) 591-0931 ext. 2209 (voice)
QNX Software Systems Ltd.        (613) 591-3579           (fax)
175 Terence Matthews Cres.       email:  hsbrown@qnx.com
Kanata, Ontario, Canada.
K2M 1W8
kanda samy
11/25/2010 11:08 PM
post76088
Re: Reg:Problem in mmap BAR0 to physical memory   
I had attach the show_pci output files taken in both MIC3358 and MIC3392 processors. For the below device mmap() fails. 
Kindly reply.

Vendor ID      = 179ch
Device ID      = 2502h
PCI index      = 1h
Class Code     = 8068000h Bridge (Other 128) ProgIF=0
Revision ID    = 0h
Bus number     = 3
Device number  = 10
Function num   = 0
Status Reg     = 290h
Command Reg    = 3h
Header type    = 0h Single-function
BIST           = 0h Build-in-self-test not supported
Latency Timer  = 0h
Cache Line Size= 8h un-cacheable
Base Address   = MEM@ff4ffc00h,32bit length 128 IO@ac80h length 128 bytes MEM@ff4ff800h,32bit length 512
Max Lat        = 0ns
Min Gnt        = 0ns
PCI Int Pin    = 1
PCI Int Pin    = INT A
Interrupt line = 10



Regards,
Kandasamy
Attachment: Text showpci.dat 39.27 KB
Hugh Brown
11/26/2010 8:10 AM
post76110
Re: Reg:Problem in mmap BAR0 to physical memory   
Try starting the PCI server with the Œ-B¹ command line option.


On 10-11-25 11:08 PM, "kanda samy" <community-noreply@qnx.com> wrote:

> I had attach the show_pci output files taken in both MIC3358 and MIC3392
> processors. For the below device mmap() fails. Kindly reply.
> 
> Vendor ID      = 179ch
> Device ID      = 2502h
> PCI index      = 1h
> Class Code     = 8068000h Bridge (Other 128) ProgIF=0
> Revision ID    = 0h
> Bus number     = 3
> Device number  = 10
> Function num   = 0
> Status Reg     = 290h
> Command Reg    = 3h
> Header type    = 0h Single-function
> BIST           = 0h Build-in-self-test not supported
> Latency Timer  = 0h
> Cache Line Size= 8h un-cacheable
> Base Address   = MEM@ff4ffc00h,32bit length 128 IO@ac80h length 128 bytes
> MEM@ff4ff800h,32bit length 512
> Max Lat        = 0ns
> Min Gnt        = 0ns
> PCI Int Pin    = 1
> PCI Int Pin    = INT A
> Interrupt line = 10
> 
> 
> 
> Regards,
> Kandasamy
> 
> 
> 
> _______________________________________________
> 
> QNX4 Community Support
> http://community.qnx.com/sf/go/post76088
> 

-- 
Hugh Brown                      (613) 591-0931 ext. 2209 (voice)
QNX Software Systems Ltd.        (613) 591-3579           (fax)
175 Terence Matthews Cres.       email:  hsbrown@qnx.com
Kanata, Ontario, Canada.
K2M 1W8
kanda samy
11/27/2010 4:02 AM
post76205
Re: Reg:Problem in mmap BAR0 to physical memory   
pci-bios command not available in QNX4.24. How to start the pci server in Qnx4


Thanks Regards,
Kandasamy K.
Hugh Brown
11/28/2010 8:46 AM
post76221
Re: Reg:Problem in mmap BAR0 to physical memory   
Sorry, I didn¹t see that the posting was for QNX4. How are you trying to
mmap the address? Can you post a few lines of your code?


On 10-11-27 4:02 AM, "kanda samy" <community-noreply@qnx.com> wrote:

> pci-bios command not available in QNX4.24. How to start the pci server in Qnx4
> 
> 
> Thanks Regards,
> Kandasamy K.
> 
> 
> 
> _______________________________________________
> 
> QNX4 Community Support
> http://community.qnx.com/sf/go/post76205
> 
> 

-- 
Hugh Brown                      (613) 591-0931 ext. 2209 (voice)
QNX Software Systems Ltd.        (613) 591-3579           (fax)
175 Terence Matthews Cres.       email:  hsbrown@qnx.com
Kanata, Ontario, Canada.
K2M 1W8
kanda samy
11/29/2010 2:22 AM
post76245
Re: Reg:Problem in mmap BAR0 to physical memory   
The code is given below.

/* Mapping Memory */
/* Step 1: Open the shared memory pool */
iSharedMemPool = shm_open("Physical", O_RDWR, 0777);
if(iSharedMemPool == -1)
         return SHARED_MEM_ERR;

/* Step 2: Map the memory area */
/* Since DP2502 is using only address bar 2, memory is mapped only for that part */
if(hDP2502->PciBarDet[DP2502_BAR].IsActive)
{
			
hDP2502->PciBarDet[DP2502_BAR].VirtAddress = mmap (0,DP2502_BAR_SIZE,PROT_READ | PROT_WRITE, MAP_SHARED, iSharedMemPool,
hDP2502->PciBarDet[DP2502_BAR].BaseAddress);		

          if(hDP2502->PciBarDet[DP2502_BAR].VirtAddress == -1) 
          {
              fprintf(stderr, "\nMap Error : %s\nBase Address is %x", strerror(errno), hDP2502->PciBarDet[DP2502_BAR].
BaseAddress);
              return DP2502_MAP_MEM_ERR;
          }
}
Hugh Brown
11/29/2010 8:04 AM
post76249
Re: Reg:Problem in mmap BAR0 to physical memory   
Your code looks correct, so what is the value in
hDP2502->PciBarDet[DP2502_BAR].BaseAddress?


On 10-11-29 2:22 AM, "kanda samy" <community-noreply@qnx.com> wrote:

> The code is given below.
> 
> /* Mapping Memory */
> /* Step 1: Open the shared memory pool */
> iSharedMemPool = shm_open("Physical", O_RDWR, 0777);
> if(iSharedMemPool == -1)
>          return SHARED_MEM_ERR;
> 
> /* Step 2: Map the memory area */
> /* Since DP2502 is using only address bar 2, memory is mapped only for that
> part */
> if(hDP2502->PciBarDet[DP2502_BAR].IsActive)
> {
>                  
> hDP2502->PciBarDet[DP2502_BAR].VirtAddress = mmap (0,DP2502_BAR_SIZE,PROT_READ
> | PROT_WRITE, MAP_SHARED,
> iSharedMemPool,hDP2502->PciBarDet[DP2502_BAR].BaseAddress);
> 
>           if(hDP2502->PciBarDet[DP2502_BAR].VirtAddress == -1)
>           {
>               fprintf(stderr, "\nMap Error : %s\nBase Address is %x",
> strerror(errno), hDP2502->PciBarDet[DP2502_BAR].BaseAddress);
>               return DP2502_MAP_MEM_ERR;
>           }
> }
>        
> 
> 
> 
> _______________________________________________
> 
> QNX4 Community Support
> http://community.qnx.com/sf/go/post76245
> 
> 

-- 
Hugh Brown                      (613) 591-0931 ext. 2209 (voice)
QNX Software Systems Ltd.        (613) 591-3579           (fax)
175 Terence Matthews Cres.       email:  hsbrown@qnx.com
Kanata, Ontario, Canada.
K2M 1W8
kanda samy
11/30/2010 3:52 AM
post76398
Re: Reg:Problem in mmap BAR0 to physical memory   
The address is same as displayed in the show_pci. ff4ff800 (BAR 2) 


Thanks & Regards,
Kandasamy K
Hugh Brown
11/30/2010 8:38 AM
post76406
Re: Reg:Problem in mmap BAR0 to physical memory   
If you are wanting to access the memory of the PCI device, you should rather
use the qnx_segment_overlay_flags () function call as follows:

unsigned int io_seg;
unsigned char far *hw_addr;

io_seg = qnx_segment_overlay_flags (0xff4ff800, size, _PMF_GLOBAL);
if (io_seg == 0xffffffff)
error;
hw_addr = MK_FP(io_seg, 0);


On 10-11-30 3:52 AM, "kanda samy" <community-noreply@qnx.com> wrote:

> The address is same as displayed in the show_pci. ff4ff800 (BAR 2)
> 
> 
> Thanks & Regards,
> Kandasamy K
> 
> 
> 
> _______________________________________________
> 
> QNX4 Community Support
> http://community.qnx.com/sf/go/post76398
> 
> 

-- 
Hugh Brown                      (613) 591-0931 ext. 2209 (voice)
QNX Software Systems Ltd.        (613) 591-3579           (fax)
175 Terence Matthews Cres.       email:  hsbrown@qnx.com
Kanata, Ontario, Canada.
K2M 1W8
kanda samy
12/01/2010 3:45 AM
post76619
Re: Reg:Problem in mmap BAR0 to physical memory   
But the same code works in MIC 3358 processor. The mmap() doesn't fails. It is working fine for that device.

Thanks & Regards
Kandasamy K
Hugh Brown
12/01/2010 7:58 AM
post76629
Re: Reg:Problem in mmap BAR0 to physical memory   
Well I can¹t say why it works on one machine and not on another. Have you
tried what I suggested?


On 10-12-01 3:45 AM, "kanda samy" <community-noreply@qnx.com> wrote:

> But the same code works in MIC 3358 processor. The mmap() doesn't fails. It is
> working fine for that device.
> 
> Thanks & Regards
> Kandasamy K
> 
> 
> 
> _______________________________________________
> 
> QNX4 Community Support
> http://community.qnx.com/sf/go/post76619
> 
> 

-- 
Hugh Brown                      (613) 591-0931 ext. 2209 (voice)
QNX Software Systems Ltd.        (613) 591-3579           (fax)
175 Terence Matthews Cres.       email:  hsbrown@qnx.com
Kanata, Ontario, Canada.
K2M 1W8
sathish kumar
07/19/2013 3:27 AM
post103317
Re: Reg:Problem in mmap BAR0 to physical memory   
The BAR address passing to the mmap() should be aligned to PAGE SIZE (4K for x86 arch), otherwise it will return invalid
 argument. The address mentioned above (0xff4ff800) is not page aligned. So the 0xff4ff000(aligned to 4K) to be passed 
instead of 0xff4ff800 and in the returned address the offset 0x0800 to be added to point the device's physical address. 


Or the BIOS may allocate the physical address which is aligned to page size.

I hope this may be helpful...

Thank you,
Sathish Kumar

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